公开(公告)号：US08871562B2

公开(公告)日：2014-10-28

申请号：US13698906

申请日：2012-08-13

申请人： Xuehui Zhang ,  Jianshe Xue ,  Xiang Liu

发明人： Xuehui Zhang ,  Jianshe Xue ,  Xiang Liu

IPC分类号： H01L21/00 ,  H01L51/00 ,  H01L51/10 ,  H01L27/32 ,  H01L51/05

CPC分类号： H01L51/0516 ,  H01L27/3274 ,  H01L51/0018 ,  H01L51/0023 ,  H01L51/0541 ,  H01L51/102

摘要： According to the present invention, there is provided an organic thin film transistor array substrate and a method for manufacturing the same and a display device. The method for manufacturing the organic thin film transistor array substrate comprises: forming a pattern comprising a source electrode, a drain electrode, a data line and a pixel electrode on a transparent substrate through a first patterning process; forming an organic semiconductor pattern, a gate insulating layer pattern, a pattern comprising a gate electrode and a gate line through a second patterning process on the transparent substrate after the first patterning process; depositing a passivation layer on the transparent substrate after the second patterning process, and forming a pattern comprising a data line pad region, a gate line pad region and a pixel pad region through a third patterning process; and forming a pattern of a common electrode on the transparent substrate after the third patterning process through a fourth patterning process. The technical solutions of the present invention can increase production efficiency of the organic thin film transistor array substrate and reduce production costs.

摘要翻译： 根据本发明，提供一种有机薄膜晶体管阵列基板及其制造方法和显示装置。 制造有机薄膜晶体管阵列基板的方法包括：通过第一图案化工艺在透明基板上形成包括源电极，漏电极，数据线和像素电极的图案; 在第一图案化工艺之后通过第二图案化工艺在透明基板上形成有机半导体图案，栅极绝缘层图案，包括栅电极和栅极线的图案; 在第二图案化处理之后，在透明基板上沉积钝化层，并通过第三图案化工艺形成包括数据线焊盘区域，栅极线焊盘区域和像素焊盘区域的图案; 以及通过第四图案化工艺在所述第三图案化工艺之后在所述透明基板上形成公共电极的图案。 本发明的技术方案可以提高有机薄膜晶体管阵列基板的生产效率，降低生产成本。

公开(公告)号：US08850608B2

公开(公告)日：2014-09-30

申请号：US13414673

申请日：2012-03-07

申请人： Mohammad Tehranipoor ,  Xiaoxiao Wang ,  Xuehui Zhang

发明人： Mohammad Tehranipoor ,  Xiaoxiao Wang ,  Xuehui Zhang

IPC分类号： G06F21/00 ,  H04L29/06 ,  H03K3/03 ,  H04N7/167 ,  H04L9/06 ,  H03L7/099

CPC分类号： H03K3/0315 ,  G09C1/00 ,  H03K3/0322 ,  H03L7/0995 ,  H04L9/0662 ,  H04L9/3278 ,  H04L2209/12

摘要： Aspects of the disclosure relate to combining on-chip structure with external current measurements for threat detection in an integrated circuit. This method considers Trojans' impact on neighboring cells and on the entire IC's power consumption, and effectively localizes the measurement of dynamic power. An on-chip structure can permit threat detections. In one aspect, the on-chip structure can comprise a plurality of sensors distributed across the entirety of the IC, with each sensor of the plurality of sensors being placed in different rows of a standard-cell design. In another aspect, data analysis can permit separating effect of process variations on transient power usage of the IC from effects of a hardware threat such power usage. The on-chip structure also can be employed for implementation of a PE-PUF.

摘要翻译： 本公开的方面涉及将片上结构与用于集成电路中的威胁检测的外部电流测量结合。 这种方法考虑到木马对周边小区的影响和整个IC的功耗，并有效地定位了动态功率的测量。 片上结构可以允许威胁检测。 在一个方面，片上结构可以包括分布在整个IC整体上的多个传感器，多个传感器的每个传感器被放置在标准单元设计的不同行中。 在另一方面，数据分析可以允许过程变化对IC的瞬态功率使用的分离效应与硬件威胁的影响的这种功率使用的影响。 片上结构也可用于实施PE-PUF。

公开(公告)号：US20130134399A1

公开(公告)日：2013-05-30

申请号：US13698906

申请日：2012-08-13

申请人： Xuehui Zhang ,  Jianshe Xue ,  Xiang Liu

发明人： Xuehui Zhang ,  Jianshe Xue ,  Xiang Liu

IPC分类号： H01L51/05

CPC分类号： H01L51/0516 ,  H01L27/3274 ,  H01L51/0018 ,  H01L51/0023 ,  H01L51/0541 ,  H01L51/102

摘要： According to the present invention, there is provided an organic thin film transistor array substrate and a method for manufacturing the same and a display device. The method for manufacturing the organic thin film transistor array substrate comprises: forming a pattern comprising a source electrode, a drain electrode, a data line and a pixel electrode on a transparent substrate through a first patterning process; forming an organic semiconductor pattern, a gate insulating layer pattern, a pattern comprising a gate electrode and a gate line through a second patterning process on the transparent substrate after the first patterning process; depositing a passivation layer on the transparent substrate after the second patterning process, and forming a pattern comprising a data line pad region, a gate line pad region and a pixel pad region through a third patterning process; and forming a pattern of a common electrode on the transparent substrate after the third patterning process through a fourth patterning process. The technical solutions of the present invention can increase production efficiency of the organic thin film transistor array substrate and reduce production costs.

摘要翻译： 根据本发明，提供一种有机薄膜晶体管阵列基板及其制造方法和显示装置。 制造有机薄膜晶体管阵列基板的方法包括：通过第一图案化工艺在透明基板上形成包括源电极，漏电极，数据线和像素电极的图案; 在第一图案化工艺之后通过第二图案化工艺在透明基板上形成有机半导体图案，栅极绝缘层图案，包括栅电极和栅极线的图案; 在第二图案化处理之后，在透明基板上沉积钝化层，并通过第三图案化工艺形成包括数据线焊盘区域，栅极线焊盘区域和像素焊盘区域的图案; 以及通过第四图案化工艺在所述第三图案化工艺之后在所述透明基板上形成公共电极的图案。 本发明的技术方案可以提高有机薄膜晶体管阵列基板的生产效率，降低生产成本。

公开(公告)号：US20130019324A1

公开(公告)日：2013-01-17

申请号：US13414673

申请日：2012-03-07

申请人： Mohammad Tehranipoor ,  Xiaoxiao Wang ,  Xuehui Zhang

发明人： Mohammad Tehranipoor ,  Xiaoxiao Wang ,  Xuehui Zhang

IPC分类号： G06F21/02

CPC分类号： H03K3/0315 ,  G09C1/00 ,  H03K3/0322 ,  H03L7/0995 ,  H04L9/0662 ,  H04L9/3278 ,  H04L2209/12

摘要： Aspects of the disclosure relate to combining on-chip structure with external current measurements for threat detection in an integrated circuit. This method considers Trojans' impact on neighboring cells and on the entire IC's power consumption, and effectively localizes the measurement of dynamic power. An on-chip structure can permit threat detections. In one aspect, the on-chip structure can comprise a plurality of sensors distributed across the entirety of the IC, with each sensor of the plurality of sensors being placed in different rows of a standard-cell design. In another aspect, data analysis can permit separating effect of process variations on transient power usage of the IC from effects of a hardware threat such power usage. The on-chip structure also can be employed for implementation of a PE-PUF.

摘要翻译： 本公开的方面涉及将片上结构与用于集成电路中的威胁检测的外部电流测量结合。 这种方法考虑到木马对周边小区的影响和整个IC的功耗，并有效地定位了动态功率的测量。 片上结构可以允许威胁检测。 一方面，片上结构可以包括分布在整个IC的整个传感器上的多个传感器，多个传感器的每个传感器被放置在标准单元设计的不同行中。 在另一方面，数据分析可以允许过程变化对IC的瞬态功率使用的分离效应与硬件威胁的影响的这种功率使用的影响。 片上结构也可用于实施PE-PUF。

公开(公告)号：US20120298972A1

公开(公告)日：2012-11-29

申请号：US13479048

申请日：2012-05-23

申请人： Xuehui ZHANG

发明人： Xuehui ZHANG

IPC分类号： H01L51/40 ,  H01L51/10

CPC分类号： H01L51/0541 ,  H01L27/283 ,  H01L51/0018 ,  H01L51/102 ,  H01L51/107

摘要： According to an embodiment of the disclosed technology, a manufacture method of an organic thin film transistor array substrate is provided. The method comprises: forming a first pixel electrode, a source electrode, a drain electrode and a data line in a first patterning process; forming an organic semiconductor island and a gate insulating island in a second patterning process; forming a data pad region in a third patterning process; and forming a second pixel electrode, a gate electrode and a gate line in a fourth patterning process.

摘要翻译： 根据所公开的技术的实施例，提供了一种有机薄膜晶体管阵列基板的制造方法。 该方法包括：在第一图案化工艺中形成第一像素电极，源电极，漏电极和数据线; 在第二图案化工艺中形成有机半导体岛和栅绝缘岛; 在第三图案化工艺中形成数据焊盘区域; 以及在第四图案化工艺中形成第二像素电极，栅电极和栅极线。

公开(公告)号：US08785264B2

公开(公告)日：2014-07-22

申请号：US13479048

申请日：2012-05-23

申请人： Xuehui Zhang

发明人： Xuehui Zhang

IPC分类号： H01L21/84

CPC分类号： H01L51/0541 ,  H01L27/283 ,  H01L51/0018 ,  H01L51/102 ,  H01L51/107

摘要： According to an embodiment of the disclosed technology, a manufacture method of an organic thin film transistor array substrate is provided. The method comprises: forming a first pixel electrode, a source electrode, a drain electrode and a data line in a first patterning process; forming an organic semiconductor island and a gate insulating island in a second patterning process; forming a data pad region in a third patterning process; and forming a second pixel electrode, a gate electrode and a gate line in a fourth patterning process.

摘要翻译： 根据所公开的技术的实施例，提供了一种有机薄膜晶体管阵列基板的制造方法。 该方法包括：在第一图案化工艺中形成第一像素电极，源电极，漏电极和数据线; 在第二图案化工艺中形成有机半导体岛和栅绝缘岛; 在第三图案化工艺中形成数据焊盘区域; 以及在第四图案化工艺中形成第二像素电极，栅电极和栅极线。

公开(公告)号：US20140077213A1

公开(公告)日：2014-03-20

申请号：US13985196

申请日：2012-11-08

申请人： Xuehui Zhang ,  Xiang Liu ,  Jainshe Xue

发明人： Xuehui Zhang ,  Xiang Liu ,  Jainshe Xue

IPC分类号： H01L29/786 ,  H01L27/12 ,  H01L29/66

CPC分类号： H01L29/78678 ,  G02F2001/134372 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1259 ,  H01L27/1288 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66765 ,  H01L29/78693

摘要： There is provided a thin film transistor, comprising a substrate (1) and a gate layer (3), a gate insulating layer (4), an active layer (5), an electrode metal layer (8) and a passivation layer (9) which are formed on the substrate (1) in sequence; the electrode metal layer (8) comprises a source electrode (8a) and a drain electrode (8b), which are separated from each other with a channel region being defined therebetween; between the gate layer (3) and the substrate (1), there is formed a first transparent conductive layer (2); between the active layer (5) and the electrode metal layer (8), there is formed a second transparent conductive layer (7). The transparent conductive layers (2, 7) are added so that adhesive force between the gate metal layer (3) and the substrate (1) is enhanced, diffusion of the electrode metal to the active layer (5) is prevented.

摘要翻译： 提供一种薄膜晶体管，其包括基板（1）和栅极层（3），栅极绝缘层（4），有源层（5），电极金属层（8）和钝化层（9） ），其顺序形成在基板（1）上; 所述电极金属层（8）包括源电极（8a）和漏电极（8b），所述源极电极（8a）和漏极电极（8b）彼此分离，沟道区域被限定在其间; 在栅极层（3）和基板（1）之间形成有第一透明导电层（2）; 在活性层（5）和电极金属层（8）之间形成有第二透明导电层（7）。 添加透明导电层（2,7），使得栅极金属层（3）和基板（1）之间的粘合力增强，从而防止了电极金属向有源层（5）的扩散。

公开(公告)号：US20140103344A1

公开(公告)日：2014-04-17

申请号：US13789172

申请日：2013-03-07

申请人： MOHAMMAD TEHRANIPOOR ,  Nicholas Tuzzio ,  Xuehui Zhang

发明人： MOHAMMAD TEHRANIPOOR ,  Nicholas Tuzzio ,  Xuehui Zhang

IPC分类号： G01R31/28

CPC分类号： G01R31/2884 ,  G01R31/31725

摘要： An apparatus for detection of integrated circuit recovery is disclosed. An example apparatus can comprise a first sensor embedded in an integrated circuit. The example apparatus can comprise a second sensor embedded in the integrated circuit. The example apparatus can comprise a selector unit configured to select one of the first sensor or the second sensor. The example apparatus can also comprise a monitor unit configured to receive output signal from the first sensor and the second sensor and to supply the output signal to an analysis unit.

摘要翻译： 公开了一种集成电路恢复检测装置。 示例性装置可以包括嵌入在集成电路中的第一传感器。 示例性装置可以包括嵌入集成电路中的第二传感器。 示例性装置可以包括被配置为选择第一传感器或第二传感器之一的选择器单元。 示例性装置还可以包括被配置为从第一传感器和第二传感器接收输出信号并将输出信号提供给分析单元的监视器单元。