公开(公告)号：US09179320B2

公开(公告)日：2015-11-03

申请号：US12907581

申请日：2010-10-19

申请人： Won Jae Shin ,  Young Jun Hong ,  Chang Yong Shin ,  Yong Ho Cho ,  Dong Jo Park ,  Jung Hyun Park

发明人： Won Jae Shin ,  Young Jun Hong ,  Chang Yong Shin ,  Yong Ho Cho ,  Dong Jo Park ,  Jung Hyun Park

IPC分类号： H04W16/02 ,  H04L5/00 ,  H04W16/32 ,  H04W84/04

CPC分类号： H04W36/0083 ,  H04L5/0048 ,  H04W16/02 ,  H04W16/32 ,  H04W36/30 ,  H04W84/045

摘要： A method of assigning and managing reference signals in a multi-cell environment, and a network device and a terminal for applying the method, are provided. Reference signal patterns may be assigned to multiple femtocells through a long term coordination of a central control unit that is used to control multiple cells.

摘要翻译： 提供了一种在多小区环境中分配和管理参考信号的方法，以及用于应用该方法的网络设备和终端。 可以通过用于控制多个小区的中央控制单元的长期协调来将参考信号模式分配给多个毫微微小区。

公开(公告)号：US08515357B2

公开(公告)日：2013-08-20

申请号：US12349303

申请日：2009-01-06

申请人： Hyun Ho Choi ,  Yong Ho Cho ,  Jung Hyun Park ,  Dong Jo Park

发明人： Hyun Ho Choi ,  Yong Ho Cho ,  Jung Hyun Park ,  Dong Jo Park

IPC分类号： H04B17/00 ,  H04B15/00

CPC分类号： H04L27/2649 ,  H04W16/14 ,  H04W72/02

摘要： A cognitive radio (CR) communication apparatus and method is provided. A cognitive radio (CR) communication apparatus includes a signal receiving unit which receives signals from a primary user of a primary system and a secondary transmitter of a secondary system, the received signals including an element associated with at least one known signal of the secondary transmitter, and a determination unit which determines whether a signal of the primary user exists from among the received signals based on the element associated with the at least one known signal.

公开(公告)号：US08363507B2

公开(公告)日：2013-01-29

申请号：US12820244

申请日：2010-06-22

申请人： Yong-Ho Cho

发明人： Yong-Ho Cho

IPC分类号： G11C8/00

CPC分类号： G11C8/08

摘要： A wordline driver includes a pre-driver, a sub-wordline driver and a transmission circuit. The pre-driver generates a wordline enable signal and a wordline disable signal based on one or more selection signals, a decoded address signal, and one or more timing control signals. The transmission circuit transmits the wordline enable signal and the wordline disable signal. The sub-wordline driver controls a voltage level of the sub-wordline based on the wordline enable signal and the wordline disable signal that are transmitted by the transmission circuit. Therefore, driving capacity may be improved.

摘要翻译： 字线驱动器包括预驱动器，子字线驱动器和发送电路。 预驱动器基于一个或多个选择信号，解码的地址信号和一个或多个定时控制信号产生字线使能信号和字线禁止信号。 发送电路发送字线使能信号和字线禁止信号。 子字线驱动器基于由发送电路发送的字线使能信号和字线禁止信号来控制子字线的电压电平。 因此，可以提高驾驶能力。

公开(公告)号：US08284624B2

公开(公告)日：2012-10-09

申请号：US12691910

申请日：2010-01-22

申请人： Ki-Heung Kim ,  Yong-Ho Cho ,  Ji-Hoon Lim ,  Seong-Jin Jang ,  Tae-Yoon Lee

发明人： Ki-Heung Kim ,  Yong-Ho Cho ,  Ji-Hoon Lim ,  Seong-Jin Jang ,  Tae-Yoon Lee

IPC分类号： G11C7/04

CPC分类号： G11C7/04 ,  G01R19/16552 ,  G11C5/147 ,  H03K5/2481

摘要： A level detector, an internal voltage generator including the level detector, and a semiconductor memory device including the internal voltage generator are provided. The internal voltage generator includes a level detector that compares a threshold voltage that varies with temperature with an internal voltage to output a comparative voltage, and an internal voltage driver that adjusts an external supply voltage in response to the comparative voltage and that outputs an internal voltage.

摘要翻译： 提供了一种电平检测器，包括电平检测器的内部电压发生器和包括内部电压发生器的半导体存储器件。 内部电压发生器包括电平检测器，其将与温度变化的阈值电压与内部电压进行比较以输出比较电压;以及内部电压驱动器，其响应于比较电压调节外部电源电压并且输出内部电压 。

公开(公告)号：US08243535B2

公开(公告)日：2012-08-14

申请号：US12731465

申请日：2010-03-25

申请人： Dong-Su Jang ,  Yong-Ho Cho

发明人： Dong-Su Jang ,  Yong-Ho Cho

IPC分类号： G11C7/00

CPC分类号： G11C11/4091 ,  G11C7/08 ,  G11C7/22 ,  G11C7/222 ,  G11C11/4076

摘要： A semiconductor memory device comprises a memory cell configured to output data to a pair of bitlines, a variable delay circuit configured to receive a sense amplifier enable signal, adjust a delay of the sense amplifier enable signal by changing a slope of a delay based on a variable external power supply voltage, and output a delayed sense amplifier enable signal, and a bitline sense amplifier configured to amplify a voltage difference between the pair of bitlines in response to the delayed sense amplifier enable signal and output the amplified voltage difference to a pair of input/output lines.

摘要翻译： 一种半导体存储器件包括被配置为将数据输出到一对位线的存储单元，可变延迟电路，被配置为接收读出放大器使能信号，通过改变基于a的延迟的斜率来调整读出放大器使能信号的延迟 可变外部电源电压，并输出延迟读出放大器使能信号;以及位线读出放大器，被配置为响应延迟的读出放大器使能信号放大该对位线之间的电压差，并将放大的电压差输出到一对 输入/输出线。

公开(公告)号：US08206849B2

公开(公告)日：2012-06-26

申请号：US13079426

申请日：2011-04-04

申请人： Hyungchan Kim ,  Hee gyu Kim ,  Yong-ho Cho ,  Jae sik Chung

发明人： Hyungchan Kim ,  Hee gyu Kim ,  Yong-ho Cho ,  Jae sik Chung

IPC分类号： H01M2/00

CPC分类号： H01M2/0404 ,  H01M2/34 ,  H01M10/0436 ,  H01M10/425 ,  H01M2200/10 ,  Y10T29/4911

摘要： An integral cap assembly comprising a top cap mounted as a base plate to an opening of a battery can and a cap subassembly including a protective circuit module and the like integrally mounted on the top cap, a method for manufacturing a secondary battery comprising the same, and a secondary battery manufactured thereby are disclosed. The cap assembly is provided as an integral member comprising the top cap acting as the base plate, and the cap subassembly having the protective circuit module provided thereon, thereby simplifying a manufacturing process of the battery while minimizing frequency of defective products. Additionally, the integral cap assembly is manufactured through insert injection molding, thereby providing notable advantages over the conventional technology.

摘要翻译： 一种整体盖组件，包括顶盖，其安装成电池罐的开口的基板，以及包括一体地安装在顶盖上的保护电路模块等的盖子组件，包括该顶盖的二次电池的制造方法， 并且公开了由此制造的二次电池。 帽组件设置为整体构件，其包括用作基板的顶盖，并且帽子组件具有设置在其上的保护电路模块，从而简化了电池的制造过程，同时使缺陷产品的频率最小化。 此外，通过插入式注射成型制造整体式盖组件，从而提供了超过常规技术的显着优点。

公开(公告)号：US20110177363A1

公开(公告)日：2011-07-21

申请号：US13079426

申请日：2011-04-04

申请人： Hyungchan Kim ,  Hee gyu Kim ,  Yong-ho Cho ,  Jae sik Chung

发明人： Hyungchan Kim ,  Hee gyu Kim ,  Yong-ho Cho ,  Jae sik Chung

IPC分类号： H01M10/42 ,  H01M10/04 ,  B23K26/20

CPC分类号： H01M2/0404 ,  H01M2/34 ,  H01M10/0436 ,  H01M10/425 ,  H01M2200/10 ,  Y10T29/4911

摘要： An integral cap assembly comprising a top cap mounted as a base plate to an opening of a battery can and a cap subassembly including a protective circuit module and the like integrally mounted on the top cap, a method for manufacturing a secondary battery comprising the same, and a secondary battery manufactured thereby are disclosed. The cap assembly is provided as an integral member comprising the top cap acting as the base plate, and the cap subassembly having the protective circuit module provided thereon, thereby simplifying a manufacturing process of the battery while minimizing frequency of defective products. Additionally, the integral cap assembly is manufactured through insert injection molding, thereby providing notable advantages over the conventional technology.

摘要翻译： 一种整体盖组件，包括顶盖，其安装成电池罐的开口的基板，以及包括一体地安装在顶盖上的保护电路模块等的盖子组件，包括该顶盖的二次电池的制造方法， 并且公开了由此制造的二次电池。 帽组件设置为整体构件，其包括用作基板的顶盖，并且帽子组件具有设置在其上的保护电路模块，从而简化了电池的制造过程，同时使缺陷产品的频率最小化。 此外，通过插入式注射成型制造整体式盖组件，从而提供了超过常规技术的显着优点。

公开(公告)号：US07648797B2

公开(公告)日：2010-01-19

申请号：US11058605

申请日：2005-02-16

申请人： Hyungchan Kim ,  Hee gyu Kim ,  Yong-ho Cho ,  Jae sik Chung

发明人： Hyungchan Kim ,  Hee gyu Kim ,  Yong-ho Cho ,  Jae sik Chung

IPC分类号： H01M2/00

CPC分类号： H01M2/0404 ,  H01M2/34 ,  H01M10/0436 ,  H01M10/425 ,  H01M2200/10 ,  Y10T29/4911

摘要： An integral cap assembly comprising a top cap mounted as a base plate to an opening of a battery can and a cap subassembly including a protective circuit module and the like integrally mounted on the top cap, a method for manufacturing a secondary battery comprising the same, and a secondary battery manufactured thereby are disclosed. The cap assembly is provided as an integral member comprising the top cap acting as the base plate, and the cap subassembly having the protective circuit module provided thereon, thereby simplifying a manufacturing process of the battery while minimizing frequency of defective products. Additionally, the integral cap assembly is manufactured through insert injection molding, thereby providing notable advantages over the conventional technology.

摘要翻译： 一种整体盖组件，包括顶盖，其安装成电池罐的开口的基板，以及包括一体地安装在顶盖上的保护电路模块等的盖子组件，包括该顶盖的二次电池的制造方法， 并且公开了由此制造的二次电池。 帽组件设置为整体构件，其包括用作基板的顶盖，并且盖子组件具有设置在其上的保护电路模块，由此简化了电池的制造过程，同时使缺陷产品的频率最小化。 此外，通过插入式注射成型制造整体式盖组件，从而提供了超过常规技术的显着优点。

公开(公告)号：US07642746B2

公开(公告)日：2010-01-05

申请号：US11561033

申请日：2006-11-17

申请人： Hyeongchan Kim ,  Sain Park ,  Yong-ho Cho

发明人： Hyeongchan Kim ,  Sain Park ,  Yong-ho Cho

IPC分类号： H02J7/00 ,  H01R3/00

CPC分类号： H01M10/4207 ,  H01M2/022 ,  H01M2/204

摘要： Disclosed herein is a method of manufacturing a battery core pack having a plurality of unit cells, especially a plurality of cylindrical batteries, which are connected with each other by connecting members. According to the present invention, the structure of the battery core pack can be easily modified by merely changing the combination of the connecting members without manufacturing additional connecting members. Consequently, common use of the connecting members is possible.

摘要翻译： 本文公开了一种制造具有多个单元电池，特别是多个圆柱形电池的电池芯组件的方法，它们通过连接构件相互连接。 根据本发明，通过仅仅改变连接构件的组合而不制造附加的连接构件，可以容易地改变电池芯组的结构。 因此，可以通常使用连接构件。

公开(公告)号：US20090313524A1

公开(公告)日：2009-12-17

申请号：US12268534

申请日：2008-11-11

申请人： Hyun Ho CHOI ,  Kyung Hun JANG ,  Jung Hyun PARK ,  Yong Ho CHO ,  Dong Jo PARK

发明人： Hyun Ho CHOI ,  Kyung Hun JANG ,  Jung Hyun PARK ,  Yong Ho CHO ,  Dong Jo PARK

IPC分类号： H03M13/11 ,  G06F11/10

CPC分类号： H03M13/356 ,  H03M13/1102 ,  H03M13/1148 ,  H03M13/353 ,  H04L1/0009 ,  H04L1/04

摘要： A low density parity code (LDPC) encoding and decoding devices and encoding and decoding methods thereof are provided. An LDPC encoding device includes an information obtaining unit which obtains status information of at least two frequency bands, a matrix generation unit which generates a parity check matrix based on the status information, the parity check matrix including sub matrices which correspond to the at least two frequency bands, and an encoder which generates data bits and parity bits using an LDPC with the generated parity check matrix.

摘要翻译： 提供了一种低密度奇偶校验码（LDPC）编码和解码装置及其编码和解码方法。 LDPC编码装置包括获取至少两个频带的状态信息的信息获取单元，基于状态信息生成奇偶校验矩阵的矩阵生成单元，所述奇偶校验矩阵包括对应于所述至少两个频带的子矩阵 频带，以及使用具有所生成的奇偶校验矩阵的LDPC生成数据位和奇偶校验位的编码器。