公开(公告)号：US07157752B2

公开(公告)日：2007-01-02

申请号：US10811488

申请日：2004-03-29

申请人： Jun Yoshida ,  Yutaka Takinomi ,  Hiroyuki Abe

发明人： Jun Yoshida ,  Yutaka Takinomi ,  Hiroyuki Abe

IPC分类号： H01L27/10

CPC分类号： H01L23/5223 ,  H01L23/5286 ,  H01L2224/48247 ,  H01L2924/13091 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00

摘要： A semiconductor device capable of effectively eliminating noise on multilayered power lines with a bypass capacitor. A first power line is connected to the bypass capacitor. A second power line is a line from which a part located above the bypass capacitor is removed. Contacts connect the first and second power lines. Therefore, noise appearing on the second power line travels to the first power line, resulting in effectively eliminating the noise with the bypass capacitor.

摘要翻译： 一种能够有效地消除具有旁路电容器的多层电力线上的噪声的半导体器件。 第一电源线连接到旁路电容器。 第二条电源线是从旁路电容器上方的部分从其去除的线。 触点连接第一和第二电源线。 因此，出现在第二电源线上的噪声行进到第一电力线，从而有效地消除旁路电容器的噪声。

公开(公告)号：US06509628B2

公开(公告)日：2003-01-21

申请号：US10014408

申请日：2001-12-14

申请人： Yutaka Takinomi ,  Kazushi Sawai ,  Shinichi Watanabe

发明人： Yutaka Takinomi ,  Kazushi Sawai ,  Shinichi Watanabe

IPC分类号： H01L2352

CPC分类号： H01L24/06 ,  H01L23/50 ,  H01L23/642 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/48 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/30107 ,  H01L2224/45099

摘要： In a semiconductor chip, a second power source pad, to which a ground potential is applied, is arranged adjacent to a first power source pad, to which a power source potential is applied, signal pads are arranged adjacent to the second power source pad by the number corresponding to a size of an external part such as a bypass capacitor inserted between power source terminals in an IC chip, and further, a third power source pad, to which the ground potential is applied, is arranged adjacent to the signal pad. The second power source pad or the third power source pad is selected according to the size of the external part, and then, is connected to a lead terminal, to which the ground potential is applied, in an IC chip, thereby providing a power source terminal, to which the ground potential is applied.

公开(公告)号：US20070018339A1

公开(公告)日：2007-01-25

申请号：US11234388

申请日：2005-09-26

申请人： Yutaka Takinomi

发明人： Yutaka Takinomi

IPC分类号： H01L23/48

CPC分类号： H01L25/0657 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/4911 ,  H01L2224/49113 ,  H01L2224/4917 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06575 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A relay board provided in a semiconductor package where a plurality of semiconductor chips are provided, the relay board relaying a wire for wiring the semiconductor chips or a wire for wiring a lead frame of the semiconductor package and the semiconductor chip, the relay board includes a plurality of wirings each of the wirings connecting at least three bonding pads.

摘要翻译： 一种中继板，设置在其中设置有多个半导体芯片的半导体封装中，所述中继板中继用于布线所述半导体芯片的导线或用于布线所述半导体封装的引线框架和所述半导体芯片的导线，所述中继板包括： 多条布线连接至少三个接合焊盘。

公开(公告)号：US6163170A

公开(公告)日：2000-12-19

申请号：US857269

申请日：1997-05-16

申请人： Yutaka Takinomi

发明人： Yutaka Takinomi

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L21/8234 ,  H01L27/088 ,  H03K3/356 ,  H03K5/08 ,  H03K19/0185 ,  H03K19/0175

CPC分类号： H03K3/356008 ,  H03K3/356113

摘要： A level converter includes a first circuit which converts a first level of a signal into a second level which is higher than the first level, and a second circuit which causes a potential of a given node of the level converter to be defined rapidly when the level converter is in a state other than a normal state in which the first circuit converts the first level of the signal into the second level.

摘要翻译： 电平转换器包括第一电路，其将信号的第一电平转换成高于第一电平的第二电平;以及第二电路，其使电平转换器的给定节点的电位在电平 转换器处于除第一电路将第一电平信号转换为第二电平的正常状态之外的状态。

公开(公告)号：US07608925B2

公开(公告)日：2009-10-27

申请号：US11234388

申请日：2005-09-26

申请人： Yutaka Takinomi

发明人： Yutaka Takinomi

IPC分类号： H01L23/34 ,  H01L21/00

CPC分类号： H01L25/0657 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/4911 ,  H01L2224/49113 ,  H01L2224/4917 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06575 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A relay board provided in a semiconductor package where a plurality of semiconductor chips are provided, the relay board relaying a wire for wiring the semiconductor chips or a wire for wiring a lead frame of the semiconductor package and the semiconductor chip, the relay board includes a plurality of wirings each of the wirings connecting at least three bonding pads.

摘要翻译： 一种中继板，设置在其中设置有多个半导体芯片的半导体封装中，所述中继板中继用于布线所述半导体芯片的导线或用于布线所述半导体封装的引线框架和所述半导体芯片的导线，所述中继板包括： 多条布线连接至少三个接合焊盘。

公开(公告)号：US20050093051A1

公开(公告)日：2005-05-05

申请号：US10811488

申请日：2004-03-29

申请人： Jun Yoshida ,  Yutaka Takinomi ,  Hiroyuki Abe

发明人： Jun Yoshida ,  Yutaka Takinomi ,  Hiroyuki Abe

IPC分类号： H01L21/3205 ,  H01L21/768 ,  H01L21/82 ,  H01L21/822 ,  H01L23/52 ,  H01L23/522 ,  H01L23/528 ,  H01L27/04 ,  H01L27/108

CPC分类号： H01L23/5223 ,  H01L23/5286 ,  H01L2224/48247 ,  H01L2924/13091 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00

摘要： A semiconductor device capable of effectively eliminating noise on multilayered power lines with a bypass capacitor. A first power line is connected to the bypass capacitor. A second power line is a line from which a part located above the bypass capacitor is removed. Contacts connect the first and second power lines. Therefore, noise appearing on the second power line travels to the first power line, resulting in effectively eliminating the noise with the bypass capacitor.

摘要翻译： 一种能够有效地消除具有旁路电容器的多层电力线上的噪声的半导体器件。 第一电源线连接到旁路电容器。 第二条电源线是从旁路电容器上方的部分从其去除的线。 触点连接第一和第二电源线。 因此，出现在第二电源线上的噪声行进到第一电力线，从而有效地消除旁路电容器的噪声。

公开(公告)号：US5003304A

公开(公告)日：1991-03-26

申请号：US526948

申请日：1990-05-23

申请人： Yutaka Takinomi ,  Minoru Wano

发明人： Yutaka Takinomi ,  Minoru Wano

IPC分类号： G09G5/24 ,  G06T3/00 ,  G09G5/00 ,  G09G5/28

CPC分类号： G09G5/28

摘要： A pattern display signal generating apparatus comprises a memory for storing predetermined pattern data and for outputting even-numbered bits and odd-numbered bits of the pattern data in parallel when scanned, a timing generator for generating an address for scanning the memory and for generating first and second clock signal having a predetermined phase difference, a first shift register for shifting the odd-numbered bits and outputting the same in series in synchronization with the first clock signal, a second shift register for shifting the even-numbered bits and outputting the same in series in synchronization with the second clock signal, and a logical operation circuit for performing at least one predetermined logical operation between outputs of the first and second shift registers to generate a pattern display signal.