公开(公告)号：US5879973A

公开(公告)日：1999-03-09

申请号：US510563

申请日：1995-08-02

Applicant: Ken-ichi Yanai ,  Tsutomu Tanaka ,  Koji Ohgata ,  Yutaka Takizawa ,  Ken-ichi Oki ,  Takuya Hirano

Inventor： Ken-ichi Yanai ,  Tsutomu Tanaka ,  Koji Ohgata ,  Yutaka Takizawa ,  Ken-ichi Oki ,  Takuya Hirano

IPC: G02F1/1368 ,  H01L21/205 ,  H01L21/285 ,  H01L21/336 ,  H01L29/45 ,  H01L29/786 ,  H01L21/84

CPC classification number: H01L29/78696 ,  H01L21/0242 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/28525 ,  H01L29/458 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78603 ,  H01L29/78618 ,  G02F1/1368

Abstract: To form a contact layer on source and drain electrodes of a stagger-type TFT, a conductive material is selectively sticked to the surface of the source and drain electrodes and a contact layer is selectively deposited by using the conductive material as growth species to form an active semiconductor layer on the contact layer. For an inverted-stagger-type TFT, a conductive material is selectively deposited on the surface of a contact layer to use the selectively deposited conductive material as source and drain electrodes so that patterning is unnecessary. To selectively deposit a contact layer of a TFT by alternately repeating etching and deposition, the temperature for the etching is set to 200.degree. C. or lower. A contaminated layer on the surface of a semiconductor film serving as an active semiconductor layer and contact layer of a TFT is removed by plasma at the temperature of 200.degree. C. or lower. For a stagger-type thin-film transistor, the hydrogen or halogen content of an insulating film serving as the substrate of source and drain electrodes is increased. For an inverted-stagger thin-film transistor, the hydrogen or halogen content of an insulating film serving as a channel protective film is increased. Thus, the etching rate of the surfaces of these insulating films by plasma increases.

Abstract translation: 为了在交错型TFT的源极和漏极上形成接触层，导电材料选择性地粘附到源电极和漏电极的表面，并且通过使用导电材料作为生长物质选择性地沉积接触层，以形成 接触层上的有源半导体层。 对于反交错型TFT，在接触层的表面上选择性地沉积导电材料，以使用选择性沉积的导电材料作为源极和漏极，使得不需要图案化。 为了通过交替重复蚀刻和沉积来选择性地沉积TFT的接触层，蚀刻温度设定为200℃以下。 用作有源半导体层的半导体膜的表面上的污染层和TFT的接触层通过等离子体在200℃或更低的温度下去除。 对于错开型薄膜晶体管，增加了用作源极和漏极电极的衬底的绝缘膜的氢或卤素含量。 对于倒置的薄膜晶体管，作为沟道保护膜的绝缘膜的氢或卤素含量增加。 因此，通过等离子体的这些绝缘膜的表面的蚀刻速率增加。

公开(公告)号：US5804473A

公开(公告)日：1998-09-08

申请号：US717811

申请日：1996-09-24

Applicant: Yutaka Takizawa

Inventor： Yutaka Takizawa

IPC: H01L21/02 ,  H01L21/20 ,  H01L21/336 ,  H01L27/12 ,  H01L29/786 ,  H01L21/00

CPC classification number: H01L29/66757 ,  H01L21/2022 ,  H01L29/66765 ,  Y10S148/016

Abstract: A method for fabricating a thin film semiconductor device includes the steps of introducing, into an amorphous film of a semiconductor material, at least one metallic element that forms an intermetallic compound with the semiconductor material and at least one nonmetallic element selected from group VIa elements, group VIIa elements or nitrogen, and crystallizing the amorphous film, after introducing the metallic element and the nonmetallic element, by a thermal annealing process, to convert the amorphous film to a crystalline film.

Abstract translation: 一种制造薄膜半导体器件的方法包括以下步骤：向半导体材料的非晶膜中引入至少一种与半导体材料形成金属间化合物的金属元素和至少一种选自VIa族元素的非金属元素， Ⅶa族元素或氮，并且通过热退火工艺在引入金属元素和非金属元素之后使无定形膜结晶，以将非晶膜转化为结晶膜。

公开(公告)号：US5728592A

公开(公告)日：1998-03-17

申请号：US499000

申请日：1995-07-06

Applicant: Ken-ichi Oki ,  Ken-ichi Yanai ,  Tamotsu Wada ,  Koji Ohgata ,  Yutaka Takizawa ,  Masahiro Okabe ,  Tsutomu Tanaka

Inventor： Ken-ichi Oki ,  Ken-ichi Yanai ,  Tamotsu Wada ,  Koji Ohgata ,  Yutaka Takizawa ,  Masahiro Okabe ,  Tsutomu Tanaka

IPC: G02F1/1362 ,  G02F1/1368 ,  H01L21/77 ,  H01L21/84 ,  H01L21/288 ,  H01L21/31

CPC classification number: H01L27/124 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136295 ,  H01L29/41733

Abstract: A thin film transistor matrix device is fabricated by forming a transparent conductor film and a metal film on an insulating substrate in this order. The metal film and the transparent conductor film are together patterned to form picture element electrodes, and drain bus lines or gate bus lines. Source electrodes and drain electrodes may also be formed from the transparent conductor film and metal film. A semiconductor layer, an insulating film and a conductor film may be formed on the entire surface in this order. In this case, the conductor film, the insulator film and the semiconductor layer are patterned to form an active layer from the semiconductor layer, gate insulating films from the insulating film, and gate electrodes and gate bus lines from the conductor film. By patterning the conductor film, the insulating film and the semiconductor layer, the metal film of the picture element electrodes and drain bus lines is exposed. Alternatively, the metal film may be patterned with the semiconductor layer, insulating film and conductor film to expose the transparent conductor film. A current is applied to the drain bus lines or gate bus lines in an electrolyte solution to selectively form a film on the drain bus lines or gate bus lines. The film may be a protecting film serving as a mask to allow the metal film on the picture element electrodes to be etched.

Abstract translation: 通过在绝缘基板上依次形成透明导体膜和金属膜来制造薄膜晶体管矩阵器件。 金属膜和透明导体膜一起构图以形成像素电极，以及漏极总线或栅极总线。 源电极和漏电极也可以由透明导体膜和金属膜形成。 可以依次在整个表面上形成半导体层，绝缘膜和导体膜。 在这种情况下，对导体膜，绝缘体膜和半导体层进行构图，从半导体层形成有源层，从绝缘膜形成栅极绝缘膜，从导体膜形成栅极电极和栅极总线。 通过图案化导体膜，绝缘膜和半导体层，使像素电极和漏极总线的金属膜露出。 或者，可以用半导体层，绝缘膜和导体膜对金属膜进行图案化以使透明导体膜露出。 在电解质溶液中的漏极总线或栅极总线上施加电流以在漏极总线或栅极总线上选择性地形成膜。 该膜可以是用作掩模的保护膜，以允许蚀刻图像元件电极上的金属膜。

公开(公告)号：US4743064A

公开(公告)日：1988-05-10

申请号：US17244

申请日：1987-02-20

Applicant: Yutaka Takizawa

Inventor： Yutaka Takizawa

IPC: A47C4/04 ,  A47C4/28 ,  B60N2/24 ,  B60N2/28 ,  B60N2/42 ,  B60N2/90 ,  A47D1/10

CPC classification number: B60N2/2863 ,  B60N2/2821 ,  B60N2/2875

Abstract: A seat for a child in car comprising a seat portion and a back portion and capable of being mounted on a car seat by mean of a seat belt with its backside directed forward. It is also provided with an auxiliary support collapsible into the underside of its seat portion.

Abstract translation: 一种用于汽车中的儿童座椅，包括座椅部分和后部部分，并且能够通过安全带安装在汽车座椅上，座椅前侧朝向前方。 它还设置有可折叠到其座部分的下侧中的辅助支撑件。

公开(公告)号：US06959573B2

公开(公告)日：2005-11-01

申请号：US10343836

申请日：2001-08-08

Applicant: Masateru Matsumoto ,  Koichi Yanagawa ,  Ken Hatano ,  Yutaka Takizawa

Inventor： Masateru Matsumoto ,  Koichi Yanagawa ,  Ken Hatano ,  Yutaka Takizawa

IPC: B21D5/02

CPC classification number: B21D5/042 ,  B21D5/02 ,  B21D5/0209 ,  Y10S72/702

Abstract: A bending apparatus reciprocates at least one of an upper table to which a punch is mounted and a lower table to which a corresponding plurality of adjacent divided dies are mounted. At least one bending angle detector is provided between the dies to detect a bending angle of the workpiece. A main body inserts the bending angle detector into a gap between the dies and withdraws the bending angle detector from the gap between the dies. A lift is biased upward by a first elastic body and is configured to be pressed downward by the workpiece at approximately a center of a groove portion of the dies. The lift includes a first engagement member. A rotor support is biased upward by two second elastic bodies having smaller biasing forces than the first elastic body. The rotor support includes second engagement members. Two rotors are provided on opposite sides of the groove portion at an upper portion of the rotor support. The two rotors include workpiece contacts that contact the workpiece. Links rotatably engage the first engagement member to stop an upper end of the lift in a position lower than an upper surface of the dies, and rotatably engage the second engagement members to position the workpiece contacts below the upper surface of the dies. A bending angle calculator converts rotating amounts of the two rotors into bending angles of the workpiece.

Abstract translation: 弯曲装置使安装有冲头的上台中的至少一个与安装相应的多个相邻分割模的下台往复运动。 在模具之间设置至少一个弯曲角度检测器，以检测工件的弯曲角度。 主体将弯曲角度检测器插入到模具之间的间隙中，并从模​​具之间的间隙中取出弯曲角度检测器。 电梯被第一弹性体向上偏压，并被构造成在模具的凹槽部分的大致中心处被工件向下按压。 升降机包括第一接合构件。 转子支撑件被具有比第一弹性体更小的偏压力的两个第二弹性体向上偏压。 转子支撑件包括第二接合构件。 在转子支撑件的上部处，在槽部的相对侧设置有两个转子。 两个转子包括接触工件的工件接触。 链节可旋转地接合第一接合构件以将升降机的上端停在比模具的上表面低的位置，并且可旋转地接合第二接合构件，以将工件触点定位在模具的上表面下方。 弯曲角度计算器将两个转子的旋转量转换成工件的弯曲角度。

公开(公告)号：US5994173A

公开(公告)日：1999-11-30

申请号：US941224

申请日：1997-09-26

Applicant: Ken-ichi Oki ,  Ken-ichi Yanai ,  Tamotsu Wada ,  Koji Ohgata ,  Yutaka Takizawa ,  Masahiro Okabe ,  Tsutomu Tanaka

Inventor： Ken-ichi Oki ,  Ken-ichi Yanai ,  Tamotsu Wada ,  Koji Ohgata ,  Yutaka Takizawa ,  Masahiro Okabe ,  Tsutomu Tanaka

IPC: G02F1/1362 ,  G02F1/1368 ,  H01L21/77 ,  H01L21/84 ,  H01L31/0392 ,  H01L21/306 ,  H01L29/78

CPC classification number: H01L27/124 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136295 ,  H01L29/41733

Abstract: A thin film transistor matrix device comprises an insulating substrate, a plurality of picture element electrodes arranged in a matrix on the insulating substrate, source electrodes connected to the respective picture element electrodes, drain electrodes opposed to the respective source electrodes, operational semiconductor layers sandwiched by the source electrodes and the drain electrodes, and gate electrodes formed on the operational semiconductor layers through gate insulating films, each gate electrode being narrowed with respect to the associated gate insulating film so that side walls of the gate electrode forms a step with respect to side walls of the associated gate insulating film which is a substrate of the gate electrode. The gate electrode is made narrower with respect to the gate insulating film to form a step between the side walls of the gate electrode with respect to those of the gate insulating film, whereby leak currents from the source electrode or the drain electrode to the gate electrode along the mesa side surfaces of the TFT can be simply suppressed. Accordingly a TFT matrix device having little wasteful current consumption can be realized.

Abstract translation: 薄膜晶体管矩阵器件包括绝缘衬底，在绝缘衬底上以矩阵形式布置的多个像素电极，连接到各个像素电极的源电极，与各个源电极相对的漏极电极，被 源电极和漏极以及通过栅极绝缘膜形成在工作半导体层上的栅电极，每个栅电极相对于相关的栅极绝缘膜变窄，使得栅电极的侧壁相对于侧面形成一个台阶 作为栅电极的基板的相关栅极绝缘膜的壁。 使栅电极相对于栅极绝缘膜变窄，在栅电极的侧壁之间相对于栅极绝缘膜的侧壁形成台阶，由此从源电极或漏电极到栅电极的漏电流 沿着TFT的台面侧表面可以简单地抑制。 因此，可以实现具有少量浪费电流消耗的TFT矩阵装置。

公开(公告)号：US5900646A

公开(公告)日：1999-05-04

申请号：US730662

申请日：1996-10-11

Applicant: Yutaka Takizawa ,  Ken-ichi Yanai

Inventor： Yutaka Takizawa ,  Ken-ichi Yanai

IPC: H01L29/40 ,  G02F1/1362 ,  H01L21/20 ,  H01L21/205 ,  H01L21/336 ,  H01L29/78 ,  H01L29/786 ,  H01L31/04 ,  H01L31/18 ,  H01L29/08

CPC classification number: G02F1/136286 ,  H01L31/1884 ,  H01L21/02422 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02645 ,  Y02E10/50

Abstract: A semiconductor device including an insulating layer, a patterned conductive layer on the insulating layer, a semiconductor layer on the patterned conductive layer, and a reactive layer formed by reacting the patterned conductive layer with growth nuclei on the patterned conductive layer between the patterned conductive layer and the semiconductor layer, the growth nuclei containing any of elements in group IIIb, group IVb, group Va and group VIIb that does not constitute the conductive film and the insulating film on the surface of the conductive film.

Abstract translation: 包括绝缘层，绝缘层上的图案化导电层，图案化导电层上的半导体层的半导体器件，以及通过使图案化的导电层与生长核在图案化的导电层之间在图案化的导电层 和半导体层，生长核含有不构成导电膜的IIIb族，IVb族，Va族和VIIb族中的任何元素，以及导电膜表面上的绝缘膜。

公开(公告)号：US5620924A

公开(公告)日：1997-04-15

申请号：US407957

申请日：1995-03-22

Applicant: Yutaka Takizawa ,  Ken-ichi Yanai

Inventor： Yutaka Takizawa ,  Ken-ichi Yanai

IPC: H01L29/40 ,  G02F1/1362 ,  H01L21/20 ,  H01L21/205 ,  H01L21/336 ,  H01L29/78 ,  H01L29/786 ,  H01L31/04 ,  H01L31/18 ,  G02F1/13

CPC classification number: G02F1/136286 ,  H01L31/1884 ,  H01L21/02422 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02645 ,  Y02E10/50

Abstract: A method of manufacturing a semiconductor device according to the present invention comprises the steps of forming a conductive film on an insulating film, forming growth nucleuses containing any of elements in group IIIb, group IVb, group Vb and group VIIb that does not constitute the conductive film and the insulating film on the surface of the conductive film, and growing a semiconductor selectively on growth nucleuses.

Abstract translation: 根据本发明的制造半导体器件的方法包括以下步骤：在绝缘膜上形成导电膜，形成包含不构成导电的IIIb族，IVb族，Vb族和VIIb族中任何元素的生长核 膜和导电膜表面上的绝缘膜，并且在生长核上选择性地生长半导体。

公开(公告)号：US5470768A

公开(公告)日：1995-11-28

申请号：US102248

申请日：1993-08-05

Applicant: Ken-ichi Yanai ,  Tsutomu Tanaka ,  Koji Ohgata ,  Yutaka Takizawa ,  Ken-ichi Oki ,  Takuya Hirano

Inventor： Ken-ichi Yanai ,  Tsutomu Tanaka ,  Koji Ohgata ,  Yutaka Takizawa ,  Ken-ichi Oki ,  Takuya Hirano

IPC: G02F1/1368 ,  H01L21/205 ,  H01L21/285 ,  H01L21/336 ,  H01L29/45 ,  H01L29/786 ,  H01L21/86

CPC classification number: H01L29/78696 ,  H01L21/0242 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/28525 ,  H01L29/458 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78603 ,  H01L29/78618 ,  G02F1/1368

Abstract: To form a contact layer on source and drain electrodes of a stagger-type TFT, a conductive material is selectively sticked to the surface of the source and drain electrodes and a contact layer is selectively deposited by using the conductive material as growth species to form an active semiconductor layer on the contact layer. For an inverted-stagger-type TFT, a conductive material is selectively deposited on the surface of a contact layer to use the selectively deposited conductive material as source and drain electrodes so that patterning is unnecessary. To selectively deposit a contact layer of a TFT by alternately repeating etching and deposition, the temperature for the etching is set to 200.degree. C. or lower. A contaminated layer on the surface of a semiconductor film serving as an active semiconductor layer and contact layer of a TFT is removed by plasma at the temperature of 200.degree. C. or lower. For a stagger-type thin-film transistor, the hydrogen or halogen content of an insulating film serving as the substrate of source and drain electrodes is increased. For an inverted-stagger thin-film transistor, the hydrogen or halogen content of an insulating film serving as a channel protective film is increased. Thus, the etching rate of the surfaces of these insulating films by plasma increases.

Abstract translation: 为了在交错型TFT的源极和漏极上形成接触层，导电材料选择性地粘附到源电极和漏电极的表面，并且通过使用导电材料作为生长物质选择性地沉积接触层，以形成 接触层上的有源半导体层。 对于反交错型TFT，在接触层的表面上选择性地沉积导电材料，以使用选择性沉积的导电材料作为源极和漏极，使得不需要图案化。 为了通过交替重复蚀刻和沉积来选择性地沉积TFT的接触层，蚀刻温度设定为200℃以下。 用作有源半导体层的半导体膜的表面上的污染层和TFT的接触层通过等离子体在200℃或更低的温度下去除。 对于错开型薄膜晶体管，增加了用作源极和漏极电极的衬底的绝缘膜的氢或卤素含量。 对于倒置的薄膜晶体管，作为沟道保护膜的绝缘膜的氢或卤素含量增加。 因此，通过等离子体的这些绝缘膜的表面的蚀刻速率增加。

公开(公告)号：US06635521B2

公开(公告)日：2003-10-21

申请号：US09277880

申请日：1999-03-29

Applicant: Hongyong Zhang ,  Makoto Igarashi ,  Kenichi Yanai ,  Tetsuro Hori ,  Yutaka Takizawa

Inventor： Hongyong Zhang ,  Makoto Igarashi ,  Kenichi Yanai ,  Tetsuro Hori ,  Yutaka Takizawa

IPC: H01L218238

CPC classification number: H01L27/127 ,  H01L27/1214 ,  H01L27/1274

Abstract: In the fabrication of a CMOS-TFT, non-selectively doping (for both of p- and n-type TFTS) and selectively doping (only for the n-type TFT) with p-type impurities (B: boron) are successively performed at very low concentrations to control the threshold voltages (Vthp and Vthn). More specifically, the Id-Vg characteristics of the p- and n-type TFTs are initially negatively shifted. In this state, non-selectively doping is performed positively to shift the p- and n-type TFTs first to adjust the Vthp to a specified value. Selectively doping is then performed positively to shift only the n-type TFT to adjust the Vthn to a specified value. The threshold voltages of the p- and n-type TFTs constructing the CMOS-TFT can be independently and efficiently (with minimum photolithography) controlled with high accuracy.

Abstract translation: 在CMOS-TFT的制造中，对p型杂质（B：硼）进行非选择性掺杂（对于p型和n型TFTS两者）和选择性掺杂（仅对于n型TFT），依次进行 以非常低的浓度控制阈值电压（Vthp和Vthn）。 更具体地说，p型和n型TFT的Id-Vg特性最初是负偏移的。 在这种状态下，非选择性地掺杂是首先进行p型和n型TFT移位，以将Vthp调节到规定值。 然后选择性地掺杂以仅仅移动n型TFT以将Vthn调节到指定值。 构成CMOS-TFT的p型和n型TFT的阈值电压可以以高精度独立而有效地（最小光刻）进行控制。