公开(公告)号：US20110037153A1

公开(公告)日：2011-02-17

申请号：US12887821

申请日：2010-09-22

申请人： Zhengyu Zhu ,  Yi Li ,  FangFang Yang

发明人： Zhengyu Zhu ,  Yi Li ,  FangFang Yang

IPC分类号： H01L23/495 ,  H01L21/441

CPC分类号： H01L24/32 ,  B81B7/0048 ,  H01L23/49513 ,  H01L24/29 ,  H01L24/48 ,  H01L24/83 ,  H01L24/97 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/291 ,  H01L2224/29111 ,  H01L2224/29116 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/48247 ,  H01L2224/83051 ,  H01L2224/8385 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/078 ,  H01L2924/07802 ,  H01L2924/0781 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Die attach methods used in making semiconductor devices and the semiconductor devices resulting from those methods are described. The methods include providing a leadframe with a die attach pad, using a boundary feature(s) containing a bond wire to define a perimeter on the die attach pad, depositing a conductive material (such as solder) within the perimeter, and then attaching a die containing an integrated circuit device to the die attach pad by using the conductive material. The boundary feature(s) allow an increased thickness of conductive material to be used, resulting in increased bond line thickness and increasing the durability and performance of the resulting semiconductor package. Other embodiments are described.

摘要翻译： 描述用于制造半导体器件的芯片附接方法和由这些方法产生的半导体器件。 所述方法包括使用包含接合线的边界特征来提供具有管芯附接焊盘的引线框架，以在管芯附接焊盘上限定周界，在周边内沉积导电材料（例如焊料），然后附接 通过使用导电材料将包含集成电路器件的裸片封装到管芯附接焊盘。 边界特征允许使用导电材料的增加的厚度，导致增加的结合线厚度并增加所得半导体封装的耐久性和性能。 描述其他实施例。

公开(公告)号：US09147665B2

公开(公告)日：2015-09-29

申请号：US12887821

申请日：2010-09-22

申请人： Zhengyu Zhu ,  Yi Li ,  FangFang Yang

发明人： Zhengyu Zhu ,  Yi Li ,  FangFang Yang

IPC分类号： H01L23/495 ,  H01L23/00 ,  B81B7/00

CPC分类号： H01L24/32 ,  B81B7/0048 ,  H01L23/49513 ,  H01L24/29 ,  H01L24/48 ,  H01L24/83 ,  H01L24/97 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/291 ,  H01L2224/29111 ,  H01L2224/29116 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/48247 ,  H01L2224/83051 ,  H01L2224/8385 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/078 ,  H01L2924/07802 ,  H01L2924/0781 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Die attach methods used in making semiconductor devices and the semiconductor devices resulting from those methods are described. The methods include providing a leadframe with a die attach pad, using a boundary feature(s) containing a bond wire to define a perimeter on the die attach pad, depositing a conductive material (such as solder) within the perimeter, and then attaching a die containing an integrated circuit device to the die attach pad by using the conductive material. The boundary feature(s) allow an increased thickness of conductive material to be used, resulting in increased bond line thickness and increasing the durability and performance of the resulting semiconductor package. Other embodiments are described.

摘要翻译： 描述用于制造半导体器件的芯片附接方法和由这些方法产生的半导体器件。 所述方法包括使用包含接合线的边界特征来提供具有管芯附接焊盘的引线框架，以在管芯附接焊盘上限定周界，在周边内沉积导电材料（例如焊料），然后附接 通过使用导电材料将包含集成电路器件的裸片封装到管芯附接焊盘。 边界特征允许使用导电材料的增加的厚度，导致增加的结合线厚度并增加所得半导体封装的耐久性和性能。 描述其他实施例。

公开(公告)号：US20120232944A1

公开(公告)日：2012-09-13

申请号：US13045764

申请日：2011-03-11

申请人： Zhengyu Zhu ,  Cipriano A. Santos ,  Wei-Hong Wang ,  Maria Teresa Gonzalez Diaz

发明人： Zhengyu Zhu ,  Cipriano A. Santos ,  Wei-Hong Wang ,  Maria Teresa Gonzalez Diaz

IPC分类号： G06Q10/00

CPC分类号： G06Q10/063112

摘要： Methods, apparatus, and computer readable media with executable instructions stored thereon for optimizing resource skill compliance are provided. Example methods of the present disclosure can include identifying jobs, skills corresponding to the jobs, and resources corresponding to the skills. A job skill level is associated with each skill of each job, and a resource skill level is associated with each skill of each resource. An individual skill compliance is determined by computer for each skill of each resource with respect to each skill of each job based on the resource skill level relative to the job skill level. A resource skill compliance is determined by computer for each resource with respect to each job as a total of the individual skill level compliances for each skill corresponding to each job, and resources are assigned by a computer to jobs in a manner that optimizes a total of the resource skill compliances for those resources assigned to jobs.

摘要翻译： 提供了其上存储有用于优化资源技能合规性的可执行指令的方法，装置和计算机可读介质。 本公开的示例性方法可以包括识别作业，对应于作业的技能以及与技能相对应的资源。 工作技能水平与每个作业的每个技能相关联，并且资源技能水平与每个资源的每个技能相关联。 基于相对于工作技能水平的资源技能水平，由计算机根据每个作业的每个技能为每个资源的每个技能确定个人技能的合规性。 资源技能合规性由计算机根据每个作业的每个资源确定为与每个作业相对应的每个技能的个人技能水平合规的总和，并且资源由计算机分配给作业，以优化总计 资源技能符合分配给工作的资源。

公开(公告)号：US07825501B2

公开(公告)日：2010-11-02

申请号：US11935915

申请日：2007-11-06

申请人： Zhengyu Zhu ,  Yi Li ,  FangFang Yang

发明人： Zhengyu Zhu ,  Yi Li ,  FangFang Yang

IPC分类号： H01L23/495

CPC分类号： H01L23/49513 ,  H01L24/29 ,  H01L24/32 ,  H01L2224/27013 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/83051 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15747 ,  H01L2924/0665 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00014

摘要： Die attach methods used in making semiconductor devices and the semiconductor devices resulting from those methods are described. The methods include providing a leadframe with a die attach pad, using boundary features to define a perimeter on the die pad, depositing a conductive material (such as solder) within the perimeter, and then bonding a die containing an integrated circuit to the die pad by using the conductive material. The boundary features allow an increased thickness of conductive material to be used, resulting in an increased bond line thickness and increasing the durability and performance of the resulting semiconductor device.

摘要翻译： 描述用于制造半导体器件的芯片附接方法和由这些方法产生的半导体器件。 这些方法包括：使用边界特征来提供具有管芯附接垫的引线框架，以限定管芯焊盘上的周边，在周边内沉积导电材料（例如焊料），然后将包含集成电路的管芯结合到管芯焊盘 通过使用导电材料。 边界特征允许使用导电材料的厚度增加，导致粘合线厚度增加并且增加所得半导体器件的耐久性和性能。

公开(公告)号：US07589338B2

公开(公告)日：2009-09-15

申请号：US11948170

申请日：2007-11-30

申请人： Yong Liu ,  Zhengyu Zhu ,  Zhongfa Yuan

发明人： Yong Liu ,  Zhengyu Zhu ,  Zhongfa Yuan

IPC分类号： G02B27/00 ,  H01L29/16

CPC分类号： H01L25/167 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/48465 ,  H01L2924/01047 ,  H01L2924/13091 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/00

摘要： An optocoupler package is disclosed. The package includes a substrate comprising a substrate surface, a first device, and a clip structure attached to the first device. The clip structure and the first device are mounted on the substrate, and the first device is oriented at an angle with respect to the substrate surface. A second device is mounted on the substrate, where the first device is capable of communicating with the second device.

摘要翻译： 公开了一种光耦合器封装。 所述包装包括包括衬底表面，第一装置和附接到所述第一装置的夹子结构的衬底。 夹子结构和第一装置安装在基板上，并且第一装置相对于基板表面成一定角度定向。 第二装置安装在基板上，其中第一装置能够与第二装置通信。

公开(公告)号：US20090140179A1

公开(公告)日：2009-06-04

申请号：US11948170

申请日：2007-11-30

申请人： Yong Liu ,  Zhengyu Zhu ,  Zhongfa Yuan

发明人： Yong Liu ,  Zhengyu Zhu ,  Zhongfa Yuan

IPC分类号： G02B27/00 ,  H01L33/00

CPC分类号： H01L25/167 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/48465 ,  H01L2924/01047 ,  H01L2924/13091 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/00

摘要： An optocoupler package is disclosed. The package includes a substrate comprising a substrate surface, a first device, and a clip structure attached to the first device. The clip structure and the first device are mounted on the substrate, and the first device is oriented at an angle with respect to the substrate surface. A second device is mounted on the substrate, where the first device is capable of communicating with the second device.

摘要翻译： 公开了一种光耦合器封装。 所述包装包括包括衬底表面，第一装置和附接到所述第一装置的夹子结构的衬底。 夹子结构和第一装置安装在基板上，并且第一装置相对于基板表面成一定角度定向。 第二装置安装在基板上，其中第一装置能够与第二装置通信。

公开(公告)号：US20090115039A1

公开(公告)日：2009-05-07

申请号：US11935915

申请日：2007-11-06

申请人： Zhengyu Zhu ,  Yi Li ,  FangFang Yang

发明人： Zhengyu Zhu ,  Yi Li ,  FangFang Yang

IPC分类号： H01L23/495 ,  H01L21/60

CPC分类号： H01L23/49513 ,  H01L24/29 ,  H01L24/32 ,  H01L2224/27013 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/83051 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15747 ,  H01L2924/0665 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00014

摘要： Die attach methods used in making semiconductor devices and the semiconductor devices resulting from those methods are described. The methods include providing a leadframe with a die attach pad, using boundary features to define a perimeter on the die pad, depositing a conductive material (such as solder) within the perimeter, and then bonding a die containing an integrated circuit to the die pad by using the conductive material. The boundary features allow an increased thickness of conductive material to be used, resulting in an increased bond line thickness and increasing the durability and performance of the resulting semiconductor device.

摘要翻译： 描述用于制造半导体器件的芯片附接方法和由这些方法产生的半导体器件。 这些方法包括：使用边界特征来提供具有管芯附接垫的引线框架，以限定管芯焊盘上的周边，在周边内沉积导电材料（例如焊料），然后将包含集成电路的管芯结合到管芯焊盘 通过使用导电材料。 边界特征允许使用导电材料的厚度增加，导致粘合线厚度增加并且增加所得半导体器件的耐久性和性能。