公开(公告)号：US20240282737A1

公开(公告)日：2024-08-22

申请号：US18570074

申请日：2021-06-22

申请人： BOE MLED Technology Co., Ltd. ,  BOE TECHNOLOGY GROUP CO., LTD

发明人： Liang Sun ,  Yutian Chu

IPC分类号： H01L23/00 ,  B23K35/36 ,  B23K35/362 ,  H01L25/075 ,  H01L33/62

CPC分类号： H01L24/13 ,  B23K35/3613 ,  B23K35/362 ,  H01L24/16 ,  H01L24/81 ,  H01L24/95 ,  H01L25/0753 ,  H01L33/62 ,  H01L2224/1132 ,  H01L2224/1145 ,  H01L2224/1329 ,  H01L2224/13311 ,  H01L2224/13313 ,  H01L2224/13339 ,  H01L2224/13347 ,  H01L2224/16238 ,  H01L2224/81005 ,  H01L2224/81192 ,  H01L2224/81815 ,  H01L2224/95001 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2933/0066

摘要： The present disclosure provides a flux, a substrate, a manufacturing method thereof, and a device. The flux includes a bulk material and a powdery conductive material mixed in the bulk material, and a volume ratio of the conductive material to the flux is 5% to 10%.

公开(公告)号：US20240282658A1

公开(公告)日：2024-08-22

申请号：US18169998

申请日：2023-02-16

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： John Knickerbocker ,  Mukta Ghate Farooq ,  Keiji Matsumoto

IPC分类号： H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L23/29 ,  H01L23/367

CPC分类号： H01L23/3185 ,  H01L21/561 ,  H01L23/29 ,  H01L23/291 ,  H01L23/3192 ,  H01L23/3675 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/95 ,  H01L2224/16225 ,  H01L2224/2732 ,  H01L2224/2741 ,  H01L2224/2745 ,  H01L2224/27462 ,  H01L2224/2783 ,  H01L2224/29083 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29147 ,  H01L2224/29181 ,  H01L2224/29186 ,  H01L2224/2919 ,  H01L2224/32153 ,  H01L2224/32221 ,  H01L2224/33183 ,  H01L2224/95 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/04953 ,  H01L2924/07025

摘要： A semiconductor integrated circuit device includes a first back-end-of-line region coupled to a first side of a front-end-of-line region, a second back-end-of-line region coupled to a second side of the front-end-of-line region, and a thermally conducting solder at least partially surrounding a perimeter of the front-end-of-line region, the first back-end-of-line region and the second back-end-of-line region.

公开(公告)号：US12057512B2

公开(公告)日：2024-08-06

申请号：US17711819

申请日：2022-04-01

申请人： ROHM CO., LTD.

发明人： Masaya Ueno ,  Sawa Haruyama ,  Masaya Saito

IPC分类号： H01L29/47 ,  H01L23/00 ,  H01L29/06 ,  H01L29/872 ,  H01L29/16

CPC分类号： H01L29/872 ,  H01L24/05 ,  H01L29/0692 ,  H01L29/47 ,  H01L29/0619 ,  H01L29/1608 ,  H01L2224/05624 ,  H01L2224/05638 ,  H01L2224/05647 ,  H01L2924/0132 ,  H01L2924/0133

摘要： A semiconductor device includes: a semiconductor layer including a semiconductor substrate and an epitaxial layer of a first conductivity type formed on the semiconductor substrate; a surface electrode containing at least one selected from the group consisting of an aluminum alloy and aluminum and formed on the semiconductor layer; and an impurity region of a second conductivity type formed on a surface layer portion of the epitaxial layer and forming a pn junction with the epitaxial layer, wherein the surface electrode includes a Schottky portion that is in contact with a surface of the semiconductor layer and forms a Schottky junction with the epitaxial layer.

公开(公告)号：US20240145369A1

公开(公告)日：2024-05-02

申请号：US17976094

申请日：2022-10-28

申请人： Amkor Technology Singapore Holding Pte. Ltd.

发明人： Soo Hyun Kim ,  Won Myoung Ki ,  Dong Hoon Han ,  Tae Kyeong Hwang

IPC分类号： H01L23/498 ,  H01L21/56 ,  H01L23/31 ,  H01L23/552

CPC分类号： H01L23/49838 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/552 ,  H01L24/13 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014

摘要： In one example, an electronic device comprises a substrate comprising a conductive structure and a dielectric structure, the dielectric structure comprising an upper dielectric layer, an electronic component over a top side of the substrate and coupled with the conductive structure, an encapsulant over the top side of the substrate and adjacent a lateral side of the electronic component, and a shield over the top side of the electronic component and contacting a lateral side of the encapsulant and a first lateral side of the substrate. The conductive structure comprises a first tab structure at the first lateral side of the substrate, and wherein the first tab structure contacts the shield and extends above the upper dielectric layer. Other examples and related methods are also disclosed herein.

公开(公告)号：US11935858B2

公开(公告)日：2024-03-19

申请号：US17077646

申请日：2020-10-22

申请人： Samsung Electronics Co., Ltd.

发明人： Seungmin Baek

IPC分类号： H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/13 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H01L25/00 ,  H01L25/10

CPC分类号： H01L24/20 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/568 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/19 ,  H01L25/105 ,  H01L25/50 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/2101 ,  H01L2224/2105 ,  H01L2224/211 ,  H01L2224/214 ,  H01L2224/215 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/92125 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/0133 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/15311 ,  H01L2924/1533 ,  H01L2924/19107 ,  H01L2224/131 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/73204 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2924/00

摘要： A semiconductor device may include a seed structure on a complex structure. The seed structure may include a first barrier layer, a first seed layer on the first barrier layer, a second barrier layer on the first seed layer, and a second seed layer on the second barrier layer. The second barrier layer may contact a side surface of at least one of the first barrier layer and the first seed layer. An electrode layer may be disposed on the seed structure.

公开(公告)号：US20230402424A1

公开(公告)日：2023-12-14

申请号：US18207475

申请日：2023-06-08

申请人： Samsung Electronics Co., Ltd.

发明人： Yongjin Park

IPC分类号： H01L23/00 ,  H01L25/18 ,  H10B80/00 ,  H01L21/56

CPC分类号： H01L24/73 ,  H01L24/05 ,  H01L25/18 ,  H10B80/00 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L21/56 ,  H01L24/26 ,  H01L24/83 ,  H01L24/92 ,  H01L24/13 ,  H01L2224/0557 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05684 ,  H01L2224/05669 ,  H01L2224/05644 ,  H01L2224/05554 ,  H01L24/06 ,  H01L2224/06181 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/13155 ,  H01L2224/13147 ,  H01L2224/13164 ,  H01L2224/13169 ,  H01L2224/13144 ,  H01L2224/13111 ,  H01L2224/13109 ,  H01L2224/13113 ,  H01L2224/1312 ,  H01L2224/13139 ,  H01L2224/13118 ,  H01L2224/13116 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2224/83201 ,  H01L2224/83365 ,  H01L2224/16059 ,  H01L2224/81201 ,  H01L2224/16227 ,  H01L2924/3841 ,  H01L2224/26122 ,  H01L2224/06131 ,  H01L2224/9211 ,  H01L2224/81815

摘要： A semiconductor package includes: a base chip including a substrate, an upper protective layer disposed on the substrate, an upper pad disposed on the upper protective layer, and a groove disposed adjacent to the upper pad and in which the upper protective layer is recessed; a semiconductor chip including a connection pad disposed on the upper pad, the semiconductor chip being mounted on the base chip; a bump disposed on the upper pad, and electrically connecting the base chip and the semiconductor chip; and an adhesive film disposed between the base chip and the semiconductor chip, and fixing the semiconductor chip on the base chip, wherein the adhesive film is configured to fill the groove.

公开(公告)号：US20230352371A1

公开(公告)日：2023-11-02

申请号：US17802147

申请日：2021-04-30

申请人： ROHM CO., LTD.

发明人： Yuki NAKANO

IPC分类号： H01L23/485 ,  H01L29/423 ,  H01L29/78 ,  H01L27/12 ,  H01L29/739 ,  H01L23/00

CPC分类号： H01L23/485 ,  H01L29/4238 ,  H01L29/7815 ,  H01L27/1207 ,  H01L29/7813 ,  H01L29/7396 ,  H01L24/05 ,  H01L24/06 ,  H01L24/03 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/45144 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/48245 ,  H01L2224/4847 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05553 ,  H01L2224/05551 ,  H01L2224/0603 ,  H01L2224/06051 ,  H01L2224/06181 ,  H01L2224/05584 ,  H01L2224/05666 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05644 ,  H01L2224/05638 ,  H01L2924/01014 ,  H01L2224/05686 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/04941 ,  H01L2224/05573 ,  H01L2224/05582 ,  H01L2924/10272 ,  H01L2924/13055 ,  H01L2924/13091

摘要： A semiconductor device includes a semiconductor layer which has a main surface and includes SiC as a main component, a gate structure which is formed in the main surface, an insulating layer which is formed on the main surface such as to cover the gate structure, a gate main electrode which is arranged on the insulating layer and electrically connected to the gate structure, and a gate pad electrode which includes a connecting portion which is arranged on the gate main electrode such as to be connected to the gate main electrode and connected to the gate main electrode with a first area in plan view and an electrode surface having a second area exceeding the first area in plan view.

公开(公告)号：US20230326899A1

公开(公告)日：2023-10-12

申请号：US18187386

申请日：2023-03-21

申请人： Qorvo US, Inc.

发明人： Yinbao Yang ,  Xiaokang Huang ,  Kenneth Frazee

IPC分类号： H01L23/00

CPC分类号： H01L24/32 ,  H01L24/05 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/05147 ,  H01L2224/05144 ,  H01L2224/0508 ,  H01L2224/05155 ,  H01L2224/05172 ,  H01L2224/05169 ,  H01L2224/05186 ,  H01L2924/05 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/32503 ,  H01L2224/32506 ,  H01L2924/01322 ,  H01L2924/0133 ,  H01L2924/10272 ,  H01L2924/10253 ,  H01L2924/1033 ,  H01L2924/10329 ,  H01L2224/83815 ,  H01L2224/8381 ,  H01L2224/32245 ,  H01L2924/014

摘要： The present disclosure relates to a microelectronics package with significantly reduced delamination/cracking at solder joints, and a process for making the same. The disclosed microelectronics package includes a carrier, a solder joint region over the carrier, a top intermetallic (IMC) layer over the solder joint region, and a device die over the top IMC layer. Herein, the device die includes a substrate, an active device over the substrate, a top barrier layer underneath the substrate, and a backside metal layer vertically between the top IMC layer and the top barrier layer. The backside metal layer is formed of gold (Au) with a thickness at least 0.5 μm. The top IMC layer comprises gold nickel tin (AuNiSn) or gold platinum tin (AuPtSn), and the solder joint region comprises an Au-rich gold-tin (Au5Sn) and gold-tin (AuSn) eutectic mixture.

公开(公告)号：US20180269171A1

公开(公告)日：2018-09-20

申请号：US15918405

申请日：2018-03-12

申请人： ABLIC Inc.

发明人： Shinjiro KATO ,  Masaru AKINO

IPC分类号： H01L23/00

CPC分类号： H01L24/05 ,  H01L23/3192 ,  H01L24/03 ,  H01L2224/02123 ,  H01L2224/02166 ,  H01L2224/02206 ,  H01L2224/02215 ,  H01L2224/0239 ,  H01L2224/03011 ,  H01L2224/03019 ,  H01L2224/03826 ,  H01L2224/0391 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/85205 ,  H01L2224/85375 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01042 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/0132 ,  H01L2924/0133

摘要： A semiconductor device includes a substrate, a wiring formed on the substrate, an anti-reflection film of titanium nitride formed on the wiring, and a silicon oxide film formed on the anti-reflection film. A pad portion which exposes the wiring is formed at a place where a first opening portion and a second opening portion overlap with each other. A metal nitride region containing fewer dangling bonds is formed from a metal nitride film containing fewer dangling bonds than in the anti-reflection film in at least a part of one or both of an opposed surface of the anti-reflection film which faces the silicon oxide film above the anti-reflection film, and an exposed surface of the anti-reflection film which is exposed in the second opening portion.

公开(公告)号：US20180247908A1

公开(公告)日：2018-08-30

申请号：US15967820

申请日：2018-05-01

申请人： INTEL CORPORATION

发明人： Munehiro Toyama ,  Siew Fong Tai ,  Kian Sin Sim ,  Charavanakumara Gurumurthy ,  Tamil Selvy Selvamuniandy

IPC分类号： H01L23/00 ,  H05K3/24

CPC分类号： H01L24/13 ,  H01L24/03 ,  H01L24/05 ,  H01L24/10 ,  H01L24/11 ,  H01L24/14 ,  H01L24/29 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/05599 ,  H01L2224/11464 ,  H01L2224/13 ,  H01L2224/13017 ,  H01L2224/13084 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13564 ,  H01L2224/13611 ,  H01L2224/13639 ,  H01L2224/13647 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/35 ,  H05K3/244 ,  H01L2924/00

摘要： A method and device for input/output connections is provided. Devices and methods for connection structure are shown with improved mechanical properties such as hardness and abrasion resistance. Land grid array structures are provided that are less expensive to manufacture due to reductions in material cost such as gold. Ball grid array structures are provided with improved resistance to corrosion during fabrication. Ball grid array structures are also provided with improved mechanical properties resulting in improved shock testing results.