公开(公告)号：US08278207B2

公开(公告)日：2012-10-02

申请号：US12688557

申请日：2010-01-15

申请人： Jin-Ho Park ,  Gil-Heyun Choi ,  Byung-Lyul Park ,  Jong-Myeong Lee ,  Zung-Sun Choi ,  Hye-Kyung Jung

发明人： Jin-Ho Park ,  Gil-Heyun Choi ,  Byung-Lyul Park ,  Jong-Myeong Lee ,  Zung-Sun Choi ,  Hye-Kyung Jung

IPC分类号： H01L21/4763

CPC分类号： H01L21/76846 ,  H01L21/28562 ,  H01L21/76856 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L27/10855 ,  H01L27/11521 ,  H01L27/11524 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device can include an insulation layer on that is on a substrate on which a plurality of lower conductive structures are formed, where the insulation layer has an opening. A barrier layer is on a sidewall and a bottom of the opening of the insulation layer, where the barrier layer includes a first barrier layer in which a constituent of a first deoxidizing material is richer than a metal material in the first barrier layer and a second barrier layer in which a metal material in the second barrier layer is richer than a constituent of a second deoxidizing material. An interconnection is in the opening of which the sidewall and the bottom are covered with the barrier layer, the interconnection is electrically connected to the lower conductive structure.

摘要翻译： 半导体器件可以包括在其上形成有多个下导电结构的基板上的绝缘层，其中绝缘层具有开口。 阻挡层位于绝缘层的开口的侧壁和底部上，其中阻挡层包括第一阻挡层，第一脱氧材料的成分比第一阻挡层中的金属材料更富，第二阻隔层 阻挡层，其中第二阻挡层中的金属材料比第二脱氧材料的成分更富。 互连在其开口中，侧壁和底部被阻挡层覆盖，互连电连接到下导电结构。

公开(公告)号：US08021980B2

公开(公告)日：2011-09-20

申请号：US12753196

申请日：2010-04-02

申请人： Youngseok Kim ,  Jong-ho Yun ,  Kwang-jin Moon ,  Gil-heyun Choi ,  Jong-myeong Lee ,  Zung-sun Choi ,  Hye-Kyung Jung

发明人： Youngseok Kim ,  Jong-ho Yun ,  Kwang-jin Moon ,  Gil-heyun Choi ,  Jong-myeong Lee ,  Zung-sun Choi ,  Hye-Kyung Jung

IPC分类号： H01L21/44

CPC分类号： H01L21/7684 ,  H01L21/02068 ,  H01L21/02074 ,  H01L21/76849 ,  H01L21/76861 ,  H01L21/76883

摘要： Provided are methods of manufacturing semiconductor devices. The methods may include forming a first insulation layer on a semiconductor substrate, forming a groove by selectively etching the first insulation layer, filling the groove with a copper-based conductive layer, depositing a cobalt-based capping layer on the copper-based conductive layer by electroless plating, and cleansing the first insulation layer and the cobalt-based capping layer using a basic cleansing solution.

摘要翻译： 提供制造半导体器件的方法。 所述方法可以包括在半导体衬底上形成第一绝缘层，通过选择性蚀刻第一绝缘层形成沟槽，用铜基导电层填充沟槽，在铜基导电层上沉积钴基覆盖层 通过无电解电镀，并且使用基本清洁溶液清洁第一绝缘层和钴基覆盖层。

公开(公告)号：US20100255676A1

公开(公告)日：2010-10-07

申请号：US12753196

申请日：2010-04-02

申请人： Youngseok Kim ,  Jong-ho Yun ,  Kwang-jin Moon ,  Gil-heyun Choi ,  Jong-myeong Lee ,  Zung-sun Choi ,  Hye-Kyung Jung

发明人： Youngseok Kim ,  Jong-ho Yun ,  Kwang-jin Moon ,  Gil-heyun Choi ,  Jong-myeong Lee ,  Zung-sun Choi ,  Hye-Kyung Jung

IPC分类号： H01L21/3205

CPC分类号： H01L21/7684 ,  H01L21/02068 ,  H01L21/02074 ,  H01L21/76849 ,  H01L21/76861 ,  H01L21/76883

摘要： Provided are methods of manufacturing semiconductor devices. The methods may include forming a first insulation layer on a semiconductor substrate, forming a groove by selectively etching the first insulation layer, filling the groove with a copper-based conductive layer, depositing a cobalt-based capping layer on the copper-based conductive layer by electroless plating, and cleansing the first insulation layer and the cobalt-based capping layer using a basic cleansing solution.

摘要翻译： 提供制造半导体器件的方法。 所述方法可以包括在半导体衬底上形成第一绝缘层，通过选择性蚀刻第一绝缘层形成沟槽，用铜基导电层填充沟槽，在铜基导电层上沉积钴基覆盖层 通过无电解电镀，并且使用基本清洁溶液清洁第一绝缘层和钴基覆盖层。

公开(公告)号：US08969196B2

公开(公告)日：2015-03-03

申请号：US13616910

申请日：2012-09-14

申请人： Jin-Ho Park ,  Gil-Heyun Choi ,  Byung-Lyul Park ,  Jong-Myeong Lee ,  Zung-Sun Choi ,  Hye-Kyung Jung

发明人： Jin-Ho Park ,  Gil-Heyun Choi ,  Byung-Lyul Park ,  Jong-Myeong Lee ,  Zung-Sun Choi ,  Hye-Kyung Jung

IPC分类号： H01L21/768 ,  H01L21/4763 ,  H01L21/285 ,  H01L23/532 ,  H01L27/115 ,  H01L27/108

CPC分类号： H01L21/76846 ,  H01L21/28562 ,  H01L21/76856 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L27/10855 ,  H01L27/11521 ,  H01L27/11524 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device can include an insulation layer on that is on a substrate on which a plurality of lower conductive structures are formed, where the insulation layer has an opening. A barrier layer is on a sidewall and a bottom of the opening of the insulation layer, where the barrier layer includes a first barrier layer in which a constituent of a first deoxidizing material is richer than a metal material in the first barrier layer and a second barrier layer in which a metal material in the second barrier layer is richer than a constituent of a second deoxidizing material. An interconnection is in the opening of which the sidewall and the bottom are covered with the barrier layer, the interconnection is electrically connected to the lower conductive structure.

摘要翻译： 半导体器件可以包括在其上形成有多个下导电结构的基板上的绝缘层，其中绝缘层具有开口。 阻挡层位于绝缘层的开口的侧壁和底部上，其中阻挡层包括第一阻挡层，第一脱氧材料的成分比第一阻挡层中的金属材料更富，第二阻隔层 阻挡层，其中第二阻挡层中的金属材料比第二脱氧材料的成分更富。 互连在其开口中，侧壁和底部被阻挡层覆盖，互连电连接到下导电结构。

公开(公告)号：US20100181671A1

公开(公告)日：2010-07-22

申请号：US12688557

申请日：2010-01-15

申请人： Jin-Ho Park ,  Gil-Heyun Choi ,  Byung-Lyul Park ,  Jong-Myeong Lee ,  Zung-Sun Choi ,  Hye-Kyung Jung

发明人： Jin-Ho Park ,  Gil-Heyun Choi ,  Byung-Lyul Park ,  Jong-Myeong Lee ,  Zung-Sun Choi ,  Hye-Kyung Jung

IPC分类号： H01L23/532 ,  H01L23/522 ,  H01L21/768

CPC分类号： H01L21/76846 ,  H01L21/28562 ,  H01L21/76856 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L27/10855 ,  H01L27/11521 ,  H01L27/11524 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device can include an insulation layer on that is on a substrate on which a plurality of lower conductive structures are formed, where the insulation layer has an opening. A barrier layer is on a sidewall and a bottom of the opening of the insulation layer, where the barrier layer includes a first barrier layer in which a constituent of a first deoxidizing material is richer than a metal material in the first barrier layer and a second barrier layer in which a metal material in the second barrier layer is richer than a constituent of a second deoxidizing material. An interconnection is in the opening of which the sidewall and the bottom are covered with the barrier layer, the interconnection is electrically connected to the lower conductive structure.

摘要翻译： 半导体器件可以包括在其上形成有多个下导电结构的基板上的绝缘层，其中绝缘层具有开口。 阻挡层位于绝缘层的开口的侧壁和底部上，其中阻挡层包括第一阻挡层，第一脱氧材料的成分比第一阻挡层中的金属材料更富，第二阻隔层 阻挡层，其中第二阻挡层中的金属材料比第二脱氧材料的成分更富。 互连在其开口中，侧壁和底部被阻挡层覆盖，互连电连接到下导电结构。

公开(公告)号：US08696921B2

公开(公告)日：2014-04-15

申请号：US12687987

申请日：2010-01-15

申请人： Jin-Ho Park ,  Gil-Heyun Choi ,  Byung-Lyul Park ,  Jong-Myeong Lee ,  Zung-Sun Choi ,  Hye-Kyung Jung

发明人： Jin-Ho Park ,  Gil-Heyun Choi ,  Byung-Lyul Park ,  Jong-Myeong Lee ,  Zung-Sun Choi ,  Hye-Kyung Jung

IPC分类号： H01L21/302

CPC分类号： H01L21/6719 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76861 ,  H01L21/76877

摘要： In a method of manufacturing a semiconductor device, a substrate is loaded to a process chamber having, unit process sections in which unit processes are performed, respectively. The unit processes are performed on the substrate independently from one another at the unit process sections under a respective process pressure. The substrate sequentially undergoes the unit processes at the respective unit process section of the process chamber. Cleaning processes are individually performed to the unit process sections, respectively, when the substrate is transferred from each of the unit process sections and no substrate is positioned at the unit process sections. Accordingly, the process defects of the process units may be sufficiently prevented and the operation period of the manufacturing apparatus is sufficiently elongated.

摘要翻译： 在制造半导体器件的方法中，将衬底装载到具有分别执行单元处理的单元处理部的处理室。 单元处理在相应的处理压力下在单元处理部分彼此独立地在衬底上进行。 基板在处理室的各单元处理部分依次进行单元处理。 当从每个单元处理部分传送基板并且没有基板位于单元处理部分时，分别对单元处理部分进行清洁处理。 因此，可以充分防止处理单元的处理缺陷，并且制造装置的操作周期充分延长。

公开(公告)号：US20130005141A1

公开(公告)日：2013-01-03

申请号：US13616910

申请日：2012-09-14

申请人： Jin-Ho Park ,  Gil-Heyun Choi ,  Byung-Lyul Park ,  Jong-Myeong Lee ,  Zung-Sun Choi ,  Hye-Kyung Jung

发明人： Jin-Ho Park ,  Gil-Heyun Choi ,  Byung-Lyul Park ,  Jong-Myeong Lee ,  Zung-Sun Choi ,  Hye-Kyung Jung

IPC分类号： H01L21/768

CPC分类号： H01L21/76846 ,  H01L21/28562 ,  H01L21/76856 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L27/10855 ,  H01L27/11521 ,  H01L27/11524 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device can include an insulation layer on that is on a substrate on which a plurality of lower conductive structures are formed, where the insulation layer has an opening. A barrier layer is on a sidewall and a bottom of the opening of the insulation layer, where the barrier layer includes a first barrier layer in which a constituent of a first deoxidizing material is richer than a metal material in the first barrier layer and a second barrier layer in which a metal material in the second barrier layer is richer than a constituent of a second deoxidizing material. An interconnection is in the opening of which the sidewall and the bottom are covered with the barrier layer, the interconnection is electrically connected to the lower conductive structure.

摘要翻译： 半导体器件可以包括在其上形成有多个下导电结构的基板上的绝缘层，其中绝缘层具有开口。 阻挡层位于绝缘层的开口的侧壁和底部上，其中阻挡层包括第一阻挡层，第一脱氧材料的成分比第一阻挡层中的金属材料更富，第二阻隔层 阻挡层，其中第二阻挡层中的金属材料比第二脱氧材料的成分更富。 互连在其开口中，侧壁和底部被阻挡层覆盖，互连电连接到下导电结构。

公开(公告)号：US20100184294A1

公开(公告)日：2010-07-22

申请号：US12687987

申请日：2010-01-15

申请人： Jin-Ho Park ,  Gil-Heyun CHOI ,  Byung-Lyul PARK ,  Jong-Myeong LEE ,  Zung-Sun CHOI ,  Hye-Kyung JUNG

发明人： Jin-Ho Park ,  Gil-Heyun CHOI ,  Byung-Lyul PARK ,  Jong-Myeong LEE ,  Zung-Sun CHOI ,  Hye-Kyung JUNG

IPC分类号： H01L21/311 ,  B08B7/00

CPC分类号： H01L21/6719 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76861 ,  H01L21/76877

摘要： In a method of manufacturing a semiconductor device, a substrate is loaded to a process chamber having, unit process sections in which unit processes are performed, respectively. The unit processes are performed on the substrate independently from one another at the unit process sections under a respective process pressure. The substrate sequentially undergoes the unit processes at the respective unit process section of the process chamber. Cleaning processes are individually performed to the unit process sections, respectively, when the substrate is transferred from each of the unit process sections and no substrate is positioned at the unit process sections. Accordingly, the process defects of the process units may be sufficiently prevented and the operation period of the manufacturing apparatus is sufficiently elongated.

摘要翻译： 在制造半导体器件的方法中，将衬底装载到具有分别执行单元处理的单元处理部的处理室。 单元处理在相应的处理压力下在单元处理部分彼此独立地在衬底上进行。 基板在处理室的各单元处理部分依次进行单元处理。 当从每个单元处理部分传送基板并且没有基板位于单元处理部分时，分别对单元处理部分进行清洁处理。 因此，可以充分防止处理单元的处理缺陷，并且制造装置的操作周期充分延长。