BOOST CONVERTER WITH A PULSE FREQUENCY MODULATION MODE FOR OPERATING ABOVE AN AUDIBLE FREQUENCY
    2.
    发明申请
    BOOST CONVERTER WITH A PULSE FREQUENCY MODULATION MODE FOR OPERATING ABOVE AN AUDIBLE FREQUENCY 有权
    具有脉冲频率调制模式的升压转换器,可操作在可调谐频率上

    公开(公告)号:US20150115813A1

    公开(公告)日:2015-04-30

    申请号:US14503037

    申请日:2014-09-30

    Applicant: Apple Inc.

    Abstract: The embodiments discussed herein relate to systems, methods, and apparatus for executing a pulse frequency modulation (PFM) mode of a boost converter in order to ensure that a switching frequency of the boost converter is a above an audible frequency threshold. In this way, a user operating a display device that is controlled by the boost converter will not be disturbed by audible noises generated at the display device. The PFM mode enforces an audible frequency threshold by using control circuitry designed to increase or decrease the frequency of a pulse signal depending on how the frequency of the pulse signal changes over time. The control circuitry can apply an additional load to the boost converter in order to increase the frequency of the pulse signal when the frequency is approaching the audible frequency threshold.

    Abstract translation: 本文讨论的实施例涉及用于执行升压转换器的脉冲频率调制(PFM)模式的系统,方法和装置,以便确保升压转换器的开关频率高于可听频率阈值。 以这种方式,操作由升压转换器控制的显示装置的用户不会被在显示装置处产生的可听见的噪声所扰乱。 PFM模式通过使用控制电路来实施可听频率阈值,该控制电路旨在根据脉冲信号的频率如何随时间而变化来增加或减少脉冲信号的频率。 控制电路可以向升压转换器施加额外的负载,以便在频率接近可听频率阈值时增加脉冲信号的频率。

    BACKLIGHT DRIVER CHIP INCORPORATING A PHASE LOCK LOOP (PLL) WITH PROGRAMMABLE OFFSET/DELAY AND SEAMLESS OPERATION
    3.
    发明申请
    BACKLIGHT DRIVER CHIP INCORPORATING A PHASE LOCK LOOP (PLL) WITH PROGRAMMABLE OFFSET/DELAY AND SEAMLESS OPERATION 有权
    背光驱动器芯片可编程相位锁定环(PLL),具有可编程偏移/延迟和无缝操作

    公开(公告)号:US20150116380A1

    公开(公告)日:2015-04-30

    申请号:US14502945

    申请日:2014-09-30

    Applicant: Apple Inc.

    Abstract: The embodiments discussed herein relate to systems, methods, and apparatus for synchronizing a pulse width modulation (PWM) dimming clock signal with a frame rate signal, line sync signal, and/or a horizontal sync signal of a display device. The PWM dimming clock signal can be generated by a synchronization block having a programmable offset/delay. The programmable offset/delay can control the offset or phase difference between an input and an output clock signal of the synchronization block. Depending on the clock rate of PWM dimming and/or panel resolution, the phase/offset delay can be adjusted to achieve the optimum front of screen performance. Additionally, an input clock generator/missing pulse detection block can output a programmed clock signal to the synchronization block in case of a missing external clock, or insert a pulse when there is a missing pulse detected, thereby providing an un-interrupted input clock signal to the PWM generator.

    Abstract translation: 本文讨论的实施例涉及用于使脉宽调制(PWM)调光时钟信号与显示设备的帧速率信号,行同步信号和/或水平同步信号同步的系统,方法和装置。 PWM调光时钟信号可以由具有可编程偏移/延迟的同步块产生。 可编程偏移/延迟可以控制同步块的输入和输出时钟信号之间的偏移或相位差。 根据PWM调光和/或面板分辨率的时钟频率,可以调整相位/偏移延迟,以实现屏幕性能的最佳化。 此外,在缺少外部时钟的情况下,输入时钟发生器/丢失脉冲检测块可以将编程的时钟信号输出到同步块,或者当检测到缺失脉冲时插入脉冲,从而提供未中断的输入时钟信号 到PWM发生器。

    LOCAL DISPLAY BACKLIGHTING SYSTEMS AND METHODS

    公开(公告)号:US20190132915A1

    公开(公告)日:2019-05-02

    申请号:US16232913

    申请日:2018-12-26

    Applicant: Apple Inc.

    Abstract: Aspects of the subject technology relate to display of an electronic device. The display includes a backlight unit having a voltage source, a string of light-emitting diodes and a bypass switch for each light-emitting diode in the string. The string of light-emitting diodes can receive, at a first end, a supply voltage from the voltage source. The bypass switch for each light-emitting diode is controllable to pulse-width-modulate that light-emitting diode. The headroom voltage feedback circuit is coupled to a second end of the string.

    LOCAL DISPLAY BACKLIGHTING SYSTEMS AND METHODS

    公开(公告)号:US20190045591A1

    公开(公告)日:2019-02-07

    申请号:US15789885

    申请日:2017-10-20

    Applicant: Apple Inc.

    Abstract: Aspects of the subject technology relate to control circuitry for light-emitting diodes. The control circuitry includes a two-dimensional light-emitting diode (LED) array. The control circuitry may include a single LED array operable by a common driver or multiple LED arrays each operable by a dedicated LED matrix driver. Each matrix driver may receive a synchronization signal from a common controller and may include a programmable phase lock loop (PLL) to synchronize each matrix driver to the synchronization signal. The LED array may include multiple strings of LEDs mounted in series along the string. Each LED in each string may include a bypass switch operable to modify the current through that LED by pulse-width modulation.

    PFM SCHEME FOR BOOST AND FLYBACK CONVERTER IN LED BACKLIGHT APPLICATION
    7.
    发明申请
    PFM SCHEME FOR BOOST AND FLYBACK CONVERTER IN LED BACKLIGHT APPLICATION 有权
    在LED背光应用中的PFM方案用于升压和回波转换器

    公开(公告)号:US20160345395A1

    公开(公告)日:2016-11-24

    申请号:US15069724

    申请日:2016-03-14

    Applicant: Apple Inc.

    CPC classification number: H05B33/0815 G09G3/3406 G09G2330/06 H05B33/086

    Abstract: This application relates to systems, methods, and apparatus for controlling a switching frequency of a boost or flyback converter to be above an audible frequency range when operating the boost or flyback converter in a pulse frequency modulation (PFM) mode. The boost or flyback converter uses one or more switches for converting power for a display panel. In order to boost the switching frequency when operating in the PFM mode, the boost or flyback converter can selectively implement certain current and/or voltage limits for pulses that are generated as a result of the switching. The current and/or voltage limits can be set according to a load of the boost or flyback converter, and a correspondence between the current and/or voltage limits and the loads can be stored in a lookup table accessible to the boost or flyback converter.

    Abstract translation: 本申请涉及用于在脉冲频率调制(PFM)模式下操作升压或反激转换器时控制升压或反激式转换器的开关频率高于可听频率范围的系统,方法和装置。 升压或反激转换器使用一个或多个开关来转换显示面板的功率。 为了在PFM模式下工作时提高开关频率,升压或反激式转换器可以选择性地为由于切换而产生的脉冲实现一定的电流和/或电压限制。 可以根据升压或反激式转换器的负载来设置电流和/或电压限制,并且可以将电流和/或电压极限与负载之间的对应关系存储在升压或反激转换器可访问的查找表中。

Patent Agency Ranking