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    Methods and apparatus for filling a feature disposed in a substrate
    1.
    发明授权
    Methods and apparatus for filling a feature disposed in a substrate 有权

    公开(公告)号：US10950500B2

    公开(公告)日：2021-03-16

    申请号：US15971573

    申请日：2018-05-04

    Applicant: APPLIED MATERIALS, INC.

    Inventor： Roey Shaviv ,  Xikun Wang ,  Ismail Emesh ,  Jianxin Lei ,  Wenting Hou

    IPC: H01L21/768 ,  H01L21/67 ,  H01L21/285 ,  H01L21/3213 ,  H01L21/02 ,  H01L23/532

    Abstract: Embodiments of methods and apparatus for filling a feature disposed in a substrate are disclosed herein. In some embodiments, a method for filling a feature disposed in a substrate includes (a) depositing a metal within the feature to a first predetermined thickness in a first process chamber; (b) depositing the metal within the feature to a second predetermined thickness in a second process chamber; (c) etching the metal deposited in (b) to remove an overhang of the metal at a top of the feature in a third process chamber different than the first and second process chambers; and (d) subsequent to (c), filling the feature with the metal in a fourth process chamber different than the first and third process chambers.

    ELECTROCHEMICAL PLATING METHODS
    3.
    发明申请
    ELECTROCHEMICAL PLATING METHODS 审中-公开
    电化学镀方法

    公开(公告)号：US20150357195A1

    公开(公告)日：2015-12-10

    申请号：US14825921

    申请日：2015-08-13

    Applicant: APPLIED Materials, Inc.

    Inventor： John W. Lam ,  Ismail Emesh ,  Roey Shaviv

    IPC: H01L21/288 ,  C25D7/12 ,  H01L21/768

    CPC classification number: H01L21/2885 ,  C23C18/1653 ,  C25D3/12 ,  C25D5/10 ,  C25D5/14 ,  C25D5/50 ,  C25D7/00 ,  C25D7/123 ,  H01L21/3247 ,  H01L21/76873 ,  H01L21/76879 ,  H01L21/76882 ,  H01L21/76883 ,  H01L23/53257 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: An electrochemical process for applying a conductive film onto a substrate having a seed layer includes placing the substrate into contact with an electrochemical plating bath containing cobalt or nickel, with the plating bath having pH of 4.0 to 9.0. Electric current is conducted through the bath to the substrate. The cobalt or nickel ions in the bath deposit onto the seed layer. The plating bath may contain cobalt chloride and glycine. The electric current may range from 1-50 milli-ampere per square cm. After completion of the electrochemical process, the substrate may be removed from the plating bath, rinsed and dried, and then annealed at a temperature of 200 to 400 C to improve the material properties and reduce seam line defects. The plating and anneal process may be performed through multiple cycles.

    Abstract translation: 用于将导电膜施加到具有种子层的基底上的电化学方法包括将基底与包含钴或镍的电化学镀浴接触，镀浴的pH为4.0至9.0。 电流通过熔池传导到基板。 浴中的钴或镍离子沉积到种子层上。 电镀浴可能含有氯化钴和甘氨酸。 电流可以为1-50毫安每平方厘米。 电化学工艺完成后，可以将基板从镀液中除去，漂洗并干燥，然后在200-400℃的温度下退火，以改善材料性能并减少接缝线缺陷。 电镀和退火工艺可以通过多个循环进行。

    Electrochemical plating methods
    5.
    发明授权
    Electrochemical plating methods 有权
    电化学镀方法

    公开(公告)号：US09496145B2

    公开(公告)日：2016-11-15

    申请号：US14219940

    申请日：2014-03-19

    Applicant: APPLIED Materials, Inc.

    Inventor： John W. Lam ,  Ismail Emesh ,  Roey Shaviv

    IPC: H01L21/44 ,  H01L21/288 ,  H01L21/768 ,  C25D7/12 ,  H01L21/324 ,  H01L23/532

    CPC classification number: H01L21/2885 ,  C23C18/1653 ,  C25D3/12 ,  C25D5/10 ,  C25D5/14 ,  C25D5/50 ,  C25D7/00 ,  C25D7/123 ,  H01L21/3247 ,  H01L21/76873 ,  H01L21/76879 ,  H01L21/76882 ,  H01L21/76883 ,  H01L23/53257 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: An electrochemical process for applying a conductive film onto a substrate having a seed layer includes placing the substrate into contact with an electrochemical plating bath containing cobalt or nickel, with the plating bath having pH of 4.0 to 9.0. Electric current is conducted through the bath to the substrate. The cobalt or nickel ions in the bath deposit onto the seed layer. The plating bath may contain cobalt chloride and glycine. The electric current may range from 1-50 milli-ampere per square cm. After completion of the electrochemical process, the substrate may be removed from the plating bath, rinsed and dried, and then annealed at a temperature of 200 to 400 C to improve the material properties and reduce seam line defects. The plating and anneal process may be performed through multiple cycles.

    Abstract translation: 用于将导电膜施加到具有种子层的基底上的电化学方法包括将基底与包含钴或镍的电化学镀浴接触，镀浴的pH为4.0至9.0。 电流通过熔池传导到基板。 浴中的钴或镍离子沉积到种子层上。 电镀浴可能含有氯化钴和甘氨酸。 电流可以为1-50毫安每平方厘米。 电化学工艺完成后，可以将基板从镀液中除去，漂洗并干燥，然后在200-400℃的温度下退火，以改善材料性能并减少接缝线缺陷。 电镀和退火工艺可以通过多个循环进行。

    Methods and apparatus for hybrid feature metallization
    6.
    发明授权
    Methods and apparatus for hybrid feature metallization 有权

    公开(公告)号：US11024537B2

    公开(公告)日：2021-06-01

    申请号：US16598878

    申请日：2019-10-10

    Applicant: APPLIED MATERIALS, INC.

    Inventor： Roey Shaviv ,  Ismail Emesh ,  Xikun Wang

    IPC: H01L21/768 ,  H01L21/02 ,  H01L21/3213 ,  H01L23/532

    Abstract: Methods and apparatus for forming an interconnect, including: depositing a first barrier layer upon a top surface of a via and a top surface of a trench; filling the via with a first metal, wherein the first metal completely fills the via and forms a metal layer within the trench; etching the metal layer within the trench to expose dielectric sidewalls of the trench, a top surface of the via, and a dielectric bottom of the trench; depositing a second barrier layer upon the dielectric sidewalls, top surface of the via, and the dielectric bottom of the trench; and filling the trench with a second metal different than the first metal.

    METHODS AND APPARATUS FOR HYBRID FEATURE METALLIZATION
    8.
    发明申请
    METHODS AND APPARATUS FOR HYBRID FEATURE METALLIZATION 有权

    公开(公告)号：US20210043506A1

    公开(公告)日：2021-02-11

    申请号：US16598878

    申请日：2019-10-10

    Applicant: APPLIED MATERIALS, INC.

    Inventor： Roey Shaviv ,  Ismail Emesh ,  Xikun Wang

    IPC: H01L21/768 ,  H01L21/02 ,  H01L21/3213

    Abstract: Methods and apparatus for forming an interconnect, including: depositing a first barrier layer upon a top surface of a via and a top surface of a trench; filling the via with a first metal, wherein the first metal completely fills the via and forms a metal layer within the trench; etching the metal layer within the trench to expose dielectric sidewalls of the trench, a top surface of the via, and a dielectric bottom of the trench; depositing a second barrier layer upon the dielectric sidewalls, top surface of the via, and the dielectric bottom of the trench; and filling the trench with a second metal different than the first metal.

    Enhanced plating bath and additive chemistries for cobalt plating
    9.
    发明授权
    Enhanced plating bath and additive chemistries for cobalt plating 有权

    公开(公告)号：US11118278B2

    公开(公告)日：2021-09-14

    申请号：US16656026

    申请日：2019-10-17

    Applicant: Applied Materials, Inc.

    Inventor： Ismail Emesh ,  Roey Shaviv ,  Chris Pabelico

    IPC: C25D5/00 ,  C25D5/02 ,  C25D3/18 ,  C25D7/12

    Abstract: Implementations of the disclosure may include methods of electroplating features formed on a semiconductor device, such as the trenches and vias formed by single or dual Damascene processes using a cobalt plating bath. The cobalt electroplating bath may contain “additive packages” or “additive systems” that include a combination of additives in certain ratios that facilitate the metal filling of high aspect ratio sub-micrometer features. Implementations of the disclosure provide new cobalt plating bath methods and chemistries and that include alkyl modified imidazoles, imidazolines, and imidazolidines suppressor compounds.

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