公开(公告)号：US20250006489A1

公开(公告)日：2025-01-02

申请号：US18754246

申请日：2024-06-26

Applicant: ASM IP Holding B.V.

Inventor： Ranjit Borude ,  Bablu Mukherjee ,  René Henricus Jozef Vervuurt ,  Viljami Pore ,  Takayoshi Tsutsumi ,  Nobuyoshi Kobayashi ,  Masaru Hori

IPC: H01L21/02 ,  C23C16/30 ,  C23C16/32 ,  C23C16/34 ,  C23C16/40 ,  C23C16/455 ,  C23C16/517 ,  H01J37/32

Abstract: The disclosure relates to methods of depositing a material comprising silicon in a gap. The method comprises providing a substrate, the substrate comprising the gap, wherein the gap comprises an inner surface and exposing the substrate to a first plasma having high ion energy to modify predetermined areas of the gap inner surface. The method further comprises exposing the substrate to a second plasma having low ion energy to passivate the modified areas of the gap surface to form passivated modified areas on the gap surface and contacting the substrate with a vapor-phase silicon precursor to chemisorb the silicon precursor on unmodified areas of the gap for depositing material comprising silicon on the unmodified areas. The current disclosure further relates to a method of controlling chemisorption of a vapor-phase silicon precursor on a substrate, and to a semiconductor processing assembly for performing the methods according to the current disclosure.

公开(公告)号：US12027365B2

公开(公告)日：2024-07-02

申请号：US17530983

申请日：2021-11-19

Applicant: ASM IP Holding B.V.

Inventor： Zecheng Liu ,  Sunja Kim ,  Viljami Pore ,  Jia Li Yao ,  Ranjit Borude ,  Bablu Mukherjee ,  René Henricus Jozef Vervuurt ,  Takayoshi Tsutsumi ,  Nobuyoshi Kobayashi ,  Masaru Hori

IPC: H01L21/02 ,  C23C16/02 ,  C23C16/40 ,  C23C16/455 ,  H01J37/32 ,  H01L21/762

CPC classification number: H01L21/02315 ,  C23C16/0254 ,  C23C16/401 ,  C23C16/45536 ,  C23C16/45553 ,  H01J37/3244 ,  H01J37/32724 ,  H01L21/02164 ,  H01L21/02219 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/76224 ,  H01J37/32082 ,  H01J2237/332

Abstract: Methods and related systems for filling a gap feature comprised in a substrate are disclosed. The methods comprise a step of providing a substrate comprising one or more gap features into a reaction chamber. The one or more gap features comprise an upper part comprising an upper surface and a lower part comprising a lower surface. The methods further comprise a step of subjecting the substrate to a plasma treatment. Thus, the upper surface is inhibited while leaving the lower surface substantially unaffected. Then, the methods comprise a step of selectively depositing a silicon-containing material on the lower surface.

公开(公告)号：US20230386792A1

公开(公告)日：2023-11-30

申请号：US18143652

申请日：2023-05-05

Applicant: ASM IP Holding B.V.

Inventor： Bablu Mukherjee ,  René Henricus Jozef Vervuurt ,  Takayoshi Tsutsumi ,  Nobuyoshi Kobayashi ,  Masaru Hori

IPC: H01J37/32 ,  H01L21/311

CPC classification number: H01J37/32357 ,  H01L21/31116 ,  H01J2237/334

Abstract: The current disclosure relates to methods of selectively etching material from a first surface of a substrate relative to a second surface of the substrate. The method includes providing the substrate having a first surface comprising an etchable material, and a second surface comprising a non-etchable material in a reaction chamber, providing hydrogen-containing plasma into the reaction chamber to reduce the etchable material to a predetermined depth; and providing remotely-generated reactive halogen species and hydrogen into the reaction chamber to selectively etch the reduced etchable material. The disclosure further relates to methods of selectively etching at least two different etchable materials simultaneously from a surface of a substrate relative to a non-etchable material on the same substrate, to methods of simultaneous differential etching of three or more etchable materials on a substrate, as well as to assemblies for processing semiconductor substrates.

公开(公告)号：US20220165569A1

公开(公告)日：2022-05-26

申请号：US17530983

申请日：2021-11-19

Applicant: ASM IP Holding B.V.

Inventor： Zecheng Liu ,  Sunja Kim ,  Viljami Pore ,  Jia Li Yao ,  Ranjit Borude ,  Bablu Mukherjee ,  René Henricus Jozef Vervuurt ,  Takayoshi Tsutsumi ,  Nobuyoshi Kobayashi ,  Masaru Hori

IPC: H01L21/02 ,  H01L21/762 ,  H01J37/32 ,  C23C16/40 ,  C23C16/02 ,  C23C16/455

Abstract: Methods and related systems for filling a gap feature comprised in a substrate are disclosed. The methods comprise a step of providing a substrate comprising one or more gap features into a reaction chamber. The one or more gap features comprise an upper part comprising an upper surface and a lower part comprising a lower surface. The methods further comprise a step of subjecting the substrate to a plasma treatment. Thus, the upper surface is inhibited while leaving the lower surface substantially unaffected. Then, the methods comprise a step of selectively depositing a silicon-containing material on the lower surface.