Semiconductor device
    1.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号:US06611010B2

    公开(公告)日:2003-08-26

    申请号:US09726582

    申请日:2000-12-01

    IPC分类号: H01L2710

    摘要: In a bit line contact section, a contact hole is formed through a silicon oxide film, and a contact plug made of a polysilicon film doped with impurities is buried in the contact hole. The silicon oxide film is formed with a wiring groove overlapping the contact hole. A bit line made of a metal film is buried in the wiring groove. The contact plug extends through the bit line, and has its upper surface substantially coplanar with an upper surface of the bit line. The contact plug is in contact with the bit line only on its side surfaces.

    摘要翻译: 在位线接触部分中,通过氧化硅膜形成接触孔,并且在接触孔中埋设由掺杂杂质的多晶硅膜制成的接触塞。 氧化硅膜形成有与接触孔重叠的布线槽。 由金属膜制成的位线埋在布线槽中。 接触插塞延伸穿过位线,并且其上表面与位线的上表面基本上共面。 接触插塞仅在其侧面与位线接触。

    Nonvolatile semiconductor memory device covered with insulating film which is hard for an oxidizing agent to pass therethrough
    5.
    发明授权
    Nonvolatile semiconductor memory device covered with insulating film which is hard for an oxidizing agent to pass therethrough 失效
    被绝缘膜覆盖的非易失性半导体存储器件,其难以氧化剂通过

    公开(公告)号:US06828624B1

    公开(公告)日:2004-12-07

    申请号:US09556777

    申请日:2000-04-25

    IPC分类号: H01L29792

    摘要: A nonvolatile semiconductor memory device includes comprises: an element isolation region being in contact with a first element region, an insulating film covering a memory cell, a peripheral transistor and the element isolation region, an inter-level insulating film provided on the surface of the insulating film, and a contact hole provided in the inter-level insulating film and the insulating film. The inter-level insulating film contains an insulator different from the insulating film. The contact hole reaches at least one of source and drain diffusion layers of the memory cell and overlaps the element isolation region. The insulating film contains an insulator different from the element isolation region and the insulating film is harder for an oxidizing agent to pass therethrough than a silicon oxide film. A surface of the insulating film is oxidized.

    摘要翻译: 非易失性半导体存储器件包括:与第一元件区域接触的元件隔离区域,覆盖存储单元的绝缘膜,外围晶体管和元件隔离区域,设置在第一元件区域的表面上的层间绝缘膜 绝缘膜和设置在层间绝缘膜和绝缘膜中的接触孔。 层间绝缘膜含有与绝缘膜不同的绝缘体。 接触孔到达存储单元的源极和漏极扩散层中的至少一个并且与元件隔离区域重叠。 绝缘膜含有与元件隔离区不同的绝缘体,绝缘膜比氧化硅膜更难以通过氧化剂。 绝缘膜的表面被氧化。

    Nonvolatile semiconductor memory device and method for manufacturing the same
    6.
    发明授权
    Nonvolatile semiconductor memory device and method for manufacturing the same 失效
    非易失性半导体存储器件及其制造方法

    公开(公告)号:US06747311B2

    公开(公告)日:2004-06-08

    申请号:US10145122

    申请日:2002-05-15

    IPC分类号: H01L29788

    摘要: A nonvolatile semiconductor memory device includes memory cell transistors, peripheral transistors, first post-oxidation films provided on the gate electrode of all of the memory cell transistors, second post-oxidation films provided on the gate electrode of all of the peripheral transistors, first insulating films provided on the first post-oxidation films and covering a side surface of the gate electrode of all of the memory cell transistors and second insulating films provided on the second post-oxidation films and covering a side surface of the gate electrode of all of the peripheral transistors. The first and second insulating films are harder for an oxidizing agent to pass therethrough than a silicon oxide film, and the first and second insulating films are oxidized.

    摘要翻译: 非易失性半导体存储器件包括存储单元晶体管,外围晶体管,设置在所有存储单元晶体管的栅电极上的第一后氧化膜,设置在所有外围晶体管的栅电极上的第二后氧化膜,第一绝缘 提供在第一后氧化膜上并覆盖所有存储单元晶体管的栅电极的侧表面的膜和设置在第二后氧化膜上的第二绝缘膜,并覆盖所有栅极电极的侧表面 外围晶体管。 第一绝缘膜和第二绝缘膜比氧化硅膜更难以通过氧化剂,并且第一和第二绝缘膜被氧化。

    Nonvolatile semiconductor memory device and method for manufacturing the same
    8.
    发明授权
    Nonvolatile semiconductor memory device and method for manufacturing the same 失效
    非易失性半导体存储器件及其制造方法

    公开(公告)号:US07095085B2

    公开(公告)日:2006-08-22

    申请号:US10798481

    申请日:2004-03-12

    IPC分类号: H01L29/788

    摘要: A nonvolatile semiconductor memory device includes erasable and programmable memory cell transistors, a selection transistor, a peripheral transistor, first post-oxidation films each provided on a gate electrode of all of the plurality of erasable and programmable memory cell transistors, a second post-oxidation film provided on a gate electrode of the selection transistor, a third post-oxidation film provided on a gate electrode of the peripheral transistor, and an insulating film covering the memory cell transistors, the selection transistor, and the peripheral transistor. The insulating film is harder for an oxidizing agent to pass through than a silicon oxide film. The insulating film has an oxidized region. The insulating film includes a silicon nitride film. The oxidized region is provided in a surface of the silicon nitride film.

    摘要翻译: 非易失性半导体存储器件包括可擦除和可编程存储单元晶体管,选择晶体管,外围晶体管,每个设置在所有多个可擦除和可编程存储单元晶体管的栅电极上的第一后氧化膜,第二后氧化 提供在选择晶体管的栅电极上的第三后氧化膜,以及设置在外围晶体管的栅电极上的第三后氧化膜以及覆盖存储单元晶体管,选择晶体管和外围晶体管的绝缘膜。 绝缘膜比氧化硅膜更难通过氧化剂通过。 绝缘膜具有氧化区域。 绝缘膜包括氮化硅膜。 氧化区域设置在氮化硅膜的表面。

    Multilevel memory cell operation
    10.
    发明授权
    Multilevel memory cell operation 有权
    多层存储单元操作

    公开(公告)号:US08238155B2

    公开(公告)日:2012-08-07

    申请号:US12703540

    申请日:2010-02-10

    IPC分类号: G11C11/34

    摘要: One or more embodiments of the present disclosure provide methods, devices, and systems for operating non-volatile multilevel memory cells. One method embodiment includes programming a memory cell to one of a number of different threshold voltage (Vt) levels, each level corresponding to a program state. The method includes programming a reference cell to a Vt level at least as great as an uppermost Vt level of the number of different Vt levels, performing a read operation on the reference cell, and determining a number of read reference voltages used to determine a particular program state of the memory cell based on the read operation performed on the reference cell.

    摘要翻译: 本公开的一个或多个实施例提供了用于操作非易失性多电平存储器单元的方法,装置和系统。 一个方法实施例包括将存储器单元编程为多个不同阈值电压(Vt)电平之一,每个电平对应于编程状态。 该方法包括将参考单元编程至至少与不同Vt电平数量的最高Vt电平一样大的Vt电平,对参考单元执行读取操作,以及确定用于确定特定值的读取参考电压的数量 基于对参考单元执行的读取操作,存储器单元的编程状态。