摘要:
A system and method is described for lithographically printing patterns on a semiconductor using combinations of illumination and mask patterns which are optimized together to produce the desired pattern. The method of optimizing both illumination and mask pattern allows the development of mask patterns that are not constrained by the geometry of the desired pattern to be printed. Thus, the method provides high quality images even when the desired printed patterns have critical dimensions that approach the resolution limits of a lithographic system. The resulting mask patterns using the method do not obviously correspond to the desired patterns to be printed. Such masks may include phase-shifting technology that use destructive interference to define dark areas of the image and are not constrained to conform to the desired printed pattern.
摘要:
A simplified version of a multiexpose mask optimization problem is solved in order to find a compressed space in which to search for the solution to the full problem formulation. The simplification is to reduce the full problem to an unconstrained formulation. The full problem of minimizing dark region intensity while maintaining intensity above threshold at each bright point can be converted to the unconstrained problem of minimizing average dark region intensity per unit of average intensity in the bright regions. The extrema solutions to the simplified problem can be obtained for each source. This set of extrema solutions is then assessed to determine which features are predominantly printed by which source. A minimal set of extrema solutions serves as a space of reduced dimensionality within which to maximize the primary objective under constraints. The space typically has reduced dimensionality through selection of highest quality extrema solutions.
摘要:
Mask layout data of a lithographic mask includes polygons that each include horizontal and vertical edges. Each of a number of target edge pairs is defined by two edges of one or more of the polygons. A search box having a boundary coincident with a given edge of the edges of the polygons is specified. Whether the search box includes at least one edge of the edges of the polygons in addition to the given edge is determined. Where the search box includes at least one edge, at least one of the target edge pairs is specified as including the given edge and one of the at least one edge. For each target edge pair that has been specified, a manufacturability penalty value is determined. A dynamic manufacturability constraint table and a non-zero multiplier table are maintained.
摘要:
Programmable illuminators in exposure tools are employed to increase the degree of freedom in tool matching. A tool matching methodology is provided that utilizes the fine adjustment of the individual source pixel intensity based on a linear programming (LP) problem subjected to user-specific constraints to minimize the difference of the lithographic wafer data between two tools. The lithographic data can be critical dimension differences from multiple targets and multiple process conditions. This LP problem can be modified to include a binary variable for matching sources using multi-scan exposure. The method can be applied to scenarios that the reference tool is a physical tool or a virtual ideal tool. In addition, this method can match different lithography systems, each including a tool and a mask.
摘要:
A system for exposing a resist layer to an image that includes a layer reflective to imaging tool radiation and a resist layer having a region of photosensitivity over the reflective layer. An imaging tool projects radiation containing an aerial image onto the resist layer, with a portion of the radiation containing the aerial image passing through the resist and reflecting back to the resist to form an interference pattern of the projected aerial image through the resist layer thickness. The thickness and location of the resist layer region of photosensitivity are selected to include from within the interference pattern higher contrast portions of the interference pattern in the direction of the resist thickness, and to exclude lower contrast portions of the interference pattern in the resist thickness direction from said resist layer region of photosensitivity, to improve contrast of the aerial image in said resist layer region of photosensitivity.
摘要:
Modeling of lithographic processes for use in the design of photomasks for the manufacture of semiconductor integrated circuits, and particularly to the modeling of the complex effects due to interaction of the illuminating light with the mask topography, is provided. An isofield perturbation to a thin mask representation of the mask is provided by determining, for the components of the illumination, differences between the electric field on a feature edge having finite thickness and on the corresponding feature edge of a thin mask representation. An isofield perturbation is obtained from a weighted coherent combination of the differences for each illumination polarization. The electric field of a mask having topographic edges is represented by combining a thin mask representation with the isofield perturbation applied to each edge of the mask.
摘要:
Embodiments of the present invention provide a method of performing printability verification of a mask layout. The method includes creating one or more tight clusters; computing a set of process parameters associated with a point on said mask; comparing said set of process parameters to said one or more tight clusters; and reporting an error when at least one of said process parameters is away from said one or more tight clusters.
摘要:
A computer-implemented method is provided for generating an electromagnetic field (EMF) correction boundary layer (BL) model corresponding to a mask, which can include using a computer to perform a method, in which asymmetry factor data is determined from aerial image measurements of a plurality of different gratings representative of features provided on a mask, wherein the aerial image measurements having been made at a plurality of different focus settings. The method may also include determining boundary layer (BL) model parameters of an EMF correction BL model corresponding to the mask by fitting to the asymmetry factor measurements. Alternatively, the asymmetry factor data can be determined from measurements of line widths of photoresist patterns, wherein the photoresist patterns correspond to images cast by a plurality of gratings at a plurality of different defocus distances, and the gratings can be representative of features of a mask.
摘要:
A method is provided for designing a mask that includes the use of a pixel-based simulation of a lithographic process model, in which test structures are designed for determining numerical and discretization errors associated with the pixel grid as opposed to other model inaccuracies. The test structure has a plurality of rows of the same sequence of features, but each row is offset from other rows along an x-direction by a multiple of a minimum step size, such as used in modifying masks during optical proximity correction. The images for each row are simulated with a lithographic model that uses the selected pixel-grid size and the differences between row images are compared. If the differences between rows exceed or violate a predetermined criterion, the pixel grid size may be modified to minimize discretization and/or numerical errors due to the choice of pixel grid size.
摘要:
The manufacturability of a lithographic mask employed in fabricating instances of a semiconductor device is determined. Target edges are selected from mask layout data of the lithographic mask. The mask layout data includes polygons distributed over cells, where each polygon has edges. The cells include a center cell, two vertical cells above and below the center cell, and two horizontal cells to the left and right of the center cell. Target edge pairs are selected for determining a manufacturing penalty in making the lithographic mask, in a manner that decreases the computational volume in determining the manufacturing penalty. The manufacturability of the lithographic mask, including the manufacturing penalty in making the lithographic mask, is determined based on the target edge pairs selected. The manufacturability of the lithographic mask is output. The manufacturability of the lithographic mask is dependent on the manufacturing penalty in making the lithographic mask.