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公开(公告)号：US06170429B2
公开(公告)日：2001-01-09
申请号：US09163722
申请日：1998-09-30
IPC分类号： C23C1600
CPC分类号： H01J37/32495 , Y10S156/916
摘要： A chamber liner for use in a semiconductor process chamber and a semiconductor process chamber containing the chamber liner are disclosed. The process chamber includes a housing having an inner surface defining a chamber in which a vacuum is drawn during processing of a semiconductor wafer. The chamber liner has a plasma confinement shield with a plurality of apertures. An outer sidewall extends upwardly from the plasma confinement shield. An outer flange extends outwardly from the outer sidewall such that the outer flange extends beyond the chamber and into a space at atmospheric pressure. The chamber liner preferably further includes an inner sidewall that extends upwardly from the plasma confinement shield. The plasma confinement shield, the inner and outer sidewalls, and the outer flange are preferably integral with one another.
摘要翻译： 公开了一种用于半导体处理室的腔室衬垫和包含室内衬的半导体处理室。 处理室包括具有内表面的壳体，该内表面限定了在半导体晶片的处理期间抽出真空的腔室。 室衬里具有具有多个孔的等离子体限制屏蔽。 外侧壁从等离子体限制屏蔽向上延伸。 外凸缘从外侧壁向外延伸，使得外凸缘延伸超出室并进入大气压力的空间。 室衬里优选还包括从等离子体限制屏蔽向上延伸的内侧壁。 等离子体限制屏蔽体，内侧壁和外侧壁以及外部凸缘优选彼此成为一体。
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公开(公告)号：US06277237B1
公开(公告)日：2001-08-21
申请号：US09713516
申请日：2000-11-14
IPC分类号： C23C1600
CPC分类号： H01J37/32495 , Y10S156/916
摘要： A chamber liner for use in a semiconductor process chamber and a semiconductor process chamber containing the chamber liner are disclosed. The process chamber includes a housing having an inner surface defining a chamber in which a vacuum is drawn during processing of a semiconductor wafer. The chamber liner has a plasma confinement shield with a plurality of apertures. An outer sidewall extends upwardly from the plasma confinement shield. An outer flange extends outwardly from the outer sidewall such that the outer flange extends beyond the chamber and into a space at atmospheric pressure. The chamber liner preferably further includes an inner sidewall that extends upwardly from the plasma confinement shield. The plasma confinement shield, the inner and outer sidewalls, and the outer flange are preferably integral with one another.
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公开(公告)号：US08314027B2
公开(公告)日：2012-11-20
申请号：US13284709
申请日：2011-10-28
申请人： William Thie , John M. Boyd , Fritz C. Redeker , Yezdi Dordi , John Parks , Tiruchirapalli Arunagiri , Aleksander Owczarz , Todd Balisky , Clint Thomas , Jacob Wylie , Alan M. Schoepp
发明人： William Thie , John M. Boyd , Fritz C. Redeker , Yezdi Dordi , John Parks , Tiruchirapalli Arunagiri , Aleksander Owczarz , Todd Balisky , Clint Thomas , Jacob Wylie , Alan M. Schoepp
CPC分类号： H01L21/288 , C23C18/1619 , C23C18/1632 , H01L21/76873
摘要： A dry-in/dry-out system is disclosed for wafer electroless plating. The system includes an upper zone for wafer ingress/egress and drying operations. Proximity heads are provided in the upper zone to perform the drying operations. The system also includes a lower zone for electroless plating operations. The lower zone includes an electroless plating apparatus that implements a wafer submersion by fluid upwelling method. The upper and lower zones of the system are enclosed by a dual-walled chamber, wherein the inner wall is a chemically inert plastic and the outer wall is a structural metal. The system interfaces with a fluid handling system which provides the necessary chemistry supply and control for the system. The system is ambient controlled. Also, the system interfaces with an ambient controlled managed transfer module (MTM).
摘要翻译： 公开了一种用于晶片无电镀的干/干输出系统。 该系统包括用于晶片入口/出口和干燥操作的上部区域。 靠近头部设置在上部区域以执行干燥操作。 该系统还包括用于无电镀操作的下部区域。 下部区域包括通过流体上升流法实现晶片浸没的化学镀设备。 系统的上部和下部区域由双壁室围住，其中内壁是化学惰性塑料，外壁是结构金属。 系统与流体处理系统接口，为系统提供必要的化学物质供应和控制。 系统是环境控制的。 此外，系统与环境受控的托管传输模块（MTM）接口。
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4.发明申请Methods of and apparatus for aligning electrodes in a process chamber to protect an exclusion area within an edge environ of a wafer 有权用于在处理室中对准电极的方法和装置，以保护晶片边缘环境内的排除区域公开(公告)号：US20080190556A1
公开(公告)日：2008-08-14
申请号：US11704870
申请日：2007-02-08
IPC分类号： H01L21/306 , C23C16/00 , B65G47/24
CPC分类号： H01L21/67069 , H01J37/32568
摘要： Positional relationships are established in a process chamber. A base is configured with a lower electrode surface to support a wafer, and an upper electrode has a lower surface. A drive mounted on the base has a linkage connected to the upper electrode. A fixture placed on the lower surface moves into a desired orientation of the lower electrode. With the upper electrode loosely connected by the linkage to the drive, the fixture transfers the desired orientation to the upper electrode. The linkage is tightened to maintain the desired orientation, the fixture is removed and a process exclusion insert is mounted to the upper electrode. The drive moves the upper electrode and the insert to define an inactive process zone between the upper electrode and the wafer on the lower electrode to protect a central area of the wafer during etching of a wafer edge environ around the central area.
摘要翻译： 位置关系建立在一个过程室中。 基底配置有下电极表面以支撑晶片，并且上电极具有下表面。 安装在基座上的驱动器具有连接到上电极的连杆。 放置在下表面上的固定器移动到下电极的期望取向。 通过与驱动器的联动松动地连接上电极，固定装置将期望的方向传送到上电极。 连接件被拧紧以保持所需的取向，夹具被移除，并且将过程排除插入件安装到上电极。 驱动器移动上电极和插入件以在下电极上的上电极和晶片之间限定非活动的工艺区域，以在蚀刻围绕中心区域的晶片边缘环境时保护晶片的中心区域。
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公开(公告)号：US06322661B1
公开(公告)日：2001-11-27
申请号：US09439759
申请日：1999-11-15
IPC分类号： H05H100
CPC分类号： H01J37/32623 , H01J37/32688
摘要： A plasma confinement arrangement for controlling the volume of a plasma while processing a substrate inside a process chamber using a plasma enhanced process is disclosed. The arrangement includes a first magnetic bucket having a plurality of first magnetic elements. The first magnetic elements being configured for producing a first magnetic field inside the process chamber. The arrangement further includes a second magnetic bucket having a plurality of second magnetic elements. The second magnetic elements being configured for producing a second magnetic field inside the process chamber. The second magnetic field being configured to combine with the first magnetic field to produce a resultant magnetic field between the first magnetic bucket and the second magnetic bucket. The resultant magnetic field being configured to permit by-product gas from the processing to pass through while substantially confining the plasma within a volume defined at least by the process chamber and the resultant magnetic field.
摘要翻译： 公开了一种等离子体限制装置，用于在使用等离子体增强过程处理处理室内的衬底的同时控制等离子体的体积。 该装置包括具有多个第一磁性元件的第一磁性桶。 第一磁性元件被配置用于在处理室内产生第一磁场。 该装置还包括具有多个第二磁性元件的第二磁性桶。 第二磁性元件构造成用于在处理室内产生第二磁场。 第二磁场被配置为与第一磁场组合以在第一磁性铲斗和第二磁性铲斗之间产生合成的磁场。 所得到的磁场被配置为允许来自处理的副产物气体通过，同时基本上将等离子体限制在至少由处理室限定的体积和所得的磁场中。
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公开(公告)号：US06302966B1
公开(公告)日：2001-10-16
申请号：US09439675
申请日：1999-11-15
IPC分类号： C23C1646
CPC分类号： H01J37/32522
摘要： A plasma processing system that includes a temperature management system and method that can achieve very accurate temperature control over a plasma processing apparatus is disclosed. In one embodiment, the temperature management system and method operate to achieve tight temperature control over surfaces of the plasma processing apparatus which interact with the plasma during fabrication of semiconductor devices. The tight temperature control offered by the invention can be implemented with combination heating and cooling blocks such that both heating and cooling can be provided from the same thermal interface.
摘要翻译： 公开了一种等离子体处理系统，其包括能够对等离子体处理装置实现非常精确的温度控制的温度管理系统和方法。 在一个实施例中，温度管理系统和方法用于在半导体器件的制造期间实现与等离子体相互作用的等离子体处理装置的表面的紧密温度控制。 本发明提供的严格的温度控制可以通过组合加热和冷却块实现，使得可以从相同的热界面提供加热和冷却。
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7.发明授权Method of orienting an upper electrode relative to a lower electrode for bevel edge processing 有权相对于下电极定向上电极用于斜边加工的方法公开(公告)号：US08398875B2
公开(公告)日：2013-03-19
申请号：US13047735
申请日：2011-03-14
IPC分类号： B44C1/22
CPC分类号： H01L21/67069 , H01J37/32568
摘要： Methods for orienting an upper electrode relative to a lower electrode are provided. The lower electrode is configured to have a desired existing orientation in a process chamber to define active and inactive process zones in the process chamber for processing a wafer. The method includes configuring each electrode with a reference surface, where a lower electrode reference surface is in the desired existing orientation and an upper electrode reference surface to be oriented parallel to the lower electrode reference surface. Then, temporarily holding the upper electrode reference surface oriented parallel to the lower electrode reference surface, and securing the upper electrode to a drive to mount the upper electrode reference surface parallel to the lower electrode reference surface. Other method configurations are also disclosed and illustrated.
摘要翻译： 提供了用于使上电极相对于下电极定向的方法。 下电极被配置为在处理室中具有期望的现有取向，以在处理室中限定用于处理晶片的有源和非活性工艺区。 该方法包括用参考表面配置每个电极，其中下电极参考表面处于所需的现有取向，并且上电极参考表面被平行于下电极参考表面定向。 然后，暂时保持与上部电极基准面平行的上部电极基准面，并将该上部电极固定在与上述电极基准面平行的驱动器上。 还公开和示出了其它方法构造。
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8.发明授权Apparatus for aligning electrodes in a process chamber to protect an exclusion area within an edge environ of a wafer 有权用于在处理室中对准电极以保护晶片边缘环境内的排除区域的装置公开(公告)号：US07922866B2
公开(公告)日：2011-04-12
申请号：US12647301
申请日：2009-12-24
IPC分类号： H01L21/306 , C23F1/00
CPC分类号： H01L21/67069 , H01J37/32568
摘要： Positional relationships are established in a process chamber. A base is configured with a lower electrode surface to support a wafer, and an upper electrode has a lower surface. A drive mounted on the base has a linkage connected to the upper electrode. A fixture placed on the lower surface moves into a desired orientation of the lower electrode. With the upper electrode loosely connected by the linkage to the drive, the fixture transfers the desired orientation to the upper electrode. The linkage is tightened to maintain the desired orientation, the fixture is removed and a process exclusion insert is mounted to the upper electrode. The drive moves the upper electrode and the insert to define an inactive process zone between the upper electrode and the wafer on the lower electrode to protect a central area of the wafer during etching of a wafer edge environ around the central area.
摘要翻译： 位置关系建立在一个过程室中。 基底配置有下电极表面以支撑晶片，并且上电极具有下表面。 安装在基座上的驱动器具有连接到上电极的连杆。 放置在下表面上的固定器移动到下电极的期望取向。 通过与驱动器的联动松动地连接上电极，固定装置将期望的方向传送到上电极。 连接件被拧紧以保持所需的取向，夹具被移除，并且将过程排除插入件安装到上电极。 驱动器移动上电极和插入件以在下电极上的上电极和晶片之间限定非活动的工艺区域，以在蚀刻围绕中心区域的晶片边缘环境时保护晶片的中心区域。
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公开(公告)号：US07858898B2
公开(公告)日：2010-12-28
申请号：US11698191
申请日：2007-01-26
申请人： Andrew D. Bailey, III , Alan M. Schoepp , Gregory Sexton , Andras Kuthi , Yunsang Kim , William S. Kennedy
发明人： Andrew D. Bailey, III , Alan M. Schoepp , Gregory Sexton , Andras Kuthi , Yunsang Kim , William S. Kennedy
IPC分类号： B23K10/00
CPC分类号： H01L21/0209 , H01J37/32366 , H01J37/32568 , H01J2237/335 , H01L21/67069
摘要： A device for cleaning a bevel edge of a semiconductor substrate. The device includes a lower electrode assembly that has a top surface and is adapted to support the substrate and an upper electrode assembly that has a bottom surface opposing the top surface. The lower and upper electrode assemblies generate plasma for cleaning the bevel edge of the substrate disposed between the top and bottom surfaces during operation. The device also includes a mechanism for suspending the upper electrode assembly over the lower support and adjusting the tilt angle and horizontal translation of the bottom surface relative to the top surface.
摘要翻译： 一种用于清洁半导体衬底的斜边缘的装置。 该装置包括具有顶表面并适于支撑基底的下电极组件和具有与顶表面相对的底表面的上电极组件。 下部和上部电极组件在操作期间产生用于清洁设置在顶部和底部表面之间的衬底的斜面边缘的等离子体。 该装置还包括用于将上电极组件悬挂在下支撑件上并且调节底表面相对于顶表面的倾斜角度和水平平移的机构。
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10.发明授权Methods of and apparatus for aligning electrodes in a process chamber to protect an exclusion area within an edge environ of a wafer 有权用于在处理室中对准电极的方法和装置，以保护晶片边缘环境内的排除区域公开(公告)号：US07662254B2
公开(公告)日：2010-02-16
申请号：US11704870
申请日：2007-02-08
IPC分类号： C23F1/00 , H01L21/306
CPC分类号： H01L21/67069 , H01J37/32568
摘要： Positional relationships are established in a process chamber. A base is configured with a lower electrode surface to support a wafer, and an upper electrode has a lower surface. A drive mounted on the base has a linkage connected to the upper electrode. A fixture placed on the lower surface moves into a desired orientation of the lower electrode. With the upper electrode loosely connected by the linkage to the drive, the fixture transfers the desired orientation to the upper electrode. The linkage is tightened to maintain the desired orientation, the fixture is removed and a process exclusion insert is mounted to the upper electrode. The drive moves the upper electrode and the insert to define an inactive process zone between the upper electrode and the wafer on the lower electrode to protect a central area of the wafer during etching of a wafer edge environ around the central area.
摘要翻译： 位置关系建立在一个过程室中。 基底配置有下电极表面以支撑晶片，并且上电极具有下表面。 安装在基座上的驱动器具有连接到上电极的连杆。 放置在下表面上的固定器移动到下电极的期望取向。 通过与驱动器的联动松动地连接上电极，固定装置将期望的方向传送到上电极。 连接件被拧紧以保持所需的取向，夹具被移除，并且将过程排除插入件安装到上电极。 驱动器移动上电极和插入件以在下电极上的上电极和晶片之间限定非活动的工艺区域，以在蚀刻围绕中心区域的晶片边缘环境时保护晶片的中心区域。
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