利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

32 条记录 (耗时 0.014 秒)

    Processes and systems for engineering a silicon-type surface for selective metal deposition to form a metal silicide
    5.
    发明授权
    Processes and systems for engineering a silicon-type surface for selective metal deposition to form a metal silicide 有权
    用于工程化硅型表面以进行选择性金属沉积以形成金属硅化物的工艺和系统

    公开(公告)号：US08747960B2

    公开(公告)日：2014-06-10

    申请号：US11513446

    申请日：2006-08-30

    申请人： Yezdi Dordi ,  John Boyd ,  Tiruchirapalli Arunagiri ,  Johan Vertommen ,  Fritz C. Redeker ,  William Thie ,  Arthur M. Howald

    发明人： Yezdi Dordi ,  John Boyd ,  Tiruchirapalli Arunagiri ,  Johan Vertommen ,  Fritz C. Redeker ,  William Thie ,  Arthur M. Howald

    IPC分类号： C23C14/02 ,  H05H1/00

    CPC分类号： C23C18/1651 ,  C23C18/1893 ,  H01L21/0206 ,  H01L21/02063 ,  H01L21/02068 ,  H01L21/02074 ,  H01L21/28518 ,  H01L21/288 ,  H01L21/32115 ,  H01L21/32135 ,  H01L21/32136 ,  H01L21/67161 ,  H01L21/67207 ,  H01L21/76814 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76862 ,  Y02P70/605

    摘要： The embodiments fill the need to enhance electro-migration performance, provide lower metal resistivity, and improve silicon-to-metal interfacial adhesion for copper interconnects by providing improved processes and systems that produce a silicon-to-metal interface. An exemplary method of preparing a substrate surface of a substrate to selectively deposit a layer of a metal on a silicon or polysilicon surface of the substrate to form a metal silicide in an integrated system is provided. The method includes removing organic contaminants from the substrate surface in the integrated system, and reducing the silicon or polysilicon surface in the integrated system after removing organic contaminants to convert silicon oxide on the silicon or polysilicon surface to silicon, wherein after reducing the silicon or polysilicon surface, the substrate is transferred and processed in controlled environment to prevent the formation of silicon oxide, the silicon or polysilicon surface is reduced to increase the selectivity of the metal on the silicon surface. The method further includes selectively depositing the layer of the metal on the silicon or polysilicon surface of substrate in the integrated system after reducing the silicon or polysilicon surface. An exemplary system to practice the exemplary method described above is also provided.

    摘要翻译： 这些实施方案通过提供产生硅 - 金属界面的改进的工艺和系统来满足增强电迁移性能，提供较低金属电阻率以及改进铜互连的硅 - 金属界面粘附的需要。 提供了制备衬底的衬底表面以在衬底的硅或多晶硅表面上选择性地沉积金属层以在集成系统中形成金属硅化物的示例性方法。 该方法包括从集成系统中的衬底表面去除有机污染物，以及在去除有机污染物之后减少集成系统中的硅或多晶硅表面，以将硅或多晶硅表面上的氧化硅转化为硅，其中在还原硅或多晶硅之后 表面，在受控环境中转移和处理衬底以防止形成氧化硅，减少硅或多晶硅表面以增加金属在硅表面上的选择性。 该方法还包括在减少硅或多晶硅表面之后，在集成系统中的衬底的硅或多晶硅表面上选择性地沉积金属层。 还提供了用于实践上述示例性方法的示例性系统。

    Processes and systems for engineering a barrier surface for copper deposition
    7.
    发明授权
    Processes and systems for engineering a barrier surface for copper deposition 有权
    用于工程用于铜沉积的阻挡面的工艺和系统

    公开(公告)号：US08241701B2

    公开(公告)日：2012-08-14

    申请号：US11514038

    申请日：2006-08-30

    申请人： Yezdi Dordi ,  John Boyd ,  Tiruchirapalli Arunagiri ,  Hyungsuk Alexander Yoon ,  Fritz C. Redeker ,  William Thie ,  Arthur M. Howald

    发明人： Yezdi Dordi ,  John Boyd ,  Tiruchirapalli Arunagiri ,  Hyungsuk Alexander Yoon ,  Fritz C. Redeker ,  William Thie ,  Arthur M. Howald

    IPC分类号： B05D5/12

    CPC分类号： H01L21/7685 ,  C23C18/1632 ,  C23C18/1651 ,  C23C18/1844 ,  H01L21/0206 ,  H01L21/02063 ,  H01L21/02068 ,  H01L21/02074 ,  H01L21/28518 ,  H01L21/288 ,  H01L21/32115 ,  H01L21/32135 ,  H01L21/32136 ,  H01L21/67161 ,  H01L21/67207 ,  H01L21/76814 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76862 ,  H01L21/76867 ,  H01L21/76871 ,  H01L21/76879

    摘要： The embodiments fill the need to enhance electro-migration performance, provide lower metal resistivity, and improve metal-to-metal interfacial adhesion for copper interconnects by providing improved processes and systems that produce an improved metal-to-metal interface, more specifically barrier-to-copper interface. An exemplary method of preparing a substrate surface of a substrate to deposit a metallic barrier layer to line a copper interconnect structure of the substrate and to deposit a thin copper seed layer on a surface of the metallic barrier layer in an integrated system to improve electromigration performance of the copper interconnect is provided. The method includes cleaning an exposed surface of a underlying metal to remove surface metal oxide in the integrated system, wherein the underlying metal is part of a underlying interconnect electrically connected to the copper interconnect. The method also includes depositing the metallic barrier layer to line the copper interconnect structure in the integrated system, wherein after depositing the metallic barrier layer, the substrate is transferred and processed in controlled environment to prevent the formation of metallic barrier oxide. The method further includes depositing the thin copper seed layer in the integrated system, and depositing a gap-fill copper layer over the thin copper seed layer in the integrated system. An exemplary system to practice the exemplary method described above is also provided.

    摘要翻译： 这些实施方案通过提供改进的工艺和系统来提供改进的金属 - 金属界面，更具体地说是阻隔层，提高了电迁移性能，提供较低的金属电阻率，以及改进铜互连的金属 - 金属界面粘附的需要， 到铜接口。 一种制备衬底的衬底表面的示例性方法，以沉积金属阻挡层以对衬底的铜互连结构进行排列并且在集成系统中在金属阻挡层的表面上沉积薄铜籽晶层以改善电迁移性能 的铜互连。 该方法包括清洁底层金属的暴露表面以去除集成系统中的表面金属氧化物，其中下面的金属是与铜互连电连接的底层互连件的一部分。 该方法还包括沉积金属阻挡层以在集成系统中对铜互连结构进行排列，其中在沉积金属阻挡层之后，将基底在受控环境中转移和加工以防止形成金属阻挡氧化物。 该方法还包括在集成系统中沉积薄铜籽晶层，以及在集成系统中的薄铜种子层上沉积间隙填充铜层。 还提供了用于实践上述示例性方法的示例性系统。

    Methods and systems for barrier layer surface passivation
    10.
    发明授权
    Methods and systems for barrier layer surface passivation 有权
    阻挡层表面钝化的方法和系统

    公开(公告)号：US07592259B2

    公开(公告)日：2009-09-22

    申请号：US11641364

    申请日：2006-12-18

    申请人： Yezdi Dordi ,  John Boyd ,  Fritz Redeker ,  William Thie ,  Tiruchirapalli Arunagiri ,  Alex Yoon

    发明人： Yezdi Dordi ,  John Boyd ,  Fritz Redeker ,  William Thie ,  Tiruchirapalli Arunagiri ,  Alex Yoon

    IPC分类号： H01L21/44 ,  H01L21/4763

    CPC分类号： C23C8/02 ,  C23C8/80 ,  C23C10/02 ,  C23C10/60 ,  C23C16/54 ,  C23C16/56 ,  C23C18/1601 ,  C23C18/1632 ,  C23C18/54 ,  C23C26/00 ,  C23C28/023 ,  C23C28/322 ,  C23C28/34 ,  C25D7/123 ,  C25D17/001 ,  H01L21/67161 ,  H01L21/67207 ,  H01L21/76855 ,  H01L21/76861 ,  H01L21/76862 ,  H01L21/76873

    摘要： This invention pertains to methods and systems for fabricating semiconductor devices. One aspect of the present invention is a method of depositing a gapfill copper layer onto barrier layer for semiconductor device metallization. In one embodiment, the method includes forming the barrier layer on a surface of a substrate and subjecting the barrier layer to a process condition so as to form a removable passivated surface on the barrier layer. The method further includes removing the passivated surface from the barrier layer and depositing the gapfill copper layer onto the barrier layer. Another aspect of the present invention is an integrated system for depositing a copper layer onto a barrier layer for semiconductor device metallization. In one embodiment, the integrated system comprises at least one process module configured for barrier layer deposition and passivated surface formation and at least one other process module configured for passivated surface removal and deposition of copper onto the barrier layer. The system further includes at least one transfer module coupled so that the substrate can be transferred between the modules substantially without exposure to an oxide-forming environment.

    摘要翻译： 本发明涉及用于制造半导体器件的方法和系统。 本发明的一个方面是在用于半导体器件金属化的阻挡层上沉积间隙填充铜层的方法。 在一个实施例中，该方法包括在衬底的表面上形成阻挡层，并使阻挡层经受处理条件，以便在阻挡层上形成可移除的钝化表面。 该方法还包括从阻挡层去除钝化表面并将间隙填充铜层沉积到阻挡层上。 本发明的另一方面是用于在用于半导体器件金属化的阻挡层上沉积铜层的集成系统。 在一个实施例中，集成系统包括被配置用于阻挡层沉积和钝化表面形成的至少一个工艺模块和被配置用于钝化表面去除和沉积到阻挡层上的至少一个其它工艺模块。 所述系统还包括至少一个传送模块，所述至少一个传送模块被耦合，使得所述衬底可以在所述模块之间基本上不被暴露于形成氧化物的环境