摘要:
Circuits and methods are provided for generating reference currents. In one implementation, a circuit is provided that includes a first source and a current control circuit in communication with the first source. The first source generates a first reference current that is a ratio of a first reference voltage and an external resistance. The current control circuit produces a second reference current that is a ratio of a second reference voltage and the external resistance. The current control circuit produces the second reference current without being directly coupled to the external resistance.
摘要:
Computing-in-memory utilizes memory as weight for multiply-and-accumulate (MAC) operations. Input data multiplies weights to produce output data during the operation. Method of data conversion from input data, memory element to output data is described to enhance the computing efficiency.
摘要:
A method of detecting clock duty cycle and adjusting clock duty cycle to achieve a clock with low jitters, low noise, high common mode rejection and high power supply rejection for sampling circuit. Adjusting the duty cycle of the sampling clock can enhance data converter's performance.
摘要:
A method of expanding current steering Digital-to-Analog Converter (DAC) output amplitude and enhancing linearity performance. Level shifters with regulated supply and ground voltage are inserted before current source latches. Extra devices and small current are placed between switches and resistor load to enhance the linearity of current steering DAC.
摘要:
Computing-in-memory utilizes memory as weight for multiply-and-accumulate (MAC) operations. Input data multiplies weights to produce output data during the operation. Method of data conversion from input data, memory element to output data is described to enhance the computing efficiency.
摘要:
A method of increasing SAR ADC conversion rate and reducing power consumption by employing a new timing scheme and minimizing timing delay for each bit-test during binary-search process. The high frequency clock input requirement is eliminated and higher speed rate can be achieved in SAR ADC.
摘要:
Systems and methods are disclosed for performing data conversion by matching current sources using a thin oxide device; and minimizing voltage stress on the thin oxide device during operation or power down.
摘要:
Systems and methods are disclosed for performing data conversion by matching current sources using a thin oxide device; and minimizing voltage stress on the thin oxide device during operation or power down.
摘要:
A current steering converter fabricated using a predetermined integrated circuit technology includes a unary portion having one or more current sources and a binary portion including a plurality of switches controlled by a decoder, the switches coupled to a converter output; and a plurality of devices commonly connected at a first end and coupled to each respective switch at a second end, wherein each device size comprises (W/L)*M, where W/L is a width and length of the device and M is an integer representing multiple number.
摘要:
A self-healing data converter system including a data converter; a parametric function module coupled to the data converter to receive a target performance requirement for a data converter and produce a set of function values to the data converter; an assistant module that captures data converter performance under one or more stress conditions; and a processing module coupled to the data converter to stress the data converter in accordance with one or more predetermined parameters and based on the target performance requirement and data converter performance, the processing module determines new parameters based on a self-healing method and applies the new parameters to produce a new set of function values for the data converter until a predetermined threshold is met to adaptively self-heal the data converter to changed conditions.