公开(公告)号：US12176803B2

公开(公告)日：2024-12-24

申请号：US18471868

申请日：2023-09-21

Applicant: Apple Inc.

Inventor： Chi Nung Ni ,  Sanjay Dabral

IPC: H02M1/15 ,  G06F1/3206 ,  H02M3/158

Abstract: Increases in current drawn from power supply nodes in a computer system can result in unwanted drops in the voltages of the power supply nodes until power supply circuits can compensate for the increased load. To lessen the effects of increases in load currents, a decoupling circuit that includes a diode may be coupled to the power supply node. During a charge mode, a control circuit applies a current to the diode to store charge in the diode. During a boost mode, the control circuit can couple the diode to the power supply node. When the voltage level of the power supply node begins to drop, the diode can source a current to the power supply node using the previously stored charge. The diode may be directly coupled to the power supply node or be part of a switch-based system that employs multiple diodes to increase the discharge voltage.

公开(公告)号：US20240088779A1

公开(公告)日：2024-03-14

申请号：US18471868

申请日：2023-09-21

Applicant: Apple Inc.

Inventor： Chi Nung Ni ,  Sanjay Dabral

IPC: H02M1/15 ,  G06F1/3206 ,  H02M3/158

CPC classification number: H02M1/15 ,  G06F1/3206 ,  H02M3/1582

Abstract: Increases in current drawn from power supply nodes in a computer system can result in unwanted drops in the voltages of the power supply nodes until power supply circuits can compensate for the increased load. To lessen the effects of increases in load currents, a decoupling circuit that includes a diode may be coupled to the power supply node. During a charge mode, a control circuit applies a current to the diode to store charge in the diode. During a boost mode, the control circuit can couple the diode to the power supply node. When the voltage level of the power supply node begins to drop, the diode can source a current to the power supply node using the previously stored charge. The diode may be directly coupled to the power supply node or be part of a switch-based system that employs multiple diodes to increase the discharge voltage.

公开(公告)号：US11862481B2

公开(公告)日：2024-01-02

申请号：US17460806

申请日：2021-08-30

Applicant: Apple Inc.

Inventor： Sanjay Dabral ,  Chi Nung Ni ,  Long Huang ,  SivaChandra Jangam

IPC: H01L21/56 ,  H01L25/065 ,  H01L23/00

CPC classification number: H01L21/56 ,  H01L24/32 ,  H01L25/0655 ,  H01L2224/32059 ,  H01L2224/32137 ,  H01L2924/183

Abstract: Chip sealing designs to accommodate die-to-die communication are described. In an embodiment, a chip structure includes a split metallic seal structure including a lower metallic seal and an upper metallic seal with overlapping metallization layers, and a through seal interconnect navigating through the split metallic seal structure.

公开(公告)号：US20230098000A1

公开(公告)日：2023-03-30

申请号：US17485022

申请日：2021-09-24

Applicant: Apple Inc.

Inventor： Chi Nung Ni ,  Sanjay Dabral

IPC: H02M1/15 ,  H02M3/158 ,  G06F1/3206

Abstract: Increases in current drawn from power supply nodes in a computer system can result in unwanted drops in the voltages of the power supply nodes until power supply circuits can compensate for the increased load. To lessen the effects of increases in load currents, a decoupling circuit that includes a diode may be coupled to the power supply node. During a charge mode, a control circuit applies a current to the diode to store charge in the diode. During a boost mode, the control circuit can couple the diode to the power supply node. When the voltage level of the power supply node begins to drop, the diode can source a current to the power supply node using the previously stored charge. The diode may be directly coupled to the power supply node or be part of a switch-based system that employs multiple diodes to increase the discharge voltage.

公开(公告)号：US20240088032A1

公开(公告)日：2024-03-14

申请号：US17932182

申请日：2022-09-14

Applicant: Apple Inc.

Inventor： Vidhya Ramachandran ,  Chi Nung Ni ,  Chueh-An Hsieh ,  Rekha Govindaraj ,  Jun Zhai ,  Long Huang ,  Rohan U. Mandrekar ,  Saumya K. Gandhi ,  Zhuo Yan ,  Yizhang Yang ,  Saurabh P. Sinha ,  Antonietta Oliva

IPC: H01L23/528 ,  H01L23/00 ,  H01L23/48 ,  H01L23/522 ,  H01L49/02

CPC classification number: H01L23/5283 ,  H01L23/481 ,  H01L23/5226 ,  H01L24/08 ,  H01L24/16 ,  H01L28/40 ,  H01L2224/08265 ,  H01L2224/16225

Abstract: Microelectronic modules are described. In an embodiment, a microelectronic module includes a module substrate, a chip mounted onto the module substrate, and a semiconductor-based integrated passive device between the chip and the module substrate. The semiconductor-based integrated passive device may include an upper RDL stack-up with thicker wiring layers than a lower BEOL stack-up. The semiconductor-based integrated passive device may be further solder bonded or hybrid bonded with the chip.

公开(公告)号：US20220293433A1

公开(公告)日：2022-09-15

申请号：US17460806

申请日：2021-08-30

Applicant: Apple Inc.

Inventor： Sanjay Dabral ,  Chi Nung Ni ,  Long Huang ,  SivaChandra Jangam

IPC: H01L21/56 ,  H01L25/065 ,  H01L23/00

Abstract: Chip sealing designs to accommodate die-to-die communication are described. In an embodiment, a chip structure includes a split metallic seal structure including a lower metallic seal and an upper metallic seal with overlapping metallization layers, and a through seal interconnect navigating through the split metallic seal structure.

公开(公告)号：US20240421126A1

公开(公告)日：2024-12-19

申请号：US18598938

申请日：2024-03-07

Applicant: Apple Inc.

Inventor： Chi Nung Ni ,  Wei Chen ,  Weiming Chris Chen ,  Vidhya Ramachandran ,  Jie-Hua Zhao ,  Suk-Kyu Ryu ,  Myung Jin Yim ,  Chih-Ming Chung ,  Jun Zhai ,  Young Doo Jeon ,  Seungjae Lee

IPC: H01L25/065 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/528 ,  H01L23/538 ,  H01L23/58 ,  H01L29/06

Abstract: Integrated circuit (IC) structures, electronic modules, and methods of fabrication are described in which direct bonded interfaces are removed at corners or edges to counteract the potential for non-bonding or delamination. This can be accomplished during singulation, in which a side recess is formed through an entire thickness of an electronic component and into a direct bonded die, followed by final singulation of the IC structure.

公开(公告)号：US20240096648A1

公开(公告)日：2024-03-21

申请号：US18509801

申请日：2023-11-15

Applicant: Apple Inc.

Inventor： Sanjay Dabral ,  Chi Nung Ni ,  Long Huang ,  SivaChandra Jangam

IPC: H01L21/56 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L21/56 ,  H01L24/32 ,  H01L25/0655 ,  H01L2224/32059 ,  H01L2224/32137 ,  H01L2924/183

Abstract: Chip sealing designs to accommodate die-to-die communication are described. In an embodiment, a chip structure includes a split metallic seal structure including a lower metallic seal and an upper metallic seal with overlapping metallization layers, and a through seal interconnect navigating through the split metallic seal structure.

公开(公告)号：US11811303B2

公开(公告)日：2023-11-07

申请号：US17485022

申请日：2021-09-24

Applicant: Apple Inc.

Inventor： Chi Nung Ni ,  Sanjay Dabral

IPC: H02M1/15 ,  G06F1/3206 ,  H02M3/158

CPC classification number: H02M1/15 ,  G06F1/3206 ,  H02M3/1582

Abstract: Increases in current drawn from power supply nodes in a computer system can result in unwanted drops in the voltages of the power supply nodes until power supply circuits can compensate for the increased load. To lessen the effects of increases in load currents, a decoupling circuit that includes a diode may be coupled to the power supply node. During a charge mode, a control circuit applies a current to the diode to store charge in the diode. During a boost mode, the control circuit can couple the diode to the power supply node. When the voltage level of the power supply node begins to drop, the diode can source a current to the power supply node using the previously stored charge. The diode may be directly coupled to the power supply node or be part of a switch-based system that employs multiple diodes to increase the discharge voltage.