Device fabrication via pulsed plasma

    公开(公告)号:US10580657B2

    公开(公告)日:2020-03-03

    申请号:US16506520

    申请日:2019-07-09

    Abstract: Systems and methods discussed herein are directed towards processing of substrates, including forming a plurality of features in a target layer on a substrate. The formation of the plurality of features includes a main etch operation that forms the plurality of features to a first depth in the target layer. The main etch operation is followed by a phase shift sync pulsing (PSSP) operation, and these two operations are repeated iteratively to form the features to a predetermined depth. The PSSP operation includes one or more cycles of RF source power and RF bias power, this cycle deposits a protective coating in and on the features and then etches a portion of the protective coating to expose portions of the feature.

    HIGH LATERAL TO VERTICAL RATIO ETCH PROCESS FOR DEVICE MANUFACTURING

    公开(公告)号:US20200013610A1

    公开(公告)日:2020-01-09

    申请号:US16576650

    申请日:2019-09-19

    Abstract: A layer stack over a substrate is etched using a photoresist pattern deposited on the layer stack as a first mask. The photoresist pattern is in-situ cured using plasma. At least a portion of the photoresist pattern can be modified by curing. In one embodiment, silicon by-products are formed on the photoresist pattern from the plasma. In another embodiment, a carbon from the plasma is embedded into the photoresist pattern. In yet another embodiment, the plasma produces an ultraviolet light to cure the photoresist pattern. The cured photoresist pattern is slimmed. The layer stack is etched using the slimmed photoresist pattern as a second mask.

    Methods for forming three dimensional NAND structures atop a substrate
    4.
    发明授权
    Methods for forming three dimensional NAND structures atop a substrate 有权
    在衬底上形成三维NAND结构的方法

    公开(公告)号:US09236255B2

    公开(公告)日:2016-01-12

    申请号:US14313246

    申请日:2014-06-24

    Abstract: In some embodiments, a method of forming a three dimensional NAND structure atop a substrate may include providing to a process chamber a substrate having alternating nitride layers and oxide layers or alternating polycrystalline silicon layers and oxide layers formed atop the substrate and a photoresist layer formed atop the alternating layers; etching the photoresist layer to expose at least a portion of the alternating nitride layers and oxide layers or alternating polycrystalline silicon layers and oxide layers; providing a process gas comprising sulfur hexafluoride (SF6), carbon tetrafluoride (CF4), and oxygen (O2) to the process chamber; providing an RF power of about 4 kW to about 6 kW to an RF coil to ignite the process gas to form a plasma; and etching through a desired number of the alternating layers to form a feature of a NAND structure.

    Abstract translation: 在一些实施例中,在衬底顶部形成三维NAND结构的方法可以包括向处理室提供具有交替的氮化物层和氧化物层或交替的多晶硅层和形成在衬底顶部的氧化物层的衬底,以及形成在顶部的光致抗蚀剂层 交替层; 蚀刻光致抗蚀剂层以暴露交替的氮化物层和氧化物层或交替的多晶硅层和氧化物层的至少一部分; 提供包括六氟化硫(SF6),四氟化碳(CF4)和氧气(O2))的处理气体到处理室; 向RF线圈提供约4kW至约6kW的RF功率以点燃工艺气体以形成等离子体; 并蚀刻通过所需数量的交替层以形成NAND结构的特征。

    Device fabrication via pulsed plasma

    公开(公告)号:US10347500B1

    公开(公告)日:2019-07-09

    申请号:US15996982

    申请日:2018-06-04

    Abstract: Systems and methods discussed herein are directed towards processing of substrates, including forming a plurality of features in a target layer on a substrate. The formation of the plurality of features includes a main etch operation that forms the plurality of features to a first depth in the target layer. The main etch operation is followed by a phase shift sync pulsing (PSSP) operation, and these two operations are repeated iteratively to form the features to a predetermined depth. The PSSP operation includes one or more cycles of RF source power and RF bias power, this cycle deposits a protective coating in and on the features and then etches a portion of the protective coating to expose portions of the feature.

    Methods for forming three dimensional NAND structures atop a substrate
    9.
    发明授权
    Methods for forming three dimensional NAND structures atop a substrate 有权
    在衬底上形成三维NAND结构的方法

    公开(公告)号:US08937021B2

    公开(公告)日:2015-01-20

    申请号:US14306535

    申请日:2014-06-17

    CPC classification number: H01L21/31116

    Abstract: In some embodiments, methods for forming a three dimensional NAND structure include providing to a process chamber a substrate having alternating nitride layers and oxide layers or alternating polycrystalline silicon consisting layers and oxide layers formed atop the substrate and a photoresist layer formed atop the alternating layers; etching the photoresist layer to expose at least a portion of the alternating layers; providing a process gas comprising sulfur hexafluoride and oxygen to the process chamber; providing RF power of about 4 kW to about 6 kW to a first inductive RF coil and a second inductive RF coil disposed proximate the process chamber to ignite the process gas to form a plasma, wherein a current flowing through the first inductive RF coil is out of phase with RF current flowing through the second inductive RF coil; and etching through a desired number of the alternating layers to form a feature.

    Abstract translation: 在一些实施例中,用于形成三维NAND结构的方法包括向处理室提供具有交替的氮化物层和氧化物层或交替的多晶硅组成层和形成在衬底顶部的氧化物层的衬底和在交替层上形成的光致抗蚀剂层的衬底; 蚀刻光致抗蚀剂层以暴露交替层的至少一部分; 向处理室提供包含六氟化硫和氧的工艺气体; 向第一感应RF线圈提供约4kW至约6kW的RF功率,并且设置在处理室附近以点燃处理气体以形成等离子体的第二感应RF线圈,其中流过第一感应RF线圈的电流为 的相位,RF电流流过第二感应RF线圈; 并且通过所需数量的交替层蚀刻以形成特征。

    HIGH LATERAL TO VERTICAL RATIO ETCH PROCESS FOR DEVICE MANUFACTURING
    10.
    发明申请
    HIGH LATERAL TO VERTICAL RATIO ETCH PROCESS FOR DEVICE MANUFACTURING 审中-公开
    用于设备制造的高级垂直比例蚀刻工艺

    公开(公告)号:US20130319614A1

    公开(公告)日:2013-12-05

    申请号:US13960760

    申请日:2013-08-06

    Abstract: A layer stack over a substrate is etched using a photoresist pattern deposited on the layer stack as a first mask. The photoresist pattern is in-situ cured using plasma. At least a portion of the photoresist pattern can be modified by curing. In one embodiment, silicon by-products are formed on the photoresist pattern from the plasma. In another embodiment, a carbon from the plasma is embedded into the photoresist pattern. In yet another embodiment, the plasma produces an ultraviolet light to cure the photoresist pattern. The cured photoresist pattern is slimmed. The layer stack is etched using the slimmed photoresist pattern as a second mask.

    Abstract translation: 使用沉积在层堆叠上的光致抗蚀剂图案作为第一掩模蚀刻在衬底上的层叠。 使用等离子体原位固化光致抗蚀剂图案。 光致抗蚀剂图案的至少一部分可以通过固化来改性。 在一个实施例中,在等离子体的光刻胶图案上形成硅副产物。 在另一个实施例中,来自等离子体的碳被嵌入到光致抗蚀剂图案中。 在另一个实施例中,等离子体产生紫外光以固化光致抗蚀剂图案。 固化的光致抗蚀剂图案变薄。 使用薄的光致抗蚀剂图案作为第二掩模蚀刻层堆叠。

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