-
公开(公告)号：US4604727A
公开(公告)日：1986-08-05
申请号：US528303
申请日：1983-08-31
IPC分类号： G11C11/417 , G06F11/10 , G06F12/14 , G06F13/28 , G06F13/42 , G11C7/00 , G11C7/24 , G11C11/34 , G11C11/401 , G11C11/41 , G11C11/413 , G11C29/00 , G11C29/42 , H01L21/822 , H01L27/04
CPC分类号： G06F12/1433 , G06F13/28 , G06F13/4243 , G11C7/24 , G06F11/10
摘要： A memory including various selectively configurable peripherals which provide on-chip low-level control features and a configuration RAM storing bits which both provide unclocked full logic-level outputs to control the selectively configurable peripherals and can also be accessed and read out. That is, each cell in the configuration RAM has two output modes: a digital continuous output, which is provided as a continuous control signal to various peripheral circuits and a selectable analog output which is used to read the information stored in the configuration RAM.
摘要翻译： 包括提供片上低级控制特征的各种选择性可配置的外围设备的存储器和存储位的配置RAM，它们都提供非锁定的全逻辑电平输出以控制可选择性地配置的外围设备，并且还可被访问和读出。 也就是说，配置RAM中的每个单元具有两种输出模式：作为连续控制信号提供给各种外围电路的数字连续输出和用于读取存储在配置RAM中的信息的可选择的模拟输出。
-
公开(公告)号：US4918658A
公开(公告)日：1990-04-17
申请号：US528203
申请日：1983-08-31
IPC分类号： G11C11/41 , G11C11/407 , G11C11/413 , H03K3/033 , H03K5/04
CPC分类号： G11C11/413
摘要： A static random access memory, wherein power consumption is reduced by using asynchronous edge-triggered power down gates to power up only elements in the critical circuit path for only as long as necessary to access the memory. Thus, power consumption in the memory is reduced to nearly an absolute minimum. This invention uses the address transition clock to provide an asynchronous power up function to various parts of the static RAM so that only the circuit which is propagating the signal is powered up and the power is held high just long enough for the signal to propagate. This is performed using intrinsic timing elements of the RAM critical path so that the timing of the signal and power cycles track each other.
摘要翻译： 一种静态随机存取存储器，其中通过使用异步边缘触发掉电门仅仅在需要访问存储器的时间内加电关键电路路径中的元件来降低功耗。 因此，存储器中的功耗被降低到绝对最小值。 本发明使用地址转换时钟为静态RAM的各个部分提供异步上电功能，使得只有正在传播信号的电路被加电并且功率被保持为刚刚足够长以使信号传播。 这是使用RAM关键路径的固有定时元件执行的，使得信号和功率周期的定时彼此跟踪。
-
公开(公告)号：US4810906A
公开(公告)日：1989-03-07
申请号：US186724
申请日：1988-04-22
IPC分类号： H01L27/092 , H01L29/49 , H01L29/78 , H03K19/017 , H01L27/02 , H03K19/094
CPC分类号： H01L29/7827 , H01L27/092 , H01L29/495
摘要： One embodiment of the present invention includes a vertical inverter. A layer of P-type material is formed on the surface of an N+-type substrate, followed by formation of an N+ layer, a P+ layer, an N- layer, and a P+ layer. (Of course different doping configurations may be used and remain within the scope of the invention.) A trench is then etched along one side of the stack thus formed and a connector is formed to the middle P+ and N- layers. Another trench is then formed where a gate insulator and a- gate are formed. The gate serves as the gate for both the N-channel and P-channel transistors thus formed.
摘要翻译： 本发明的一个实施例包括一个垂直反相器。 在N +型衬底的表面上形成一层P型材料，然后形成N +层，P +层，N层和P +层。 （当然可以使用不同的掺杂构型并且保持在本发明的范围内。）然后沿着如此形成的层的一侧蚀刻沟槽，并且将连接器形成到中间P +和N-层。 然后形成栅极绝缘体和栅极的另一个沟槽。 栅极用作由此形成的N沟道晶体管和P沟道晶体管的栅极。
-
公开(公告)号：US5102817A
公开(公告)日：1992-04-07
申请号：US618011
申请日：1990-11-26
IPC分类号： H01L27/108
CPC分类号： H01L27/10841
摘要： DRAM cells and arrays of cell on a semiconductor substrate, together with methods of fabrication, are disclosed wherein the cells are formed in pairs or quartets by excavating a trench or two trenches through the cell elements to split an original cell into two or four cells during the fabrication. The cells include vertical field effect transistors and capacitors along the trech sidewalls with word lines and bit lines crossing over the cells.
摘要翻译： 公开了半导体衬底上的DRAM单元和单元阵列以及制造方法，其中通过在沟槽或两个沟槽中挖掘沟槽或两个沟槽来将单元成对或成对地形成单元，以将原始单元分成两个或四个单元 制造。 单元包括沿着支脚侧壁的垂直场效应晶体管和电容器，其中字线和位线穿过单元。
-
公开(公告)号：US4673962A
公开(公告)日：1987-06-16
申请号：US714589
申请日：1985-03-21
IPC分类号： H01L27/10 , H01L21/8242 , H01L27/108 , H01L29/78 , H01L27/02 , H01L29/06
CPC分类号： H01L27/10841 , Y10S257/911
摘要： DRAM cells and arrays of cells on a semiconductor substrate, together with methods of fabrication, are disclosed wherein the cells are formed in pairs or quartets by excavating a trench or two trenches through the cell elements to split an original cell into two or four cells during the fabrication. The cells include vertical field effect transistors and capacitors along the trench sidewalls with word lines and bit lines crossing over the cells.
摘要翻译： 公开了半导体衬底上的DRAM单元和单元阵列以及制造方法，其中通过在沟槽或两个沟槽中挖掘出沟槽或两个沟槽来成对地或成对地形成单元，以将原始单元分成两个或四个单元 制造。 单元包括沿着沟槽侧壁的垂直场效应晶体管和电容器，其中字线和位线跨过单元。
-
6.发明授权Data management system providing a data thesaurus for mapping between multiple data schemas or between multiple domains within a data schema 有权数据管理系统为数据模式中的多个数据模式之间或多个域之间的映射提供数据词典公开(公告)号：US08239426B2
公开(公告)日：2012-08-07
申请号：US11877857
申请日：2007-10-24
IPC分类号： G06F17/30
CPC分类号： G06Q10/10 , G06Q10/06 , Y10S707/99944
摘要： In one embodiment, a system is provided for managing a centrally managed master repository for core enterprise reference data associated with an enterprise. A centralized master repository contains the reference data, the reference data being associated with multiple schemas, each schema including one or more data models for reference data, each data model including one or more fields. A data management services framework coupled to the repository provides services for managing the reference data in the repository. The services framework supports a master schema including a union of multiple models and associated fields in the multiple schemas. The services framework also supports a thesaurus including, for each field in the master schema, a set of synonyms each representing a mapping between the field in the master schema and a corresponding field in a particular one of the multiple schemas. The master schema and thesaurus facilitate centralized management of the reference data in the repository across multiple heterogeneous external operational systems that have different associated data models and are provided indirect access to the reference data in the repository for operational use of the reference data according to associated business workflows.
摘要翻译： 在一个实施例中，提供了一种用于管理与企业相关联的核心企业参考数据的集中管理的主仓库的系统。 集中的主存储库包含参考数据，参考数据与多个模式相关联，每个模式包括用于参考数据的一个或多个数据模型，每个数据模型包括一个或多个字段。 耦合到存储库的数据管理服务框架提供用于管理存储库中的参考数据的服务。 服务框架支持主模式，包括多个模式的联合和多个模式中的关联字段。 服务框架还支持同义词库，对于主模式中的每个字段，包括一组同义词，每个同义词表示主模式中的字段与多个模式中的特定一个中的相应字段之间的映射。 主模式和同义词库有助于跨多个具有不同相关数据模型的异构外部操作系统对存储库中的参考数据进行集中管理，并提供对库中参考数据的间接访问，以便根据相关业务对参考数据进行操作使用 工作流程。
-
7.发明申请Data Management System Providing a Data Thesaurus for Mapping Between Multiple Data Schemas or Between Multiple Domains within a Data Schema 有权数据管理系统提供用于在数据模式中的多个数据模式之间或多个域之间映射的数据词典公开(公告)号：US20080281824A1
公开(公告)日：2008-11-13
申请号：US11877857
申请日：2007-10-24
IPC分类号： G06F17/30
CPC分类号： G06Q10/10 , G06Q10/06 , Y10S707/99944
摘要： In one embodiment, a system is provided for managing a centrally managed master repository for core enterprise reference data associated with an enterprise. A centralized master repository contains the reference data, the reference data being associated with multiple schemas, each schema including one or more data models for reference data, each data model including one or more fields. A data management services framework coupled to the repository provides services for managing the reference data in the repository. The services framework supports a master schema including a union of multiple models and associated fields in the multiple schemas. The services framework also supports a thesaurus including, for each field in the master schema, a set of synonyms each representing a mapping between the field in the master schema and a corresponding field in a particular one of the multiple schemas. The master schema and thesaurus facilitate centralized management of the reference data in the repository across multiple heterogeneous external operational systems that have different associated data models and are provided indirect access to the reference data in the repository for operational use of the reference data according to associated business workflows.
摘要翻译： 在一个实施例中，提供了一种用于管理与企业相关联的核心企业参考数据的集中管理的主仓库的系统。 集中的主存储库包含参考数据，参考数据与多个模式相关联，每个模式包括用于参考数据的一个或多个数据模型，每个数据模型包括一个或多个字段。 耦合到存储库的数据管理服务框架提供用于管理存储库中的参考数据的服务。 服务框架支持主模式，包括多个模式的联合和多个模式中的关联字段。 服务框架还支持同义词库，对于主模式中的每个字段，包括一组同义词，每一个表示主模式中的字段与多个模式中的特定一个中的相应字段之间的映射。 主模式和同义词库有助于跨多个具有不同相关数据模型的异构外部操作系统对存储库中的参考数据进行集中管理，并提供对库中参考数据的间接访问，以便根据相关业务对参考数据进行操作使用 工作流程。
-
公开(公告)号：US20080256258A1
公开(公告)日：2008-10-16
申请号：US12102247
申请日：2008-04-14
申请人： Pallab K. Chatterjee
发明人： Pallab K. Chatterjee
CPC分类号： G06Q30/02
摘要： A system and method is disclosed for integrating a trading partner into an XML based Internet. The system is operable to access the Internet to register a business name with one or more XML naming systems and register a business name with one or more XML naming systems. The system is further operable to receive an XML based address from the one or more XML naming systems. The system is still further operable to assign the XML based address to an authoritative XML naming system and map the XML based address to the Internet.
摘要翻译： 公开了将贸易伙伴集成到基于XML的因特网中的系统和方法。 该系统可操作以访问因特网以使用一个或多个XML命名系统注册商业名称，并向一个或多个XML命名系统注册商业名称。 该系统还可操作以从一个或多个XML命名系统接收基于XML的地址。 该系统还可以进一步操作，以将基于XML的地址分配给权威的XML命名系统，并将基于XML的地址映射到因特网。
-
公开(公告)号：US4788158A
公开(公告)日：1988-11-29
申请号：US156128
申请日：1988-02-16
申请人： Pallab K. Chatterjee
发明人： Pallab K. Chatterjee
IPC分类号： H01L27/092 , H01L29/49 , H01L29/78 , H01L27/06 , H01L21/36
CPC分类号： H01L29/495 , H01L27/092 , H01L29/7827
摘要： One embodiment of the present invention includes a vertical inverter. A layer of P-type material is formed on the surface of an N+-type substrate, followed by formation of an N+ layer, a P+ layer, an N- layer and a P+ layer. (Of course different doping configurations may be used and remain within the scope of the invention.) A trench is then etched along one side of the stack thus formed and a connector is formed to the middle P+ and N+ layers. Another trench is then formed where a gate insulator and a- gate are formed. The gate serves as the gate for both the N-channel and P-channel transistors thus formed.
摘要翻译： 本发明的一个实施例包括一个垂直反相器。 在N +型衬底的表面上形成一层P型材料，随后形成N +层，P +层，N层和P +层。 （当然，可以使用不同的掺杂构型并保持在本发明的范围内。）然后沿着如此形成的叠层的一侧蚀刻沟槽，并且将中间P +和N +层形成连接器。 然后形成栅极绝缘体和栅极的另一个沟槽。 栅极用作由此形成的N沟道晶体管和P沟道晶体管的栅极。
-
10.发明授权Non-coplanar barrier-type charge coupled device with enhanced storage capacity and reduced leakage current 失效非共面屏障型电荷耦合器件具有增强的存储容量和减少的漏电流
公开(公告)号：US4379306A
公开(公告)日：1983-04-05
申请号：US827998
申请日：1977-08-26
IPC分类号： H01L29/423 , H01L29/768 , H01L29/78 , G11C11/34 , G11C19/28
CPC分类号： H01L29/76858 , H01L29/42396
摘要： A charge coupled device is disclosed which includes a plurality of stages having increased charge storage capacity and decreased leakage current. Each stage is comprised of a semiconductor substrate of a first-type conductivity having a first surface. A charge transfer channel extends through the stage. An insulating layer of non-uniform thickness lies on the first surface. The insulating layer has at least two spaced apart relatively thick portions traversing the channel, and has relatively thin portions traversing the channel throughout the spaces between the spaced apart thick portions. Phase electrodes traverse the channel such that each phase electrode overlies one relatively thick portion and one adjacent relatively thin portion of the insulating layer. A shallow dopant layer of a second-type conductivity lies throughout the channel relatively near to the first surface. An enhanced first-type conductivity dopant layer lies throughout the channel relatively far from the first surface and has a doping which is greater than the doping of the first-type conductivity semiconductor substrate.
摘要翻译： 公开了一种电荷耦合器件，其包括具有增加的电荷存储容量和减小的漏电流的多个级。 每个级由具有第一表面的第一类型导电性半导体衬底组成。 电荷转移通道延伸穿过载物台。 不均匀厚度的绝缘层位于第一表面上。 绝缘层具有穿过通道的至少两个间隔开的相对较厚的部分，并且在间隔开的厚部分之间的整个空间中具有穿过通道的相对薄的部分。 相电极穿过通道，使得每个相电极覆盖绝缘层的一个相对厚的部分和一个相邻的较薄的部分。 第二类导电性的浅掺杂剂层贯穿整个通道相对靠近第一表面。 增强的第一类型导电性掺杂剂层位于整个通道中，比第一表面相对较远，并且具有大于第一类型导电性半导体衬底的掺杂的掺杂。
-
-
-
-
-
-
-
-
-
搜索结果
40 条记录 (耗时 0.027 秒)