公开(公告)号：US08493992B2

公开(公告)日：2013-07-23

申请号：US13014882

申请日：2011-01-27

申请人： Assaf Sella ,  Leonardo W. Estevez ,  Ian Sherlock

发明人： Assaf Sella ,  Leonardo W. Estevez ,  Ian Sherlock

IPC分类号： H04W24/10 ,  H04W88/08 ,  H04W72/00

CPC分类号： H04W28/044 ,  H04L67/1051 ,  H04W24/10 ,  H04W74/085 ,  H04W88/08 ,  Y02B60/50 ,  Y02D70/1224 ,  Y02D70/1242 ,  Y02D70/1244 ,  Y02D70/1246 ,  Y02D70/142 ,  Y02D70/144 ,  Y02D70/146 ,  Y02D70/162 ,  Y02D70/164 ,  Y02D70/168 ,  Y02D70/22

摘要： A master electronic circuit (300) includes a storage (324) representing a wireless collision avoidance networking process (332) involving collision avoidance overhead and combined with a schedulable process (345) including a serial data transfer process and a scheduler, a wireless modem (350) operable to transmit and receive wireless signals for the networking process (332), and a processor (320) coupled with the storage (324) and with the wireless modem (350) and operable to execute the scheduler to establish and transmit a schedule (110) for plural serial data transfers involving the processor (320) and distinct station identifications, and to execute the serial data transfers inside the wireless networking process and according to the schedule so as to avoid at least some of the collision avoidance overhead. Other electronic circuits, processes of making and using, and systems are disclosed.

摘要翻译： 主电子电路（300）包括表示涉及避免冲突开销的无线冲突避免联网处理（332）的存储器（324），并且与包括串行数据传输处理和调度器的无可调度处理（345）组合，无线调制解调器 350），其可操作以发送和接收用于所述联网过程（332）的无线信号;以及处理器（320），其与所述存储器（324）和所述无线调制解调器（350）耦合并且可操作以执行所述调度器以建立和发送调度 （110），用于涉及处理器（320）和不同站标识的多个串行数据传输，并且在无线联网过程内执行串行数据传输并根据该调度，以避免至少一些避免冲突开销。 公开了其他电子电路，制造和使用过程以及系统。

公开(公告)号：US20110188391A1

公开(公告)日：2011-08-04

申请号：US13014882

申请日：2011-01-27

申请人： Assaf Sella ,  Leonardo W. Estevez ,  Ian Sherlock

发明人： Assaf Sella ,  Leonardo W. Estevez ,  Ian Sherlock

IPC分类号： H04W24/10 ,  H04W88/08

CPC分类号： H04W28/044 ,  H04L67/1051 ,  H04W24/10 ,  H04W74/085 ,  H04W88/08 ,  Y02B60/50 ,  Y02D70/1224 ,  Y02D70/1242 ,  Y02D70/1244 ,  Y02D70/1246 ,  Y02D70/142 ,  Y02D70/144 ,  Y02D70/146 ,  Y02D70/162 ,  Y02D70/164 ,  Y02D70/168 ,  Y02D70/22

摘要： A master electronic circuit (300) includes a storage (324) representing a wireless collision avoidance networking process (332) involving collision avoidance overhead and combined with a schedulable process (345) including a serial data transfer process and a scheduler, a wireless modem (350) operable to transmit and receive wireless signals for the networking process (332), and a processor (320) coupled with the storage (324) and with the wireless modem (350) and operable to execute the scheduler to establish and transmit a schedule (110) for plural serial data transfers involving the processor (320) and distinct station identifications, and to execute the serial data transfers inside the wireless networking process and according to the schedule so as to avoid at least some of the collision avoidance overhead. Other electronic circuits, processes of making and using, and systems are disclosed.

摘要翻译： 主电子电路（300）包括表示涉及避免冲突开销的无线冲突避免联网处理（332）的存储器（324），并且与包括串行数据传输处理和调度器的无可调度处理（345）组合，无线调制解调器 350），其可操作以发送和接收用于所述联网过程（332）的无线信号;以及处理器（320），其与所述存储器（324）和所述无线调制解调器（350）耦合并且可操作以执行所述调度器以建立和发送调度 （110），用于涉及处理器（320）和不同站标识的多个串行数据传输，并且在无线联网过程内执行串行数据传输并根据该调度，以避免至少一些避免冲突开销。 公开了其他电子电路，制造和使用过程以及系统。

公开(公告)号：US20090085737A1

公开(公告)日：2009-04-02

申请号：US11863311

申请日：2007-09-28

申请人： Leonardo W. Estevez ,  James F. Hollander

发明人： Leonardo W. Estevez ,  James F. Hollander

IPC分类号： G08B19/00 ,  H04M1/02

CPC分类号： H04M1/72519 ,  G06F21/81

摘要： Tamper-resistant circuitry for use with an electronic device is provided, where the electronic device comprises a plurality of connections for coupling the tamper-resistant circuitry to functional circuitry for performing functionality in connection with the electronic device. The tamper-resistant circuitry comprises an interface for coupling to the plurality of connections and a power source for coupling to at least one connection in the plurality of connections. The tamper-resistant circuitry further comprises circuitry operable to evaluate a measure of an operational parameter related to the power source and in response to a signal at at least one connection in the plurality of connections, to provide an acceptable range for the operational parameter, and to inhibit standard operation of the functional circuitry in response to detecting an anomaly in the functional circuitry by detecting that the measure is outside the acceptable range.

摘要翻译： 提供了用于电子设备的防篡改电路，其中电子设备包括用于将防篡改电路耦合到功能电路以用于执行与电子设备相关的功能的多个连接。 防篡改电路包括用于耦合到多个连接的接口和用于耦合到多个连接中的至少一个连接的电源。 防篡改电路还包括电路，可操作以评估与电源相关的操作参数的量度，并响应于多个连接中的至少一个连接处的信号，为操作参数提供可接受的范围;以及 响应于通过检测到该测量值在可接受的范围之外来检测功能电路中的异常来禁止功能电路的标准操作。

公开(公告)号：US07035434B2

公开(公告)日：2006-04-25

申请号：US09998132

申请日：2001-12-03

申请人： Leonardo W. Estevez

发明人： Leonardo W. Estevez

IPC分类号： G06K9/00

CPC分类号： G06T7/262

摘要： A Hough based motion detection image recording system includes an image sensor operable to view a surveillance site and output real-time image data corresponding to the site. The system also includes a processor operable to receive the image data from the image sensor and a memory coupled to the processor. The system includes a transformation application residing in the memory and executable by the processor. The transformation application is operable to detect a real-time feature segment associated with the site from the image data. The system further includes an analysis engine residing in the memory and executable by the processor. The analysis engine is operable to compare the real-time feature segment with a baseline feature segment and initiate recording of the image data if the feature segment comparison exceeds a predetermined criteria.

公开(公告)号：US06526430B1

公开(公告)日：2003-02-25

申请号：US09411124

申请日：1999-10-04

申请人： Ching-Yu Hung ,  Leonardo W. Estevez ,  Wissam A. Rabadi

发明人： Ching-Yu Hung ,  Leonardo W. Estevez ,  Wissam A. Rabadi

IPC分类号： G06F738

CPC分类号： G06F7/544 ,  G06F17/10 ,  G06F17/142 ,  G06F17/147 ,  G06F2207/5442 ,  H04N19/00 ,  H04N19/42 ,  H04N19/423 ,  H04N19/43 ,  H04N19/433 ,  H04N19/436 ,  H04N19/51 ,  H04N19/60

摘要： The proposed architecture is integrated onto a Digital Signal Processor (DSP) as a coprocessor to assist in the computation of sum of absolute differences, symmetrical row/column Finite Impulse Response (FIR) filtering with a downsampling (or upsampling) option, row/column Discrete Cosine Transform (DCT)/Inverse Discrete Cosine Transform (IDCT), and generic algebraic functions. The architecture is called IPP, which stands for image processing peripheral, and consists of 8 multiply-accumulate hardware units connected in parallel and routed and multiplexed together. The architecture can be dependent upon a Direct Memory Access (DMA) controller to retrieve and write back data from/to DSP memory without intervention from the DSP core. The DSP can set up the DMA transfer and IPP/DMA synchronization in advance, then go on its own processing task. Alternatively, the DSP can perform the data transfers and synchronization itself by synchronizing with the IPP architecture on these transfers. This architecture implements 2-D filtering, symmetrical filtering, short filters, sum of absolute differences, and mosaic decoding more efficiently than the previously disclosed architectures of the prior art.

摘要翻译： 所提出的架构被集成到作为协处理器的数字信号处理器（DSP）上，以协助计算绝对差值和对数行/列有限脉冲响应（FIR）滤波与下采样（或上采样）选项行/列 离散余弦变换（DCT）/逆离散余弦变换（IDCT）和通用代数函数。 该架构称为IPP，代表图像处理外围设备，由并行连接并路由和多路复用的8个乘法累加硬件单元组成。 该体系结构可以依赖于直接存储器访问（DMA）控制器来从DSP内存检索和写回数据，而不需要DSP内核的干预。 DSP可以提前设置DMA传输和IPP / DMA同步，然后进行自己的处理任务。 或者，DSP可以通过与这些传输上的IPP架构同步来执行数据传输和同步。 该架构比现有技术的先前公开的架构更有效地实现了二维滤波，对称滤波，短滤波器，绝对差的和以及马赛克解码。

公开(公告)号：US08036703B2

公开(公告)日：2011-10-11

申请号：US11617878

申请日：2006-12-29

申请人： Richard M. Baker ,  Leonardo W. Estevez ,  Ketan P. Malani

发明人： Richard M. Baker ,  Leonardo W. Estevez ,  Ketan P. Malani

IPC分类号： H04M1/06 ,  H04Q1/30

CPC分类号： H04M1/7253 ,  G06Q30/0601 ,  H04M1/72563 ,  H04M2250/52

摘要： An electronic device. The device comprises circuitry for capturing data representing an image and circuitry for detecting a wireless signal associated with an object. The device also comprises circuitry, responsive to the detecting circuitry, for storing image data from said circuitry for capturing and associating and storing, with same image data, additional data included in the wireless signal.

摘要翻译： 电子设备。 该装置包括用于捕获表示图像的数据和用于检测与对象相关联的无线信号的电路的电路。 该装置还包括响应于检测电路的用于存储来自所述电路的图像数据的电路，用于捕获并与相关图像数据相关联并存储包括在无线信号中的附加数据。

公开(公告)号：US07742638B2

公开(公告)日：2010-06-22

申请号：US11380336

申请日：2006-04-26

申请人： Leonardo W. Estevez ,  Shivshankar Ramamurthi

发明人： Leonardo W. Estevez ,  Shivshankar Ramamurthi

IPC分类号： G06K9/00

CPC分类号： G09G3/3406 ,  G09G2320/0646 ,  G09G2330/023

摘要： The present invention provides a video server. In one embodiment, the video server includes a perceptual analyzer configured to analyze frames of a video sequence and provide a video analysis file. The video server also includes a transmitter coupled to the perceptual analyzer and configured to transmit both the video sequence and the video analysis file. The present invention also provides a mobile client. In one embodiment, the mobile client includes a liquid crystal display (LCD) having a backlight and configured to provide a video sequence for the mobile client. The mobile client also includes a display processor, coupled to the LCD, configured to employ a received video analysis file to enhance at least one of a brightness and contrast of the video sequence and correspondingly reduce a backlight intensity of the backlight.

摘要翻译： 本发明提供一种视频服务器。 在一个实施例中，视频服务器包括被配置为分析视频序列的帧并提供视频分析文件的感知分析器。 视频服务器还包括耦合到感知分析器并被配置为传送视频序列和视频分析文件的发射机。 本发明还提供一种移动客户端。 在一个实施例中，移动客户端包括具有背光并被配置为为移动客户端提供视频序列的液晶显示器（LCD）。 移动客户端还包括耦合到LCD的显示处理器，其被配置为采用接收的视频分析文件来增强视频序列的亮度和对比度中的至少一个，并且相应地降低背光的背光强度。

公开(公告)号：US20090221232A1

公开(公告)日：2009-09-03

申请号：US12040847

申请日：2008-02-29

申请人： Leonardo W. Estevez ,  Steve Lazar

发明人： Leonardo W. Estevez ,  Steve Lazar

IPC分类号： H04B5/00

CPC分类号： H04W88/06 ,  H04W72/1215

摘要： An electronic device. The device comprises circuitry for transmitting and receiving radio frequency signals and a modulator/demodulator, coupled to the circuitry for transmitting and receiving. The device also comprises circuitry for controlling the modulator/demodulator so that in a first time period the modulator/demodulator provides an RFID excitation signal to the circuitry for transmitting and receiving and so that in a second time period the modulator/demodulator provides a cellular communications signal to the circuitry for transmitting and receiving.

摘要翻译： 电子设备。 该装置包括用于发送和接收射频信号的电路和耦合到用于发送和接收的电路的调制器/解调器。 该装置还包括用于控制调制器/解调器的电路，使得在第一时间段中，调制器/解调器向发送和接收的电路提供RFID激励信号，并且使得在第二时间段中，调制器/解调器提供蜂窝通信 信号发送到接收电路。

公开(公告)号：US20080161044A1

公开(公告)日：2008-07-03

申请号：US11617878

申请日：2006-12-29

申请人： Richard M. Baker ,  Leonardo W. Estevez ,  Ketan P. Malani

发明人： Richard M. Baker ,  Leonardo W. Estevez ,  Ketan P. Malani

IPC分类号： H04B1/38

CPC分类号： H04M1/7253 ,  G06Q30/0601 ,  H04M1/72563 ,  H04M2250/52

摘要： An electronic device. The device comprises circuitry for capturing data representing an image and circuitry for detecting a wireless signal associated with an object. The device also comprises circuitry, responsive to the detecting circuitry, for storing image data from said circuitry for capturing and associating and storing, with same image data, additional data included in the wireless signal.

摘要翻译： 电子设备。 该装置包括用于捕获表示图像的数据和用于检测与对象相关联的无线信号的电路的电路。 该装置还包括响应于检测电路的用于存储来自所述电路的图像数据的电路，用于捕获并与相关图像数据相关联并存储包括在无线信号中的附加数据。

公开(公告)号：US08917899B2

公开(公告)日：2014-12-23

申请号：US11548026

申请日：2006-10-10

申请人： Leonardo W. Estevez ,  Jennifer H. Webb

发明人： Leonardo W. Estevez ,  Jennifer H. Webb

IPC分类号： G06K9/00 ,  H04N21/254 ,  G06F21/10 ,  H04N7/16 ,  H04N7/167 ,  H04N21/44 ,  H04N21/4405 ,  H04N21/4408 ,  H04N21/4627 ,  H04N21/4788 ,  H04N21/835 ,  H04N21/8358 ,  H04N19/467

CPC分类号： H04N21/2541 ,  G06F21/10 ,  H04N7/163 ,  H04N7/1675 ,  H04N19/467 ,  H04N21/44008 ,  H04N21/4405 ,  H04N21/4408 ,  H04N21/4627 ,  H04N21/4788 ,  H04N21/835 ,  H04N21/8358

摘要： A system is provided that includes a processor and a network interface coupled to the processor. The system also includes a system memory coupled to the processor. The system memory stores watermarking instructions that, when executed, cause the processor to mark digital media with information that identifies the system.

摘要翻译： 提供了一种包括处理器和耦合到处理器的网络接口的系统。 该系统还包括耦合到处理器的系统存储器。 系统存储器存储水印指令，该指令在被执行时使得处理器用标识系统的信息标记数字媒体。