THIN BODY SEMICONDUCTOR DEVICES
    9.
    发明申请
    THIN BODY SEMICONDUCTOR DEVICES 有权
    薄体半导体器件

    公开(公告)号:US20110263104A1

    公开(公告)日:2011-10-27

    申请号:US12766859

    申请日:2010-04-24

    IPC分类号: H01L21/20

    摘要: A method for fabricating an FET device is disclosed. The method includes providing a body over an insulator, with the body having at least one surface adapted to host a device channel. Selecting the body to be Si, Ge, or their alloy mixtures. Choosing the body layer to be less than a critical thickness defined as the thickness where agglomeration may set in during a high temperature processing. Such critical thickness may be about 4 nm for a planar devices, and about 8 nm for a non-planar devices. The method further includes clearing surfaces of oxygen at low temperature, and forming a raised source/drain by selective epitaxy while using the cleared surfaces for seeding. After the clearing of the surfaces of oxygen, and before the selective epitaxy, oxygen exposure of the cleared surfaces is being prevented.

    摘要翻译: 公开了一种用于制造FET器件的方法。 该方法包括在绝缘体上提供主体,其中主体具有适于承载设备通道的至少一个表面。 选择身体为Si,Ge或其合金混合物。 选择体层小于临界厚度,其临界厚度定义为在高温加工过程中聚集的厚度。 这种临界厚度对于平面器件可以是约4nm,对于非平面器件而言约8nm。 该方法还包括在低温下清除氧的表面,并且通过选择性外延形成凸起的源极/漏极,同时使用清除的表面进行接种。 在氧的表面清除之后,并且在选择性外延之前,防止了清除的表面的氧曝光。

    Thin body semiconductor devices
    10.
    发明授权
    Thin body semiconductor devices 有权
    薄体半导体器件

    公开(公告)号:US08263468B2

    公开(公告)日:2012-09-11

    申请号:US12766859

    申请日:2010-04-24

    IPC分类号: H01L21/336

    摘要: A method for fabricating an FET device is disclosed. The method includes providing a body over an insulator, with the body having at least one surface adapted to host a device channel. Selecting the body to be Si, Ge, or their alloy mixtures. Choosing the body layer to be less than a critical thickness defined as the thickness where agglomeration may set in during a high temperature processing. Such critical thickness may be about 4 nm for a planar devices, and about 8 nm for a non-planar devices. The method further includes clearing surfaces of oxygen at low temperature, and forming a raised source/drain by selective epitaxy while using the cleared surfaces for seeding. After the clearing of the surfaces of oxygen, and before the selective epitaxy, oxygen exposure of the cleared surfaces is being prevented.

    摘要翻译: 公开了一种用于制造FET器件的方法。 该方法包括在绝缘体上提供主体,其中主体具有适于承载设备通道的至少一个表面。 选择身体为Si,Ge或其合金混合物。 选择体层小于临界厚度,其临界厚度定义为在高温加工过程中聚集的厚度。 这种临界厚度对于平面器件可以是约4nm,对于非平面器件而言约8nm。 该方法还包括在低温下清除氧的表面,并且通过选择性外延形成凸起的源极/漏极,同时使用清除的表面进行接种。 在氧的表面清除之后,并且在选择性外延之前,防止了清除的表面的氧曝光。