摘要:
A PROGRAM CONTROLLED TELEPHONE SWITCHING SYSTEM WHICH COMPRISES DUPLICATED CONTROL AND MEMORY UNITS AND DUPLIATED PERIPHERAL EQUIPMENTS. THE CONTROL OF TH PERIPH-
ERAL EQUIPMENTS THROUGH COMMON TRANSLATING INSTRUMENTALITIES IS DESCRIBED.
摘要:
A program controlled data processor system which employs functionally equivalent first and second control units on a mutually exclusive basis to control an input-output system. The processor system comprises a plurality of independent memory units and communication between the control means and the independent memory units is by way of communication paths which may be selectively associated with any of the memory units and with either of the control means. The processor arrangement includes means for insuring that the two control means simultaneously carry out identical work functions.
摘要:
A communications switching office in which each of a plurality of separate processors independently hunts idle paths between terminals of an associated network and in which two separate processors cooperatively hunt idle paths between terminals of the two associated networks by means of data messages exchanged between the two processors. A data transmission arrangement is provided between the processors and internetwork junctors provide connections between the networks.
摘要:
A program-controlled data-processing system in which ''''threecycle overlap'''' execution of program instructions is employed. The processor comprises three circuit arrangements which are concurrently operative with respect to three successive program order words. Each order word which is executed by the control arrangement is first brought into one circuit arrangement (the Buffer Order Word Register) and at a discrete time thereafter each instruction is moved to a second circuit arrangement (the Order Word Register). While the order word is in the Buffer Order Word Register, the instruction portion of the order word is decoded by a corresponding decoder circuit (the Buffer Order Word Decoder) and while it resides in the Order Word Register the instruction portion of the order word is decoded by a second decoder, namely, the Order Word Decoder. The third circuit arrangement serves to transmit commands to the program store to obtain a next succeeding order word from the Buffer Order Word Register.
摘要:
Improvements in data processor systems to increase data handling capabilities and to conserve memory space. The improvements are accomplished by parallel execution of independent data processing actions, by providing single cycle execution of functions which customarily require several program steps, and by optimizing the use of instruction code space and data space in memory.
摘要:
A program controlled telephone switching system is shown as an example of a real time program controlled data processing system. The system work functions of the telephone switching system are performed at assigned levels of a priority hierarchy. This hierarchy includes a base level at which routine jobs are performed, timed interrupt levels at which input-output jobs, which require a fair degree of timing precision, are performed and a plurality of trouble interrupt levels (maintenance interrupt levels), which are employed to initiate remedial actions in accordance with a prescribed remedial plan. The telephone functions which are performed at the base level are allocated processor time in accordance with a base level executive program frequency table. The base level executive program provides time for execution of certain low priority maintenance functions. In the absence of trouble the processor time is shared by the timed interrupt level programs and the base level programs. The trouble interrupt programs are initiated upon the detection of corresponding classes of trouble.