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1.发明授权公开(公告)号：US10192900B2
公开(公告)日：2019-01-29
申请号：US15112275
申请日：2015-12-17
发明人： Jiaxiang Zhang , Kai Lu
IPC分类号： H01L27/12 , H01L29/786 , H01L21/027 , H01L21/467 , H01L21/4763 , H01L29/66 , H01L27/32
摘要： Methods for fabricating a thin film transistor and an array substrate, an array substrate and a display device are provided, and the fabrication method of a thin film transistor includes: forming a first photoresist pattern on the active layer film, wherein the first photoresist pattern comprises a photoresist area of a first thickness and a photoresist area in a second thickness; etching the active layer film by using the first photoresist pattern as a mask to form an active layer; ashing the first photoresist pattern to remove the photoresist area of the second thickness and to reduce a thickness of the photoresist area of the first thickness to form the second photoresist pattern. The second photoresist pattern is used as the mask to etch the source-drain electrode thin film. The fabrication method uses the photoresist pattern to prevent the active layer from being impacted by a source-drain etching solution, and can reduce the usage of a specific etching barrier layer and greatly simplify the fabrication process.
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公开(公告)号：US09653484B2
公开(公告)日：2017-05-16
申请号：US14420217
申请日：2014-07-17
发明人： Jiaxiang Zhang
IPC分类号： H01L29/49 , H01L27/12 , H01L29/417 , H01L29/786
CPC分类号： H01L27/1222 , H01L27/124 , H01L27/127 , H01L29/41733 , H01L29/7869
摘要： An array substrate and a manufacturing method thereof, a display device, a thin-film transistor (TFT) and a manufacturing method thereof. The array substrate comprises a base substrate and a pixel electrode and a TFT formed on the base substrate. The TFT includes an active layer and a source/drain pattern. The source/drain pattern is connected with the active layer. The pixel electrode is connected with the active layer. The array substrate can improve the aperture ratio of pixels and the chargeability of the TFT.
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公开(公告)号：US10249734B2
公开(公告)日：2019-04-02
申请号：US14433701
申请日：2014-08-21
发明人： Xiaohui Jiang , Jiaxiang Zhang
摘要： A poly-silicon thin film transistor and its manufacturing method, an array substrate and its manufacturing method, and a display device are provided. The method for manufacturing a poly-silicon thin film transistor includes forming a poly-silicon layer on a base substrate so that the poly-silicon layer includes a first poly-silicon area, second poly-silicon areas located at the both sides of the first poly-silicon area and third poly-silicon areas located at a side of the second poly-silicon areas away from the first poly-silicon area; forming a barrier layer between a gate electrode and a gate insulation layer by a dry etching method so that the barrier layer corresponds to the first poly-silicon area; and with the barrier layer as a mask doping the second poly-silicon areas to form lightly doped areas. By this method, the lightly doped areas may have the same length, and thus the problem of excessive leakage current is avoided.
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公开(公告)号：US10002889B2
公开(公告)日：2018-06-19
申请号：US14443777
申请日：2014-10-28
发明人： Jiaxiang Zhang , Xiaohui Jiang , Changjiang Yan
IPC分类号： H01L27/12 , H01L29/786 , H01L29/423 , H01L29/417 , H01L21/77
CPC分类号： H01L27/1248 , H01L21/77 , H01L27/12 , H01L27/1222 , H01L27/124 , H01L27/1262 , H01L27/1274 , H01L29/41733 , H01L29/42384 , H01L29/78633 , H01L29/78645
摘要： The present invention provides a low-temperature polysilicon thin film transistor array substrate and a method of fabricating the same, and a display device. The array substrate comprises: a substrate; a polysilicon active layer provided on the substrate; a first insulation layer provided on the active layer; a plurality of gates and a gate line provided on the first insulation layer; a second insulation layer provided on the gates; a source, a drain, a data line and a pixel electrode electrically connected with the drain, which are provided on the second insulation layer, the source covers the plurality of gates. The plurality of gates are provided directly below the source, so that the leakage current is reduced and the aperture ratio of panel is improved.
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5.发明申请公开(公告)号：US20180166468A1
公开(公告)日：2018-06-14
申请号：US15112275
申请日：2015-12-17
发明人： Jiaxiang Zhang , Kai Lu
IPC分类号： H01L27/12 , H01L29/66 , H01L29/786 , H01L21/027 , H01L21/467 , H01L21/4763
CPC分类号： H01L27/127 , H01L21/0273 , H01L21/467 , H01L21/47635 , H01L27/12 , H01L27/1225 , H01L27/3262 , H01L29/66969 , H01L29/786 , H01L29/7869
摘要： Methods for fabricating a thin film transistor and an array substrate, an array substrate and a display device are provided, and the fabrication method of a thin film transistor includes: forming a first photoresist pattern on the active layer film, wherein the first photoresist pattern comprises a photoresist area of a first thickness and a photoresist area in a second thickness; etching the active layer film by using the first photoresist pattern as a mask to form an active layer; ashing the first photoresist pattern to remove the photoresist area of the second thickness and to reduce a thickness of the photoresist area of the first thickness to form the second photoresist pattern. The second photoresist pattern is used as the mask to etch the source-drain electrode thin film. The fabrication method uses the photoresist pattern to prevent the active layer from being impacted by a source-drain etching solution, and can reduce the usage of a specific etching barrier layer and greatly simplify the fabrication process.
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公开(公告)号：US09484364B2
公开(公告)日：2016-11-01
申请号：US14386209
申请日：2013-12-03
发明人： Jing Li , Wenyu Zhang , Jiaxiang Zhang
IPC分类号： H01L27/12 , H01L29/417 , H01L23/50
CPC分类号： H01L27/124 , G02F1/136286 , G02F2201/40 , H01L23/50 , H01L27/1222 , H01L27/1288 , H01L29/41733 , H01L29/41741 , H01L29/41775 , H01L29/78642
摘要： An array substrate and a display device are presented. The array substrate includes: a base substrate and a plurality of thin film transistor units located on the base substrate, wherein, the thin film transistor unit includes: a first gate electrode located on the base substrate, a gate insulating layer located on the first gate electrode, a drain electrode disposed in the same layer as the first gate electrode, an active layer located on the drain electrode, a source electrode located on the active layer, a first transparent conductive layer is provided between the base substrate and the first gate electrode and the drain electrode that are disposed in the same layer, and the gate insulating layer is also disposed between the first gate electrode plus the first transparent conductive layer beneath it and the drain electrode plus the first transparent conductive layer beneath it.
摘要翻译： 呈现阵列基板和显示装置。 阵列基板包括：基底基板和位于基底基板上的多个薄膜晶体管单元，其中，薄膜晶体管单元包括：位于基底基板上的第一栅电极，位于第一栅极上的栅极绝缘层 电极，设置在与第一栅电极相同的层中的漏电极，位于漏电极上的有源层，位于有源层上的源电极，第一透明导电层设置在基底基板和第一栅电极之间 和漏电极，并且栅绝缘层也设置在第一栅电极与其下的第一透明导电层之间，漏电极加上其下的第一透明导电层。
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7.发明申请CAPACITIVE TOUCH PANEL, DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE TOUCH PANEL 有权电容触控面板，显示装置及制造触控面板的方法公开(公告)号：US20150145811A1
公开(公告)日：2015-05-28
申请号：US14345040
申请日：2013-07-10
发明人： Jiaxiang Zhang , Xiaohui Jiang , Jian Guo , Xu Chen
CPC分类号： G06F3/044 , C23F1/02 , G06F2203/04103 , G06F2203/04112 , H05K3/06
摘要： An embodiment of the present application discloses a capacitive touch panel including a base substrate, on which a plurality of transparent conductive patters being capable of transmitting touch signals and not overlapping with each are provided, and each transparent conductive pattern is an integrated pattern made of a same material layer. An embodiment of the present application further provides a method for manufacturing a capacitive touch panel, which includes forming a plurality of transparent conductive patterns on a base substrate through one mask patterning process. An embodiment of the present application further includes a display device comprising the capacitive touch panel as described above. An embodiment of the present application can save masks and can manufacture capacitive touch panels at a low cost. Furthermore, the embodiments of the present application have advantages of high production efficiency and of high yield rate.
摘要翻译： 本申请的一个实施方案公开了一种电容式触摸屏，其包括基底，多个透明导电图案能够传输触摸信号并且不与每个透明导电图案重叠，并且每个透明导电图案是由 相同的材料层。 本申请的实施例还提供了一种用于制造电容式触摸屏的方法，其包括通过一个掩模图案化工艺在基底衬底上形成多个透明导电图案。 本申请的实施例还包括包括如上所述的电容式触摸面板的显示装置。 本申请的实施例可以节省掩模并且可以以低成本制造电容式触摸面板。 此外，本申请的实施方案具有生产效率高，产率高的优点。
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公开(公告)号：US09761615B2
公开(公告)日：2017-09-12
申请号：US14769658
申请日：2014-10-27
发明人： Xiaohui Jiang , Changjiang Yan , Jiaxiang Zhang
IPC分类号： H01L27/12 , H01L21/77 , H01L21/311 , H01L21/768
CPC分类号： H01L27/1248 , H01L21/31116 , H01L21/31138 , H01L21/76816 , H01L21/77 , H01L27/12 , H01L27/1244 , H01L27/1262 , Y02P80/30
摘要： An array substrate, a manufacturing method thereof and a display device are disclosed. The array substrate comprises: a base substrate (1), thin-film transistors (TFTs), an isolation layer (10) and an organic resin layer (8) formed on the base substrate (1), and a common electrode layer (12) formed on the organic resin layer (8). The isolation layer (10) covers source electrodes (6) and drain electrodes (7) of the TFTs; the organic resin layer (8) covers the isolation layer (10) and is provided with first through holes (9) corresponding to the drain electrodes (7) of the TFTs; the isolation layer (10) is provided with second through holes (11) communicated with the first through holes (9) to expose partial drain electrodes (7); and the dimension of the second through holes (11) is greater than that of the first through holes (9). The array substrate, the manufacturing method thereof and the display device resolve the problem of forming dark dots, ensure the product quality, reduce the waste of production materials, and reduce the production cost.
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公开(公告)号：US09740053B2
公开(公告)日：2017-08-22
申请号：US14386592
申请日：2013-11-14
发明人： Jiaxiang Zhang
IPC分类号： G02F1/1335 , G02F1/1339 , G02F1/1368 , H01L27/12 , H01L29/786
CPC分类号： G02F1/13394 , G02F1/1368 , H01L27/1225 , H01L27/1248 , H01L27/1259 , H01L27/1262 , H01L29/66969 , H01L29/7869
摘要： Embodiments of the disclosure provide an array substrate and a fabrication method thereof, and a display device. The array substrate includes: a base substrate and a switch unit disposed on the base substrate. The array substrate further includes: a passivation layer disposed on the base substrate and a spacer disposed on the passivation layer; and the spacer corresponds to the switch unit.
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公开(公告)号：US09437149B2
公开(公告)日：2016-09-06
申请号：US14366132
申请日：2013-12-12
发明人： Jiaxiang Zhang
IPC分类号： G09G3/36 , G02F1/1362
CPC分类号： G09G3/3648 , G02F1/1362 , G09G2300/0426 , G09G2300/0809 , G09G2320/0223 , G09G2320/028
摘要： An array substrate and a display are provided, and the array substrate includes: a substrate; a pixel region, provided on the substrate; a plurality of data lines, formed on the substrate; a plurality of gate signal lines, formed on the substrate and configured to apply a gate signal; a plurality of pixel units, located in the pixel region and defined by crossing of the plurality of data lines and the plurality of gate signal lines; and at least one leading wire, provided at the periphery of the pixel region and configured to transmit the gate signal, wherein two ends of each of the plurality of gate signal lines near the periphery of the pixel region are connected with one leading wire through a first thin film transistor and a second thin film transistor respectively.
摘要翻译： 提供了阵列基板和显示器，阵列基板包括：基板; 设置在基板上的像素区域; 多个数据线，形成在所述基板上; 多个栅极信号线，形成在所述基板上并被配置为施加栅极信号; 多个像素单元，位于所述像素区域中，并且由所述多条数据线和所述多条栅极信号线的交叉限定; 以及至少一个引线，设置在所述像素区域的周边并且被配置为发送所述栅极信号，其中，所述多个栅极信号线中的每一个靠近所述像素区域的周边的两端通过一个引线连接通过 第一薄膜晶体管和第二薄膜晶体管。
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