公开(公告)号：US12106728B2

公开(公告)日：2024-10-01

申请号：US17908359

申请日：2021-08-31

Applicant: BOE Technology Group Co., Ltd.

Inventor： Lizhong Wang ,  Guangcai Yuan ,  Ce Ning ,  Hehe Hu ,  Nianqi Yao ,  Xin Xie ,  Yifang Huang ,  Liping Lei ,  Chen Xu

IPC: G09G3/36

CPC classification number: G09G3/3677 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2310/0286

Abstract: A display substrate and a display panel are provided, the display substrate includes a first gate driver circuit and a second gate driver circuit that are respectively arranged on a first side and a second side of a display region; the first gate driver circuit includes a plurality of first shift register units arranged in a first direction, each first shift register unit includes a first thin film transistor; the second gate driver circuit includes a plurality of second shift register units arranged in the first direction, each second shift register unit includes a second thin film transistor having the same function as the first thin film transistor; an average turn-on current of at least one first thin film transistor is Ion1, and an average turn-on current of at least one second thin film transistor is Ion2, Ion1>Ion2.

公开(公告)号：US12183824B2

公开(公告)日：2024-12-31

申请号：US17611156

申请日：2021-01-28

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jie Huang ,  Jiayu He ,  Ce Ning ,  Zhengliang Li ,  Hehe Hu ,  Fengjuan Liu ,  Nianqi Yao ,  Kun Zhao ,  Tianmin Zhou ,  Jiushi Wang ,  Zhongpeng Tian

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  G02F1/1368

Abstract: The present disclosure relates to the field of display technologies, and in particular to a thin film transistor and a method for manufacturing the same, an array substrate and a display device. An active layer of the thin film transistor includes at least two metal oxide semi-conductor layers, the at least two metal oxide semi-conductor layers include a channel layer and a first protection layer, and metals in the channel layer include tin, and at least one of indium, gallium and zinc. The first protection layer includes praseodymium used to absorb photo-generated electrons from at least one of the channel layer and the first protection layer which is under light irradiation and reduce a photo-generated current caused by the light irradiation.

公开(公告)号：US20240194161A1

公开(公告)日：2024-06-13

申请号：US17908359

申请日：2021-08-31

Applicant: BOE Technology Group Co., Ltd.

Inventor： Lizhong Wang ,  Guangcai Yuan ,  Ce Ning ,  Hehe Hu ,  Nianqi Yao ,  Xin Xie ,  Yifang Huang ,  Liping Lei ,  Chen Xu

IPC: G09G3/36

CPC classification number: G09G3/3677 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2310/0286

Abstract: A display substrate and a display panel are provided, the display substrate includes a first gate driver circuit and a second gate driver circuit that are respectively arranged on a first side and a second side of a display region; the first gate driver circuit includes a plurality of first shift register units arranged in a first direction, each first shift register unit includes a first thin film transistor; the second gate driver circuit includes a plurality of second shift register units arranged in the first direction, each second shift register unit includes a second thin film transistor having the same function as the first thin film transistor; an average turn-on current of at least one first thin film transistor is Ion1, and an average turn-on current of at least one second thin film transistor is Ion2, Ion1>Ion2.

公开(公告)号：US12217651B2

公开(公告)日：2025-02-04

申请号：US17913258

申请日：2021-11-04

Applicant: BOE Technology Group Co., Ltd.

Inventor： Lizhong Wang ,  Ce Ning ,  Yunping Di ,  Binbin Tong ,  Chengfu Xu ,  Dapeng Xue ,  Shuilang Dong ,  Nianqi Yao

IPC: G09G3/20

Abstract: A display substrate, a manufacturing method thereof and a display apparatus are provided. In the present disclosure, a first transistor group with oxide semiconductor as an active layer material is disposed on a side of a second transistor group with polysilicon as an active layer material away from the base, and an area enclosed by orthographic projections of the transistors in the first transistor group on the base is overlapped with an area enclosed by orthographic projections of the transistors in the second transistor group on the base. Stable performance of the transistors included can be ensured in a manufacturing process of the first transistor group and the second transistor group located in different layers, and at the same time, an area occupied by the driving circuit can be reduced so as to decrease a frame width of a display apparatus or improve resolution of the display apparatus.

公开(公告)号：US20240261785A1

公开(公告)日：2024-08-08

申请号：US18018795

申请日：2021-12-31

Applicant: BOE Technology Group Co., Ltd.

Inventor： Feifei Li ,  Bolin Fan ,  Ce Ning ,  Zhengliang Li ,  Hehe Hu ,  Nianqi Yao ,  Jiayu He ,  Jie Huang ,  Kun Zhao

IPC: B01L3/00

CPC classification number: B01L3/502761 ,  B01L2200/0647 ,  B01L2200/12 ,  B01L2300/0645 ,  B01L2300/0848 ,  B01L2400/0415

Abstract: Provided is a micro-nano fluidic substrate, a chip, a preparation method, and a system. The micro-nano fluidic substrate includes: a base; an electrode layer located on the base, the electrode layer includes a first electrode, a second electrode, and a control electrode; and a film layer located on the electrode layer and far away from the base, the film layer includes a groove layer, a nano-channel and a micro-channel, the groove layer includes a first groove, the nano-channel is located in the first groove, an orthographic projection of the nano-channel on the base at least partially coincides with an orthographic projection of the control electrode on the base, and the micro-channel is in communication with the nano-channel, the micro-channel includes a first micro-channel and a second micro-channel, and the first micro-channel is in communication with the first electrode, the second micro-channel is in communication with the second electrode.

公开(公告)号：US11631362B2

公开(公告)日：2023-04-18

申请号：US17535127

申请日：2021-11-24

Applicant: BOE Technology Group Co., Ltd.

Inventor： Shuilang Dong ,  Shanshan Xu ,  Guangcai Yuan ,  Zhanfeng Cao ,  Ce Ning ,  Lizhong Wang ,  Dapeng Xue ,  Nianqi Yao

IPC: G09G3/3266 ,  G09G3/20 ,  G11C19/28

Abstract: A shift register unit includes an input sub-circuit, a pull-down node driving sub-circuit and an output sub-circuit. The pull-down node driving sub-circuit includes a first connection unit, a first voltage-reduction unit and a second connection unit, and configured to: under the control of the first voltage signal terminal and the pull-up node, transmit a first voltage signal from the first voltage signal terminal to the first pull-down node via the first connection unit, and reduce a voltage applied to the second connection unit via the first voltage-reduction unit; and transmit a second voltage signal from the second voltage signal terminal to the first pull-down node via the second connection unit under the control of the pull-up node.

公开(公告)号：US20230006070A1

公开(公告)日：2023-01-05

申请号：US17782035

申请日：2021-05-27

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jie Huang ,  Ce Ning ,  Zhengliang Li ,  Hehe Hu ,  Jiayu He ,  Nianqi Yao ,  Kun Zhao ,  Feng Qu ,  Xiaochun Xu

IPC: H01L29/786 ,  H01L29/66 ,  H01L27/12

Abstract: A semiconductor substrate manufacturing method and a semiconductor substrate. The manufacturing method includes: forming a first semiconductor layer on the base substrate at a first temperature with a first oxide semiconductor material; forming the second semiconductor layer directly on the first semiconductor layer with a second oxide semiconductor material; and performing a patterning process such that the first semiconductor layer and the second semiconductor layer are respectively patterned into a seed layer and a first channel layer. Both the first oxide semiconductor material and the second oxide semiconductor material are capable of forming crystalline phases at a second temperature, the second temperature is less than or equal to 40° C., and the first temperature is greater than or equal to 100° C.

公开(公告)号：US20220344517A1

公开(公告)日：2022-10-27

申请号：US17763297

申请日：2021-04-30

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jie Huang ,  Zhengliang Li ,  Ce Ning ,  Hehe Hu ,  Nianqi Yao ,  Kun Zhao ,  Fengjuan Liu ,  Tianmin Zhou ,  Liping Lei

IPC: H01L29/786

Abstract: A thin film transistor includes a gate electrode, an active layer, a gate insulating layer located between the gate electrode and the active layer, and a source electrode and a drain electrode electrically connected to the active layer. The active layer includes a channel layer and at least one channel protection layer; a material of each of the channel layer and the at least one channel protection layer is a metal oxide semiconductor material. The at least one channel protection layer is a crystallizing layer, and metal elements of the at least one channel protection layer include non-rare earth metal elements including In, Ga, Zn and Sn.

公开(公告)号：US12272754B2

公开(公告)日：2025-04-08

申请号：US17761549

申请日：2021-05-18

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jiayu He ,  Ce Ning ,  Zhengliang Li ,  Hehe Hu ,  Jie Huang ,  Nianqi Yao ,  Zhi Wang ,  Feng Guan

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/417 ,  H01L29/66

Abstract: A thin film transistor, a manufacturing method thereof, a display substrate, and a display device are provided. The thin film transistor includes: a substrate, an active layer, a gate, a source and a drain. The active layer is arranged on the substrate and formed as a grid, including silicon nanowires extending along a first direction, the active layer includes source and drain regions oppositely arranged along the first direction, and a channel region located therebetween. The gate is arranged on the substrate, and an orthographic projection of the gate onto the substrate overlaps with orthographic projections for silicon nanowires in the channel region onto the substrate. The source and drain are arranged on the substrate, the source contacts silicon nanowires in the source region, and the drain contacts silicon nanowires in the drain region.

公开(公告)号：US12191400B2

公开(公告)日：2025-01-07

申请号：US18322981

申请日：2023-05-24

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lizhong Wang ,  Tianmin Zhou ,  Hehe Hu ,  Xiaochun Xu ,  Nianqi Yao ,  Dapeng Xue ,  Shuilang Dong

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786

Abstract: An oxide thin film transistor includes: a gate electrode, a metal oxide active layer and a source-drain metal layer, which are on a base substrate. The metal oxide active layer includes a first metal oxide layer and a second metal oxide layer stacked on the first metal oxide layer in a direction away from the base substrate; the first metal oxide layer is a carrier transport layer; the second metal oxide layer is a carrier isolation layer; an electron transfer rate of the carrier transport layer is greater than an electron transfer rate of the carrier isolation layer. The first metal oxide layer includes a primary surface facing toward the base substrate and a primary surface away from the base substrate; the first metal oxide layer further includes a lateral surface around the primary surfaces; the second metal oxide layer covers the lateral surface of the first metal oxide layer.