Display substrate, display device and method of forming display substrate

    公开(公告)号:US11372451B2

    公开(公告)日:2022-06-28

    申请号:US16900647

    申请日:2020-06-12

    IPC分类号: G09F9/30 G06F1/16 G06F1/18

    摘要: A display substrate, a display device, and a method of forming a display substrate are provided. The display substrate includes: a flexible base substrate and a plurality of pixel islands arranged on the flexible base substrate, where the plurality of pixel islands are arranged in an array, two adjacent pixel islands are connected through an island bridge, display units are arranged on the pixel islands, the display units on the pixel islands are electrically connected through an inter-island connection line arranged on the island bridge, a region outside the pixel islands and the island bridge is a hollow area, and axes of four island bridges around the hollow area are arranged as a parallelogram.

    Array substrate, flat panel detector, and method for manufacturing array substrate

    公开(公告)号:US12068355B2

    公开(公告)日:2024-08-20

    申请号:US17410677

    申请日:2021-08-24

    IPC分类号: H01L27/146 H01L27/12

    摘要: An array substrate includes a substrate, the array substrate includes a display region and a detection region. And the detection region includes a thin film transistor located on the substrate and a photodiode located on one side of the thin film transistor away from the substrate, and the array substrate further includes a first inorganic protective layer, an organic protective layer and a second inorganic protective layer located between the thin film transistor and the photodiode. And the first inorganic protective layer, the organic protective layer and the second inorganic protective layer are stacked in sequence in a direction away from the substrate, and an orthographic projection of the photodiode on the substrate is within the range of the orthographic projection of the organic protective layer on the substrate.

    Thin Film Transistor and Manufacturing Method Thereof, and Array Substrate and Electronic Device

    公开(公告)号:US20230015871A1

    公开(公告)日:2023-01-19

    申请号:US17780877

    申请日:2021-05-27

    IPC分类号: H01L29/786 H01L27/12

    摘要: A thin film transistor, a manufacturing method thereof, an array substrate and an electronic device arc provided. The thin film transistor includes an active layer including multiple oxide layers which includes a channel layer, a transition layer and a first barrier layer, the channel layer is an layer with a highest carrier mobility, the channel layer is a crystalline or amorphous oxide layer, the transition layer is in direct contact with the channel layer, the first barrier layer is an outermost oxide layer, the first barrier layer and the transition layer are both crystalline oxide layers; a crystallization degree of the first barrier layer and a crystallization degree of the transition layer are greater than a crystallization degree of the channel layer, and a band gap of the first barrier layer and a band gap of the transition layer are larger than a band gap of the channel layer.

    ARRAY SUBSTRATE, METHOD FOR MANUFACTURING ARRAY SUBSTRATE, AND DISPLAY PANEL

    公开(公告)号:US20210217784A1

    公开(公告)日:2021-07-15

    申请号:US16761335

    申请日:2019-11-21

    IPC分类号: H01L27/144

    摘要: An array substrate, a method for manufacturing an array substrate, and a display panel are provided. The array substrate includes: a base substrate; a thin film transistor on the base substrate; and a PIN diode on a side of the thin film transistor away from the base substrate, in a direction running away the base substrate from the thin film transistor, the PIN diode including a first electrical conduction type semiconductor layer and an intrinsic semiconductor layer and a second electrical conduction type semiconductor layer stacked in sequence, wherein a material from which the first electrical conduction type semiconductor layer is made includes one or more of following materials: metal oxide, metal sulfide, metal selenide, metal nitride, metal phosphide, or metal arsenide.

    MICRO-NANO FLUIDIC SUBSTRATE, CHIP, PREPARATION METHOD AND SYSTEM

    公开(公告)号:US20240261785A1

    公开(公告)日:2024-08-08

    申请号:US18018795

    申请日:2021-12-31

    IPC分类号: B01L3/00

    摘要: Provided is a micro-nano fluidic substrate, a chip, a preparation method, and a system. The micro-nano fluidic substrate includes: a base; an electrode layer located on the base, the electrode layer includes a first electrode, a second electrode, and a control electrode; and a film layer located on the electrode layer and far away from the base, the film layer includes a groove layer, a nano-channel and a micro-channel, the groove layer includes a first groove, the nano-channel is located in the first groove, an orthographic projection of the nano-channel on the base at least partially coincides with an orthographic projection of the control electrode on the base, and the micro-channel is in communication with the nano-channel, the micro-channel includes a first micro-channel and a second micro-channel, and the first micro-channel is in communication with the first electrode, the second micro-channel is in communication with the second electrode.

    Semiconductor Substrate Manufacturing Method and Semiconductor Substrate

    公开(公告)号:US20230006070A1

    公开(公告)日:2023-01-05

    申请号:US17782035

    申请日:2021-05-27

    摘要: A semiconductor substrate manufacturing method and a semiconductor substrate. The manufacturing method includes: forming a first semiconductor layer on the base substrate at a first temperature with a first oxide semiconductor material; forming the second semiconductor layer directly on the first semiconductor layer with a second oxide semiconductor material; and performing a patterning process such that the first semiconductor layer and the second semiconductor layer are respectively patterned into a seed layer and a first channel layer. Both the first oxide semiconductor material and the second oxide semiconductor material are capable of forming crystalline phases at a second temperature, the second temperature is less than or equal to 40° C., and the first temperature is greater than or equal to 100° C.

    Display backplane, method of manufacturing the same and display device using the same

    公开(公告)号:US11508786B2

    公开(公告)日:2022-11-22

    申请号:US16835722

    申请日:2020-03-31

    摘要: The disclosure provides a display backplane, a method of manufacturing the same, and a display device using the same. The display backplane includes a substrate; a thin film transistor structure layer disposed on one side of the substrate and including thin film transistors, a gate insulating layer, and an interlayer dielectric layer, where an etching rate of the interlayer dielectric layer carried out under an HF atmosphere condition is less than 2 Å/S; and photosensitive devices spaced apart from the thin film transistor structure layer and disposed on one side of the thin film transistor structure layer away from the substrate. The interlayer dielectric layer has a high compactness, and can effectively block H from entering the active layer of the thin film transistor to conductorize the active layer, thus guaranteeing good optical characteristics of the thin film transistor while carrying out optical compensation.