DRIVING BACKPLANE AND PREPARATION METHOD THEREFOR, AND DISPLAY APPARATUS

    公开(公告)号:US20240347550A1

    公开(公告)日:2024-10-17

    申请号:US18755700

    申请日:2024-06-27

    CPC classification number: H01L27/1251 H01L27/1222 H01L27/124 H01L27/127

    Abstract: A method for preparing a driving backplane includes: providing a base substrate, forming a connecting layer on a side of the base substrate; forming an insulating layer group on a side of the connecting layer away from the base substrate, forming a first via hole by patterning the insulating layer group; forming inducing particles on a side of the insulating layer group away from the base substrate; forming a doped amorphous silicon layer on a side of the inducing particles away from the base substrate, forming a first conductor part by the doped amorphous silicon layer formed in the first via hole, forming a raw material part by patterning the doped amorphous silicon layer; and forming a first channel part by causing the inducing particles to induce the raw material part, wherein the first channel part is connected to the first conductor part.

    ARRAY SUBSTRATE, DISPLAY PANEL AND DISPLAY DEVICE
    6.
    发明申请
    ARRAY SUBSTRATE, DISPLAY PANEL AND DISPLAY DEVICE 有权
    阵列基板,显示面板和显示设备

    公开(公告)号:US20160063937A1

    公开(公告)日:2016-03-03

    申请号:US14568998

    申请日:2014-12-12

    CPC classification number: G09G3/3648 G02F2001/136254 G09G3/006 G09G2330/12

    Abstract: The invention discloses an array substrate, a display panel and a display device, and belongs to the field of array substrate test technology, which can solve the problem that the performance of the thin film transistor at the display region of the array substrate in an ADS mode cannot be accurately tested. The array substrate in the invention comprises a plurality of pixel units, each of which comprises a pixel electrode, an insulating layer above the pixel electrode, and a common electrode above the insulating layer, wherein at least one of the pixel units is a test pixel unit, wherein an opening is provided in the insulating layer of the test pixel unit to be above the pixel electrode and separated from the common electrode. The display panel and the display device in the invention comprise the above array substrate.

    Abstract translation: 本发明公开了阵列基板,显示面板和显示装置,属于阵列基板测试技术领域,可以解决ADS阵列基板显示区域薄膜晶体管的性能问题 模式无法准确测试。 本发明的阵列基板包括多个像素单元,每个像素单元包括像素电极,在像素电极上方的绝缘层和绝缘层上方的公共电极,其中至少一个像素单元是测试像素 单元,其中在所述测试像素单元的绝缘层中设置开口以在所述像素电极上方并与所述公共电极分离。 本发明的显示面板和显示装置包括上述阵列基板。

    DISPLAY DEVICE
    8.
    发明公开
    DISPLAY DEVICE 审中-公开

    公开(公告)号:US20240295773A1

    公开(公告)日:2024-09-05

    申请号:US18043392

    申请日:2022-04-26

    CPC classification number: G02F1/133608

    Abstract: An example display device includes: a display module including a display area, a transition area and a non-display area, the display area surrounds the non-display area, and the transition area is located between the display area and the non-display area; a backlight module arranged on a side of the display module away from a display side; the backlight module includes a backplane arranged on a side of the backlight module away from the display module, and a through hole located in the non-display area and used to accommodate an optical module; a light-shielding glue located between the display module and the backlight module, an orthographic projection of the light-shielding glue on the display module overlaps with the transition area; a glue frame located between the light-shielding glue and the backplane.

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