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    Image sensor with motion artifact supression and anti-blooming
    1.
    发明授权
    Image sensor with motion artifact supression and anti-blooming 有权

    公开(公告)号：US07002626B2

    公开(公告)日：2006-02-21

    申请号：US09999232

    申请日：2001-10-26

    申请人： Bedabrata Pain ,  Chris Wrigley ,  Guang Yang ,  Orly Yadid-Pecht

    发明人： Bedabrata Pain ,  Chris Wrigley ,  Guang Yang ,  Orly Yadid-Pecht

    IPC分类号： H04N5/217

    CPC分类号： H04N5/3594 ,  H01L27/14609 ,  H01L27/14623 ,  H01L27/14656 ,  H04N5/3532 ,  H04N5/374

    摘要： An image sensor includes pixels formed on a semiconductor substrate. Each pixel includes a photoactive region in the semiconductor substrate, a sense node, and a power supply node. A first electrode is disposed near a surface of the semiconductor substrate. A bias signal on the first electrode sets a potential in a region of the semiconductor substrate between the photoactive region and the sense node. A second electrode is disposed near the surface of the semiconductor substrate. A bias signal on the second electrode sets a potential in a region of the semiconductor substrate between the photoactive region and the power supply node. The image sensor includes a controller that causes bias signals to be provided to the electrodes so that photocharges generated in the photoactive region are accumulated in the photoactive region during a pixel integration period, the accumulated photocharges are transferred to the sense node during a charge transfer period, and photocharges generated in the photoactive region are transferred to the power supply node during a third period without passing through the sense node. The imager can operate at high shutter speeds with simultaneous integration of pixels in the array. High quality images can be produced free from motion artifacts. High quantum efficiency, good blooming control, low dark current, low noise and low image lag can be obtained.

    High speed CMOS imager with motion artifact supression and anti-blooming
    2.
    发明授权
    High speed CMOS imager with motion artifact supression and anti-blooming 有权
    高速CMOS成像仪，具有运动神器抑制和防起霜

    公开(公告)号：US06326230B1

    公开(公告)日：2001-12-04

    申请号：US09479379

    申请日：2000-01-05

    申请人： Bedabrata Pain ,  Chris Wrigley ,  Guang Yang ,  Orly Yadid-Pecht

    发明人： Bedabrata Pain ,  Chris Wrigley ,  Guang Yang ,  Orly Yadid-Pecht

    IPC分类号： H01L2100

    CPC分类号： H04N5/3594 ,  H01L27/14609 ,  H01L27/14623 ,  H01L27/14656 ,  H04N5/3532 ,  H04N5/374

    摘要： An image sensor includes pixels formed on a semiconductor substrate. Each pixel includes a photoactive region in the semiconductor substrate, a sense node, and a power supply node. A first electrode is disposed near a surface of the semiconductor substrate. A bias signal on the first electrode sets a potential in a region of the semiconductor substrate between the photoactive region and the sense node. A second electrode is disposed near the surface of the semiconductor substrate. A bias signal on the second electrode sets a potential in a region of the semiconductor substrate between the photoactive region and the power supply node. The image sensor includes a controller that causes bias signals to be provided to the electrodes so that photocharges generated in the photoactive region are accumulated in the photoactive region during a pixel integration period, the accumulated photocharges are transferred to the sense node during a charge transfer period, and photocharges generated in the photoactive region are transferred to the power supply node during a third period without passing through the sense node. The imager can operate at high shutter speeds with simultaneous integration of pixels in the array. High quality images can be produced free from motion artifacts. High quantum efficiency, good blooming control, low dark current, low noise and low image lag can be obtained.

    摘要翻译： 图像传感器包括形成在半导体衬底上的像素。 每个像素包括半导体衬底中的光活性区域，感测节点和电源节点。 第一电极设置在半导体衬底的表面附近。 第一电极上的偏置信号在光活性区域和感测节点之间设置半导体衬底的区域中的电位。 第二电极设置在半导体衬底的表面附近。 第二电极上的偏置信号在光活性区域和电源节点之间设置半导体衬底的区域中的电位。 图像传感器包括控制器，其使偏置信号提供给电极，使得在像素积分周期期间在光活性区域中产生的光电荷积聚在光活性区域中，在电荷转移期间累积的光电荷转移到感测节点 并且在第三时间段内在光活性区域中产生的光电荷被传送到电源节点，而不通过感测节点。 成像器可以以高快门速度操作，并同时集成阵列中的像素。 高质量的图像可以不受运动伪像的影响。 可以获得高量子效率，良好的起霜控制，低暗电流，低噪声和低图像滞后。

    High-speed on-chip windowed centroiding using photodiode-based CMOS imager
    3.
    发明授权
    High-speed on-chip windowed centroiding using photodiode-based CMOS imager 有权
    使用基于光电二极管的CMOS成像器的高速片上窗口重心

    公开(公告)号：US06721464B2

    公开(公告)日：2004-04-13

    申请号：US10336701

    申请日：2003-01-03

    申请人： Bedabrata Pain ,  Chao Sun ,  Guang Yang ,  Thomas J. Cunningham ,  Bruce Hancock

    发明人： Bedabrata Pain ,  Chao Sun ,  Guang Yang ,  Thomas J. Cunningham ,  Bruce Hancock

    IPC分类号： G06K920

    CPC分类号： H04N5/374 ,  G06T5/20 ,  G06T7/66 ,  H04N5/3597 ,  H04N5/363

    摘要： A centroid computation system is disclosed. The system has an imager array, a switching network, computation elements, and a divider circuit. The imager array has columns and rows of pixels. The switching network is adapted to receive pixel signals from the image array. The plurality of computation elements operates to compute inner products for at least x and y centroids. The plurality of computation elements has only passive elements to provide inner products of pixel signals the switching network. The divider circuit is adapted to receive the inner products and compute the x and y centroids.

    摘要翻译： 公开了一种质心计算系统。 该系统具有成像器阵列，交换网络，计算元件和分频器电路。 成像器阵列具有列和像素行。 交换网络适于接收来自图像阵列的像素信号。 多个计算元素用于计算至少x和y个质心的内积。 多个计算元件仅具有无源元件以提供交换网络的像素信号的内积。 分频器电路适于接收内部产品并计算x和y重心。

    Dynamically re-configurable CMOS imagers for an active vision system
    4.
    发明授权
    Dynamically re-configurable CMOS imagers for an active vision system 有权
    用于主动视觉系统的动态可重构CMOS成像器

    公开(公告)号：US06839452B1

    公开(公告)日：2005-01-04

    申请号：US09722249

    申请日：2000-11-22

    申请人： Guang Yang ,  Bedabrata Pain

    发明人： Guang Yang ,  Bedabrata Pain

    IPC分类号： H04N3/15 ,  G06K9/00

    CPC分类号： H03F3/082 ,  H03F2200/375 ,  H04N5/3454 ,  H04N5/3456 ,  H04N5/347

    摘要： A vision system is disclosed. The system includes a pixel array, at least one multi-resolution window operation circuit, and a pixel averaging circuit. The pixel array has an array of pixels configured to receive light signals from an image having at least one tracking target. The multi-resolution window operation circuits are configured to process the image. Each of the multi-resolution window operation circuits processes each tracking target within a particular multi-resolution window. The pixel averaging circuit is configured to sample and average pixels within the particular multi-resolution window.

    摘要翻译： 公开了视觉系统。 该系统包括像素阵列，至少一个多分辨率窗口操作电路和像素平均电路。 像素阵列具有被配置为从具有至少一个跟踪目标的图像接收光信号的像素阵列。 多分辨率窗口操作电路被配置为处理图像。 每个多分辨率窗口操作电路处理特定多分辨率窗口内的每个跟踪目标。 像素平均电路被配置为对特定多分辨率窗口内的像素采样和平均。

    High-speed on-chip windowed centroiding using photodiode-based CMOS imager
    6.
    发明授权
    High-speed on-chip windowed centroiding using photodiode-based CMOS imager 有权
    使用基于光电二极管的CMOS成像器的高速片上窗口重心

    公开(公告)号：US06519371B1

    公开(公告)日：2003-02-11

    申请号：US09677972

    申请日：2000-10-02

    申请人： Bedabrata Pain ,  Chao Sun ,  Guang Yang ,  Thomas J. Cunningham ,  Bruce Hancock

    发明人： Bedabrata Pain ,  Chao Sun ,  Guang Yang ,  Thomas J. Cunningham ,  Bruce Hancock

    IPC分类号： G06K936

    CPC分类号： H04N5/374 ,  G06T5/20 ,  G06T7/66 ,  H04N5/3597 ,  H04N5/363

    摘要： A centroid computation system is disclosed. The system has an imager array, a switching network, computation elements, and a divider circuit. The imager array has columns and rows of pixels. The switching network is adapted to receive pixel signals from the image array. The plurality of computation elements operates to compute inner products for at least x and y centroids. The plurality of computation elements has only passive elements to provide inner products of pixel signals the switching network. The divider circuit is adapted to receive the inner products and compute the x and y centroids.

    摘要翻译： 公开了一种质心计算系统。 该系统具有成像器阵列，交换网络，计算元件和分频器电路。 成像器阵列具有列和像素行。 交换网络适于接收来自图像阵列的像素信号。 多个计算元素用于计算至少x和y个质心的内积。 多个计算元件仅具有无源元件以提供交换网络的像素信号的内积。 分频器电路适于接收内部产品并计算x和y重心。

    CMOS imager for pointing and tracking applications
    7.
    发明授权
    CMOS imager for pointing and tracking applications 失效

    公开(公告)号：US07030356B2

    公开(公告)日：2006-04-18

    申请号：US10321300

    申请日：2002-12-16

    申请人： Bedabrata Pain ,  Chao Sun ,  Guang Yang ,  Julie B. Heynssens

    发明人： Bedabrata Pain ,  Chao Sun ,  Guang Yang ,  Julie B. Heynssens

    IPC分类号： H01I27/00

    CPC分类号： H04N5/3765 ,  H04N5/3454

    摘要： Systems and techniques to realize pointing and tracking applications with CMOS imaging devices. In general, in one implementation, the technique includes: sampling multiple rows and multiple columns of an active pixel sensor array into a memory array (e.g., an on-chip memory array), and reading out the multiple rows and multiple columns sampled in the memory array to provide image data with reduced motion artifact. Various operation modes may be provided, including TDS, CDS, CQS, a tracking mode to read out multiple windows, and/or a mode employing a sample-first-read-later readout scheme. The tracking mode can take advantage of a diagonal switch array. The diagonal switch array, the active pixel sensor array and the memory array can be integrated onto a single imager chip with a controller. This imager device can be part of a larger imaging system for both space-based applications and terrestrial applications.

    Photodiode CMOS imager with column-feedback soft-reset for imaging under ultra-low illumination and with high dynamic range
    8.
    发明授权
    Photodiode CMOS imager with column-feedback soft-reset for imaging under ultra-low illumination and with high dynamic range 有权
    光电二极管CMOS成像器，具有柱反馈软复位，可在超低照度和高动态范围内成像

    公开(公告)号：US07746383B2

    公开(公告)日：2010-06-29

    申请号：US10779144

    申请日：2004-02-12

    申请人： Bedabrata Pain ,  Thomas J. Cunningham ,  Bruce Hancock ,  Suresh Seshadri ,  Monico Ortiz ,  Guang Yang

    发明人： Bedabrata Pain ,  Thomas J. Cunningham ,  Bruce Hancock ,  Suresh Seshadri ,  Monico Ortiz ,  Guang Yang

    IPC分类号： H04N5/225 ,  H04N5/217 ,  H04N3/14 ,  H04N5/335

    CPC分类号： H04N5/363 ,  H04N5/357

    摘要： The present invention provides a CMOS imager with a reset scheme, by which a CMOS imager generates a sub-kTC noise so that read noise does not depend on the sense node capacitance. By using a column feedback circuit, reset noise can be suppressed to a negligible amount so that photogate APS or CCD-like circuits can achieve noise performance to very efficient value. This scheme allows increasing sense node capacitance without increasing the noise and also achieves a large full-well value without sacrificing read noise performance. The feedback circuit in one of the embodiment of the present invention is located at the column side of the circuit. This design provides a minimal change to the pixel. As a result quantum efficiency or pixel size is not compromised. The present invention allows a CMOS imager to capture scene with high intra-scene contracts under low illumination with high dynamic range.

    摘要翻译： 本发明提供了具有复位方案的CMOS成像器，CMOS成像器通过该方法产生子kTC噪声，使得读取噪声不依赖于感测节点电容。 通过使用列反馈电路，可以将复位噪声抑制到可忽略的量，使得光栅APS或类CCD电路可以实现非常有效的噪声性能。 该方案允许增加感测节点电容，而不增加噪声，并且还可以实现大的全阱值而不牺牲读取噪声性能。 本发明实施例之一的反馈电路位于电路的列侧。 此设计为像素提供了最小的变化。 因此量子效率或像素大小不会受到影响。 本发明允许CMOS成像器在具有高动态范围的低照度下捕获具有高的场景内契约的场景。

    Focal plane infrared readout circuit with automatic background suppression
    10.
    发明授权
    Focal plane infrared readout circuit with automatic background suppression 有权
    焦平面红外读出电路，具有自动背景抑制功能

    公开(公告)号：US06373050B1

    公开(公告)日：2002-04-16

    申请号：US09414976

    申请日：1999-10-07

    申请人： Bedabrata Pain ,  Guang Yang ,  Chao Sun ,  Timothy J. Shaw ,  Chris J. Wrigley

    发明人： Bedabrata Pain ,  Guang Yang ,  Chao Sun ,  Timothy J. Shaw ,  Chris J. Wrigley

    IPC分类号： G01V504

    CPC分类号： H04N5/361 ,  G01J1/16 ,  G01J1/46 ,  G01J3/2803 ,  H04N5/33

    摘要： A circuit for reading out a signal from an infrared detector includes a current-mode background-signal subtracting circuit having a current memory which can be enabled to sample and store a dark level signal from the infrared detector during a calibration phase. The signal stored by the current memory is subtracted from a signal received from the infrared detector during an imaging phase. The circuit also includes a buffered direct injection input circuit and a differential voltage readout section. By performing most of the background signal estimation and subtraction in a current mode, a low gain can be provided by the buffered direct injection input circuit to keep the gain of the background signal relatively small, while a higher gain is provided by the differential voltage readout circuit. An array of such readout circuits can be used in an imager having an array of infrared detectors. The readout circuits can provide a high effective handling capacity.

    摘要翻译： 用于从红外检测器读出信号的电路包括具有当前存储器的电流模式背景信号减法电路，其能够在校准阶段期间从红外检测器采样和存储暗电平信号。 在成像阶段，从红外检测器接收到的信号中减去当前存储器存储的信号。 电路还包括缓冲直接注入输入电路和差分电压读出部分。 通过在当前模式下执行大部分背景信号估计和减法，缓冲直接注入输入电路可以提供低增益，以保持背景信号的增益相对较小，而差分电压读出提供更高的增益 电路。 这种读出电路的阵列可用于具有红外检测器阵列的成像器中。 读出电路可以提供高效的处理能力。