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公开(公告)号:US20100261352A1
公开(公告)日:2010-10-14
申请号:US12756086
申请日:2010-04-07
申请人: Bing Ji , Kenji Takeshita , Andrew D. Bailey, III , Eric A. Hudson , Maryam Moravej , Stephen M. Sirard , Jungmin Ko , Daniel Le , Robert C. Hefty , Yu Cheng , Gerardo A. Delgadino , Bi-Ming Yen
发明人: Bing Ji , Kenji Takeshita , Andrew D. Bailey, III , Eric A. Hudson , Maryam Moravej , Stephen M. Sirard , Jungmin Ko , Daniel Le , Robert C. Hefty , Yu Cheng , Gerardo A. Delgadino , Bi-Ming Yen
IPC分类号: H01L21/467
CPC分类号: H01L21/31116 , H01L21/02063 , H01L21/31138
摘要: A method for etching features in a low-k dielectric layer disposed below an organic mask is provided by an embodiment of the invention. Features are etched into the low-k dielectric layer through the organic mask. A fluorocarbon layer is deposited on the low-k dielectric layer. The fluorocarbon layer is cured. The organic mask is stripped.
摘要翻译: 通过本发明的实施例提供了一种用于蚀刻位于有机掩模下方的低k电介质层中的特征的方法。 通过有机掩模将特征蚀刻到低k电介质层中。 在低k电介质层上沉积氟碳层。 氟碳层被固化。 剥去有机面膜。
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公开(公告)号:US08236188B2
公开(公告)日:2012-08-07
申请号:US12756086
申请日:2010-04-07
申请人: Bing Ji , Kenji Takeshita , Andrew D. Bailey, III , Eric A. Hudson , Maryam Moravej , Stephen M. Sirard , Jungmin Ko , Daniel Le , Robert C. Hefty , Yu Cheng , Gerardo A. Delgadino , Bi-Ming Yen
发明人: Bing Ji , Kenji Takeshita , Andrew D. Bailey, III , Eric A. Hudson , Maryam Moravej , Stephen M. Sirard , Jungmin Ko , Daniel Le , Robert C. Hefty , Yu Cheng , Gerardo A. Delgadino , Bi-Ming Yen
CPC分类号: H01L21/31116 , H01L21/02063 , H01L21/31138
摘要: A method for etching features in a low-k dielectric layer disposed below an organic mask is provided by an embodiment of the invention. Features are etched into the low-k dielectric layer through the organic mask. A fluorocarbon layer is deposited on the low-k dielectric layer. The fluorocarbon layer is cured. The organic mask is stripped.
摘要翻译: 通过本发明的实施例提供了一种用于蚀刻位于有机掩模下方的低k电介质层中的特征的方法。 通过有机掩模将特征蚀刻到低k电介质层中。 在低k电介质层上沉积氟碳层。 氟碳层被固化。 剥去有机面膜。
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公开(公告)号:US20100285671A1
公开(公告)日:2010-11-11
申请号:US12463155
申请日:2009-05-08
IPC分类号: H01L21/3065
CPC分类号: H01L21/31138 , G03F7/427 , H01L21/31116
摘要: A method for forming etched features in a low-k dielectric layer disposed below the photoresist mask in a plasma processing chamber is provided. Features are etched into the low-k dielectric layer through the photoresist mask. The photoresist mask is stripped, wherein the stripping comprising at least one cycle, wherein each cycle comprises a fluorocarbon stripping phase, comprising flowing a fluorocarbon stripping gas into the plasma processing chamber, forming a plasma from the fluorocarbon stripping gas, and stopping the flow of the fluorocarbon stripping gas into the plasma processing chamber and a reduced fluorocarbon stripping phase, comprising flowing a reduced fluorocarbon stripping gas that has a lower fluorocarbon flow rate than the fluorocarbon stripping gas into the plasma processing chamber, forming the plasma from the reduced fluorocarbon stripping gas, and stopping the flow of the reduced fluorocarbon stripping gas.
摘要翻译: 提供了一种用于在等离子体处理室中的光致抗蚀剂掩模下方形成低k电介质层中形成蚀刻特征的方法。 通过光致抗蚀剂掩模将特征蚀刻到低k电介质层中。 剥离光致抗蚀剂掩模,其中剥离包括至少一个循环,其中每个循环包括氟碳汽提相,包括将氟碳汽提气体流入等离子体处理室,从氟碳汽提气体形成等离子体,并停止 进入等离子体处理室中的碳氟化合物汽提气体和减少的氟碳汽提阶段,包括将具有低于碳氟化合物汽提气体的碳氟化合物流速低的氟化碳汽提气体流入等离子体处理室,从还原氟碳汽提气体形成等离子体 ,并停止还原氟烃剥离气体的流动。
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公开(公告)号:US08691701B2
公开(公告)日:2014-04-08
申请号:US12463155
申请日:2009-05-08
IPC分类号: H01L21/302
CPC分类号: H01L21/31138 , G03F7/427 , H01L21/31116
摘要: A method for forming etched features in a low-k dielectric layer disposed below the photoresist mask in a plasma processing chamber is provided. Features are etched into the low-k dielectric layer through the photoresist mask. The photoresist mask is stripped, wherein the stripping comprising at least one cycle, wherein each cycle comprises a fluorocarbon stripping phase, comprising flowing a fluorocarbon stripping gas into the plasma processing chamber, forming a plasma from the fluorocarbon stripping gas, and stopping the flow of the fluorocarbon stripping gas into the plasma processing chamber and a reduced fluorocarbon stripping phase, comprising flowing a reduced fluorocarbon stripping gas that has a lower fluorocarbon flow rate than the fluorocarbon stripping gas into the plasma processing chamber, forming the plasma from the reduced fluorocarbon stripping gas, and stopping the flow of the reduced fluorocarbon stripping gas.
摘要翻译: 提供了一种用于在等离子体处理室中的光致抗蚀剂掩模下方形成低k电介质层中形成蚀刻特征的方法。 通过光致抗蚀剂掩模将特征蚀刻到低k电介质层中。 剥离光致抗蚀剂掩模,其中剥离包括至少一个循环,其中每个循环包括氟碳汽提相,包括将氟碳汽提气体流入等离子体处理室,从氟碳汽提气体形成等离子体,并停止 进入等离子体处理室中的碳氟化合物汽提气体和减少的氟碳汽提阶段,包括将具有低于碳氟化合物汽提气体的碳氟化合物流速低的氟化碳汽提气体流入等离子体处理室,从还原氟碳汽提气体形成等离子体 ,并停止还原氟烃剥离气体的流动。
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5.
公开(公告)号:US09536711B2
公开(公告)日:2017-01-03
申请号:US12047820
申请日:2008-03-13
IPC分类号: H01J37/32
CPC分类号: H01J37/32642 , H01J37/32091 , H01J37/32174 , H01J37/32623 , H01J37/32697
摘要: In a plasma processing chamber, a method for processing a substrate is provided. The method includes supporting the substrate in the plasma processing chamber configured with an upper electrode (UE) and a lower electrode (LE), configuring at least one radio frequency power source to ignite plasma between the UE and the LE, and providing a conductive coupling ring, the conductive coupling ring is coupled to the LE to provide a conductive path. The method further includes providing a plasma-facing-substrate-periphery (PFSP) ring, the PFSP ring being disposed above the conductive coupling ring. The method yet further includes coupling the PFSP ring to at least one of a direct current (DC) ground through an RF filter, the DC ground through the RF filter and a variable resistor, a positive DC power source through the RF filter, and a negative DC power source through the RF filter to control plasma processing parameters.
摘要翻译: 在等离子体处理室中,提供了一种处理基板的方法。 该方法包括在配置有上电极(UE)和下电极(LE)的等离子体处理室中支撑衬底,配置至少一个射频电源以点燃UE和LE之间的等离子体,并提供导电耦合 导电耦合环耦合到LE以提供导电路径。 该方法还包括提供等离子体对衬底周边(PFSP)环,PFSP环设置在导电耦合环上方。 该方法还包括将PFSP环耦合到通过RF滤波器的直流(DC)接地中的至少一个,通过RF滤波器的DC接地和可变电阻器,通过RF滤波器的正直流电源以及 负直流电源通过RF滤波器控制等离子体处理参数。
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公开(公告)号:US20100098875A1
公开(公告)日:2010-04-22
申请号:US12253511
申请日:2008-10-17
申请人: Andreas Fischer , Maryam Moravej
发明人: Andreas Fischer , Maryam Moravej
CPC分类号: C23C16/04 , C23C16/509 , H01J37/32091 , H01J37/32862 , H01L21/67028 , H01L21/6833
摘要: In a wafer processing system having an electrode, an electrostatic chuck (ESC) and a confinement chamber portion, the ESC is established to be RF-floating, whereas a confinement chamber portion is grounded during a pre-coating process. Accordingly, the confinement chamber portion and the upper electrode are selectively targeted for pre-coating material deposition. As such, the amount of pre-coating material that is deposited onto the ESC is greatly reduced over that of conventional systems. Therefore, less time, energy and material are needed to remove pre-coating material from the ESC during a wafer auto clean (WAC) process. Further, the upper electrode is established to be RF-floating, whereas the confinement chamber portion is grounded during a WAC process. As such, the cleaning material is selectively targeted toward the confinement hardware portion of the chamber. Therefore, the upper electrode is subjected to less wear during a WAC process.
摘要翻译: 在具有电极,静电卡盘(ESC)和约束室部分的晶片处理系统中,ESC被建立为RF浮动,而限制室部分在预涂工艺期间接地。 因此,限制室部分和上部电极被选择性地靶向用于预涂材料沉积。 因此,与常规系统相比,沉积在ESC上的预涂料的量大大降低。 因此,在晶圆自动清洗(WAC)过程中,需要较少的时间,能量和材料来从ESC中去除预涂材料。 此外,上电极被建立为RF浮动,而限制室部分在WAC处理期间接地。 因此,清洁材料选择性地朝向腔室的限制硬件部分。 因此,在WAC工艺期间,上电极受到较少的磨损。
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7.
公开(公告)号:US20080241420A1
公开(公告)日:2008-10-02
申请号:US12047820
申请日:2008-03-13
IPC分类号: H05H1/24
CPC分类号: H01J37/32642 , H01J37/32091 , H01J37/32174 , H01J37/32623 , H01J37/32697
摘要: In a plasma processing chamber, a method for processing a substrate is provided. The method includes supporting the substrate in the plasma processing chamber configured with an upper electrode (UE) and a lower electrode (LE), configuring at least one radio frequency power source to ignite plasma between the UE and the LE, and providing a conductive coupling ring, the conductive coupling ring is coupled to the LE to provide a conductive path. The method further includes providing a plasma-facing-substrate-periphery (PFSP) ring, the PFSP ring being disposed above the conductive coupling ring. The method yet further includes coupling the PFSP ring to at least one of a direct current (DC) ground through an RF filter, the DC ground through the RF filter and a variable resistor, a positive DC power source through the RF filter, and a negative DC power source through the RF filter to control plasma processing parameters.
摘要翻译: 在等离子体处理室中,提供了一种处理基板的方法。 该方法包括在配置有上电极(UE)和下电极(LE)的等离子体处理室中支撑衬底,配置至少一个射频电源以点燃UE和LE之间的等离子体,并提供导电耦合 导电耦合环耦合到LE以提供导电路径。 该方法还包括提供等离子体对衬底周边(PFSP)环,PFSP环设置在导电耦合环上方。 该方法还包括将PFSP环耦合到通过RF滤波器的直流(DC)接地中的至少一个,通过RF滤波器的DC接地和可变电阻器,通过RF滤波器的正直流电源,以及 负直流电源通过RF滤波器控制等离子体处理参数。
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