Base cards and IC cards using the same
    1.
    发明授权
    Base cards and IC cards using the same 失效
    基卡和IC卡使用相同

    公开(公告)号:US6028774A

    公开(公告)日:2000-02-22

    申请号:US81098

    申请日:1998-05-19

    摘要: A base card improves the mounting reliability of a COB package particularly when the package has molding by-products such as epoxy burrs or molding flashes. The base card has a COB package receiving part made up of first and second sections. The receiving part is stepped so that the sections thereof have shapes that are complementary to that of and for receiving a peripheral portion of the printed circuit board of the COB package and the package body the COB package, respectively. The second section has a bevel at the transition of the first section into the second section. This bevel helps define a space in which the by-products are accommodated when the COB package is mounted to the base card. Further, the second section of the COB package receiving part may define an opening in the bottom surface of the base card. This opening also prevents damage to the base card by preventing the need for the bottom of the package body to bear against the bottom of the base card when the COB package is mounted to the base card.

    摘要翻译: 基卡提高了COB封装的安装可靠性,特别是当封装具有成型副产品如环氧树脂毛刺或成型闪光时。 基卡具有由第一和第二部分组成的COB包装容纳部。 接收部分是台阶状的,使得它们的部分分别与COB封装的印刷电路板的周边部分和COB封装的封装体互补的形状。 第二部分在第一部分到第二部分的过渡处具有斜面。 当COB封装安装到基卡时,该斜面有助于定义容纳副产品的空间。 此外,COB封装容纳部件的第二部分可以限定底卡底面的开口。 当COB封装安装到基卡上时,该开口也防止了对基卡的损坏,防止了封装体的底部承受基座的底部。

    Printed circuit board and chip-on-board packages using same
    2.
    发明授权
    Printed circuit board and chip-on-board packages using same 失效
    印刷电路板和使用相同的片上芯片封装

    公开(公告)号:US6104095A

    公开(公告)日:2000-08-15

    申请号:US87903

    申请日:1998-05-01

    摘要: A printed circuit board (PCB) for use in chip-on-board (COB) packages reduces failures due to warping of the COB packages. The PCB includes a board body having a upper surface and a lower surface, a chip bonding area on the upper surface for attaching a semiconductor device, and a plurality of conductors in a circuit pattern on the upper surface outside the chip bonding area, for electrical connection to the semiconductor device using a plurality of bonding wires. An encapsulation region encloses the chip bonding area, the bonding wires, a portion of the plurality of conductors, and a portion of the upper surface. The board includes external contacts on the lower surface for electrical connections to an external electrical appliance, and via holes through the board body for electrically connecting the plurality of conductors in the circuit pattern to the external contacts. A plurality of volume-adjusting regions, on the upper surface outside the chip bonding area and inside the encapsulation region, adjust a volume of a molding compound in the final package.

    摘要翻译: 用于板载(COB)封装的印刷电路板(PCB)减少了由于COB封装翘曲引起的故障。 PCB包括具有上表面和下表面的板体,用于附接半导体器件的上表面上的芯片接合区域和在芯片接合区域的上表面上的电路图案中的多个导体,用于电气 使用多个接合线连接到半导体器件。 封装区域包围芯片接合区域,接合线,多个导体的一部分以及上表面的一部分。 该电路板包括在下表面上用于与外部电气设备的电连接的外部触点,以及穿过电路板主体的通孔,用于将电路图案中的多个导体电连接到外部触点。 在芯片接合区域的外表面和封装区域内的上表面上的多个体积调节区域调节最终封装中的模塑料的体积。

    Apparatus for calibrating termination voltage of on-die termination
    3.
    发明授权
    Apparatus for calibrating termination voltage of on-die termination 有权
    用于校准管芯端接端接电压的装置

    公开(公告)号:US07170313B2

    公开(公告)日:2007-01-30

    申请号:US10999500

    申请日:2004-11-30

    申请人: Bo Hyun Shin

    发明人: Bo Hyun Shin

    IPC分类号: H03K17/16

    CPC分类号: H04L25/0278

    摘要: Disclosed is a device for calibrating termination voltage of an on-die termination. The device for calibrating termination voltage of an on-die termination for a semiconductor memory device having a DLL device, comprises an on-die termination enable signal generating part for outputting an ODT enable signal for driving the on-die termination (ODT) when a signal DLL Reset EMRS is applied, a counter circuit of for outputting a plurality of counter signals, an on-die termination (ODT) including a variable resistor part controlled by the counter signals outputted from the counter circuit and outputting a variable termination voltage according to a resistance value of the variable resistor part, and a first control part for comparing a reference voltage with the termination voltage and outputting a control signal for controlling the counter circuit according to a comparison result.

    摘要翻译: 公开了一种用于校准管芯端接端接电压的装置。 用于校准具有DLL设备的半导体存储器件的片上端接器的终端电压的装置包括一个片上终止使能信号产生部分,用于当一个用于驱动片上终端(ODT)时输出用于驱动管芯端接(ODT)的ODT使能信号 信号DLL复位EMRS,用于输出多个计数器信号的计数器电路,包括由从计数器电路输出的计数器信号控制的可变电阻器部分的片上终端(ODT),并输出可变终止电压 可变电阻器部分的电阻值,以及用于将参考电压与终止电压进行比较的第一控制部分,并且根据比较结果输出用于控制计数器电路的控制信号。