公开(公告)号：US08921816B2

公开(公告)日：2014-12-30

申请号：US13178762

申请日：2011-07-08

申请人： Bo-Young Seo ,  Byung-Suo Shim ,  Yong-Kyu Lee ,  Tea-Kwang Yu ,  Ji-Hoon Park

发明人： Bo-Young Seo ,  Byung-Suo Shim ,  Yong-Kyu Lee ,  Tea-Kwang Yu ,  Ji-Hoon Park

IPC分类号： H01L29/02 ,  H01L27/24 ,  H01L27/102 ,  H01L45/00

CPC分类号： H01L27/1021 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/06

摘要： Provided is a semiconductor device. The semiconductor device includes a lower active region on a semiconductor substrate. A plurality of upper active regions protruding from a top surface of the lower active region and having a narrower width than the lower active region are provided. A lower isolation region surrounding a sidewall of the lower active region is provided. An upper isolation region formed on the lower isolation region, surrounding sidewalls of the upper active regions, and having a narrower width than the lower isolation region is provided. A first impurity region formed in the lower active region and extending into the upper active regions is provided. Second impurity regions formed in the upper active regions and constituting a diode together with the first impurity region are provided. A method of fabricating the same is provided as well.

摘要翻译： 提供一种半导体器件。 该半导体器件包括半导体衬底上的下部有源区。 提供从下部有源区域的顶表面突出并且具有比下部有源区域更窄的多个上部有源区域。 提供了围绕下部有源区域的侧壁的下部隔离区域。 提供了形成在下隔离区域上的上隔离区域，其围绕上活性区域的侧壁，并且具有比下隔离区域窄的宽度。 提供形成在下部有源区并延伸到上部有源区的第一杂质区。 提供形成在上部有源区并与第一杂质区一起构成二极管的第二杂质区。 还提供了制造该方法的方法。

公开(公告)号：US20120007212A1

公开(公告)日：2012-01-12

申请号：US13178762

申请日：2011-07-08

申请人： Bo-Young SEO ,  Byung-Suo Shim ,  Yong-Kyu Lee ,  Tea-Kwang Yu ,  Ji-Hoon Park

发明人： Bo-Young SEO ,  Byung-Suo Shim ,  Yong-Kyu Lee ,  Tea-Kwang Yu ,  Ji-Hoon Park

IPC分类号： H01L29/06

CPC分类号： H01L27/1021 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/06

摘要： Provided is a semiconductor device. The semiconductor device includes a lower active region on a semiconductor substrate. A plurality of upper active regions protruding from a top surface of the lower active region and having a narrower width than the lower active region are provided. A lower isolation region surrounding a sidewall of the lower active region is provided. An upper isolation region formed on the lower isolation region, surrounding sidewalls of the upper active regions, and having a narrower width than the lower isolation region is provided. A first impurity region formed in the lower active region and extending into the upper active regions is provided. Second impurity regions formed in the upper active regions and constituting a diode together with the first impurity region are provided. A method of fabricating the same is provided as well.

摘要翻译： 提供一种半导体器件。 该半导体器件包括半导体衬底上的下部有源区。 提供从下部有源区域的顶表面突出并且具有比下部有源区域更窄的多个上部有源区域。 提供了围绕下部有源区域的侧壁的下部隔离区域。 提供了形成在下隔离区域上的上隔离区域，其围绕上活性区域的侧壁，并且具有比下隔离区域窄的宽度。 提供形成在下部有源区并延伸到上部有源区的第一杂质区。 提供形成在上部有源区并与第一杂质区一起构成二极管的第二杂质区。 还提供了制造该方法的方法。

公开(公告)号：US08476130B2

公开(公告)日：2013-07-02

申请号：US13180613

申请日：2011-07-12

申请人： Tea-Kwang Yu ,  Byung-Sup Shim ,  Yong-Kyu Lee ,  Bo-Young Seo ,  Yong-Tae Kim

发明人： Tea-Kwang Yu ,  Byung-Sup Shim ,  Yong-Kyu Lee ,  Bo-Young Seo ,  Yong-Tae Kim

IPC分类号： H01L21/8238

CPC分类号： H01L27/2436 ,  H01L27/105 ,  H01L27/2445 ,  H01L45/1683

摘要： A method of fabricating a semiconductor device includes providing a substrate having a memory block and a logic block defined therein, forming a dummy gate pattern on the memory block; forming a first region of a first conductivity type at one side of the dummy gate pattern and a second region of a second conductivity type at the other side of the dummy gate pattern, and forming a nonvolatile memory device electrically connected to the first region.

摘要翻译： 一种制造半导体器件的方法包括提供具有存储块和在其中定义的逻辑块的衬底，在存储块上形成伪栅极图案; 在伪栅极图案的一侧形成第一导电类型的第一区域和在虚拟栅极图案的另一侧形成第二导电类型的第二区域，以及形成与第一区域电连接的非易失性存储器件。

公开(公告)号：US20120087189A1

公开(公告)日：2012-04-12

申请号：US13177873

申请日：2011-07-07

申请人： Yong-Kyu Lee ,  Tea-Kwang Yu ,  Bo-Young Seo

发明人： Yong-Kyu Lee ,  Tea-Kwang Yu ,  Bo-Young Seo

IPC分类号： G11C16/04

CPC分类号： G11C16/0408 ,  G11C16/0425 ,  G11C16/06 ,  G11C16/3418

摘要： A non-volatile memory device includes a first sector including a first sector selection transistor and a first plurality of pages connected to the first sector selection transistor, and a second sector including a second sector selection transistor and a second plurality of pages connected to the second sector selection transistor. Each of the first and second plurality of pages includes a memory transistor and a selection transistor, and a number of pages in the first plurality of pages is greater than a number of pages in the second plurality of pages.

摘要翻译： 非易失性存储器件包括第一扇区，包括第一扇区选择晶体管和连接到第一扇区选择晶体管的第一多个页，以及包括第二扇区选择晶体管的第二扇区和连接到第二扇区选择晶体管的第二多个页 扇区选择晶体管。 第一和第二多页中的每一页包括存储晶体管和选择晶体管，并且第一多页中的页数大于第二多页中的页数。

公开(公告)号：US08526231B2

公开(公告)日：2013-09-03

申请号：US13177873

申请日：2011-07-07

申请人： Yong-Kyu Lee ,  Tea-Kwang Yu ,  Bo-Young Seo

发明人： Yong-Kyu Lee ,  Tea-Kwang Yu ,  Bo-Young Seo

IPC分类号： G11C11/34

CPC分类号： G11C16/0408 ,  G11C16/0425 ,  G11C16/06 ,  G11C16/3418

摘要： A non-volatile memory device includes a first sector including a first sector selection transistor and a first plurality of pages connected to the first sector selection transistor, and a second sector including a second sector selection transistor and a second plurality of pages connected to the second sector selection transistor. Each of the first and second plurality of pages includes a memory transistor and a selection transistor, and a number of pages in the first plurality of pages is greater than a number of pages in the second plurality of pages.

摘要翻译： 非易失性存储器件包括第一扇区，包括第一扇区选择晶体管和连接到第一扇区选择晶体管的第一多个页，以及包括第二扇区选择晶体管的第二扇区和连接到第二扇区选择晶体管的第二多个页 扇区选择晶体管。 第一和第二多页中的每一页包括存储晶体管和选择晶体管，并且第一多页中的页数大于第二多页中的页数。

公开(公告)号：US20120070949A1

公开(公告)日：2012-03-22

申请号：US13180613

申请日：2011-07-12

申请人： Tea-Kwang Yu ,  Byung-Sup Shim ,  Yong-Kyu Lee ,  Bo-Young Seo ,  Yong-Tae Kim

发明人： Tea-Kwang Yu ,  Byung-Sup Shim ,  Yong-Kyu Lee ,  Bo-Young Seo ,  Yong-Tae Kim

IPC分类号： H01L21/8239 ,  H01L21/8229

CPC分类号： H01L27/2436 ,  H01L27/105 ,  H01L27/2445 ,  H01L45/1683

摘要： A method of fabricating a semiconductor device includes providing a substrate having a memory block and a logic block defined therein, forming a dummy gate pattern on the memory block; forming a first region of a first conductivity type at one side of the dummy gate pattern and a second region of a second conductivity type at the other side of the dummy gate pattern, and forming a nonvolatile memory device electrically connected to the first region.

摘要翻译： 一种制造半导体器件的方法包括提供具有存储块和在其中定义的逻辑块的衬底，在存储块上形成伪栅极图案; 在伪栅极图案的一侧形成第一导电类型的第一区域和在虚拟栅极图案的另一侧形成第二导电类型的第二区域，以及形成与第一区域电连接的非易失性存储器件。

公开(公告)号：US20150155024A1

公开(公告)日：2015-06-04

申请号：US14448717

申请日：2014-07-31

申请人： Bo-Young SEO ,  Yong-Kyu Lee ,  Choong-Jae Lee ,  Kee-Moon Chun ,  Hee-Seog Jeon

发明人： Bo-Young SEO ,  Yong-Kyu Lee ,  Choong-Jae Lee ,  Kee-Moon Chun ,  Hee-Seog Jeon

IPC分类号： G11C11/16

CPC分类号： G11C11/1675 ,  G11C11/16 ,  G11C11/1659

摘要： A magnetic memory device includes word lines, bit lines intersecting the word lines, magnetic memory elements disposed at intersections between the word lines and the bit lines, and selection transistors connected to the word lines. The magnetic memory elements share a word line among the plurality of word lines and also share a selection transistor connected to the word line that is shared among the selection transistors. Related systems and operating methods are also described.

摘要翻译： 磁存储器件包括字线，与字线交叉的位线，设置在字线和位线之间的交叉处的磁存储元件，以及连接到字线的选择晶体管。 磁存储元件在多个字线之间共享字线，并且共享连接到在选择晶体管之间共享的字线的选择晶体管。 还描述了相关系统和操作方法。

公开(公告)号：US09330745B2

公开(公告)日：2016-05-03

申请号：US14509756

申请日：2014-10-08

申请人： Bo-Young Seo ,  Yong-Kyu Lee ,  Choong-Jae Lee ,  Hee-Seog Jeon

发明人： Bo-Young Seo ,  Yong-Kyu Lee ,  Choong-Jae Lee ,  Hee-Seog Jeon

IPC分类号： G11C11/16

CPC分类号： G11C11/161 ,  G11C11/1655 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675

摘要： A magnetic memory device includes first and second magnetic memory cells coupled to first and second bit lines, respectively. The first and second magnetic memory cells respectively include a pinned magnetic layer, a free magnetic layer, and a tunnel insulating layer therebetween. Respective stacking orders of the pinned magnetic layer, the tunnel insulating layer, and the free magnetic layer are different in the first and second magnetic memory cells. The magnetic memory device further includes at least one transistor that is configured to couple the first and second magnetic memory cells to a common source line. Related methods of operation are also discussed.

摘要翻译： 磁存储器件包括分别耦合到第一和第二位线的第一和第二磁存储器单元。 第一和第二磁存储单元分别包括钉扎磁性层，自由磁性层和隧道绝缘层。 固定磁性层，隧道绝缘层和自由磁性层的各个堆叠顺序在第一和第二磁性存储单元中是不同的。 磁存储器件还包括至少一个晶体管，其被配置为将第一和第二磁存储器单元耦合到公共源极线。 还讨论了相关的操作方法。

公开(公告)号：US09318181B2

公开(公告)日：2016-04-19

申请号：US14448717

申请日：2014-07-31

申请人： Bo-Young Seo ,  Yong-Kyu Lee ,  Choong-Jae Lee ,  Kee-Moon Chun ,  Hee-Seog Jeon

发明人： Bo-Young Seo ,  Yong-Kyu Lee ,  Choong-Jae Lee ,  Kee-Moon Chun ,  Hee-Seog Jeon

IPC分类号： G11C11/00 ,  G11C11/16

CPC分类号： G11C11/1675 ,  G11C11/16 ,  G11C11/1659

摘要： A magnetic memory device includes word lines, bit lines intersecting the word lines, magnetic memory elements disposed at intersections between the word lines and the bit lines, and selection transistors connected to the word lines. The magnetic memory elements share a word line among the plurality of word lines and also share a selection transistor connected to the word line that is shared among the selection transistors. Related systems and operating methods are also described.

摘要翻译： 磁存储装置包括字线，与字线交叉的位线，设置在字线和位线之间的交叉处的磁存储元件，以及连接到字线的选择晶体管。 磁存储元件在多个字线之间共享字线，并且共享连接到在选择晶体管之间共享的字线的选择晶体管。 还描述了相关系统和操作方法。

公开(公告)号：US20150179244A1

公开(公告)日：2015-06-25

申请号：US14509756

申请日：2014-10-08

申请人： Bo-Young Seo ,  Yong-Kyu Lee ,  Choong-Jae Lee ,  Hee-Seog Jeon

发明人： Bo-Young Seo ,  Yong-Kyu Lee ,  Choong-Jae Lee ,  Hee-Seog Jeon

IPC分类号： G11C11/16

CPC分类号： G11C11/161 ,  G11C11/1655 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675

摘要： A magnetic memory device includes first and second magnetic memory cells coupled to first and second bit lines, respectively. The first and second magnetic memory cells respectively include a pinned magnetic layer, a free magnetic layer, and a tunnel insulating layer therebetween. Respective stacking orders of the pinned magnetic layer, the tunnel insulating layer, and the free magnetic layer are different in the first and second magnetic memory cells. The magnetic memory device further includes at least one transistor that is configured to couple the first and second magnetic memory cells to a common source line. Related methods of operation are also discussed.

摘要翻译： 磁存储器件包括分别耦合到第一和第二位线的第一和第二磁存储器单元。 第一和第二磁存储单元分别包括钉扎磁性层，自由磁性层和隧道绝缘层。 固定磁性层，隧道绝缘层和自由磁性层的各个堆叠顺序在第一和第二磁性存储单元中是不同的。 磁存储器件还包括至少一个晶体管，其被配置为将第一和第二磁存储器单元耦合到公共源极线。 还讨论了相关的操作方法。