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    METHODS AND APPARATUSES FOR SHIFTING DATA SIGNALS TO MATCH COMMAND SIGNAL DELAY
    1.
    发明申请
    METHODS AND APPARATUSES FOR SHIFTING DATA SIGNALS TO MATCH COMMAND SIGNAL DELAY 有权
    用于将数据信号转换为匹配指令信号延迟的方法和装置

    公开(公告)号：US20130321052A1

    公开(公告)日：2013-12-05

    申请号：US13486674

    申请日：2012-06-01

    申请人： Brian Huber ,  Parthasarathy Gajapathy

    发明人： Brian Huber ,  Parthasarathy Gajapathy

    IPC分类号： H03L7/00

    CPC分类号： H03K5/135 ,  G11C7/04 ,  G11C7/1087 ,  G11C7/1093 ,  G11C7/222 ,  G11C19/00 ,  G11C2207/2272

    摘要： Methods and apparatuses for shifting data signals are disclosed herein. An apparatus may comprise a clock generation circuit, a delay path, and a driver. The clock generation circuit may be configured to receive an input clock signal and generate a plurality of clock signals based, at least in part, on the clock signal. A delay path may be coupled to the clock generation circuit and configured to receive the input clock signal and the plurality of clock signals. The delay path may be further configured to receive a data signal and delay the data signal based, at least in part, on the input clock signal and each of the plurality of clock signals. A driver may be coupled to the delay path and configured to receive the delayed data signal, and may further be configured to provide the delayed data signal to a bus.

    摘要翻译： 本文公开了用于移位数据信号的方法和装置。 装置可以包括时钟产生电路，延迟路径和驱动器。 时钟生成电路可以被配置为至少部分地基于时钟信号来接收输入时钟信号并产生多个时钟信号。 延迟路径可以耦合到时钟产生电路并且被配置为接收输入时钟信号和多个时钟信号。 延迟路径还可以被配置为至少部分地基于输入时钟信号和多个时钟信号中的每一个来接收数据信号并延迟数据信号。 驱动器可以耦合到延迟路径并且被配置为接收延迟的数据信号，并且还可以被配置为将延迟的数据信号提供给总线。

    Methods and apparatuses for shifting data signals to match command signal delay
    2.
    发明授权
    Methods and apparatuses for shifting data signals to match command signal delay 有权
    用于移位数据信号以匹配命令信号延迟的方法和装置

    公开(公告)号：US09166579B2

    公开(公告)日：2015-10-20

    申请号：US13486674

    申请日：2012-06-01

    申请人： Brian Huber ,  Parthasarathy Gajapathy

    发明人： Brian Huber ,  Parthasarathy Gajapathy

    IPC分类号： H03H11/26 ,  H03K5/135 ,  G11C7/04 ,  G11C7/10 ,  G11C7/22 ,  G11C19/00

    CPC分类号： H03K5/135 ,  G11C7/04 ,  G11C7/1087 ,  G11C7/1093 ,  G11C7/222 ,  G11C19/00 ,  G11C2207/2272

    摘要： Methods and apparatuses for shifting data signals are disclosed herein. An apparatus may comprise a clock generation circuit, a delay path, and a driver. The clock generation circuit may be configured to receive an input clock signal and generate a plurality of clock signals based, at least in part, on the clock signal. A delay path may be coupled to the clock generation circuit and configured to receive the input clock signal and the plurality of clock signals. The delay path may be further configured to receive a data signal and delay the data signal based, at least in part, on the input clock signal and each of the plurality of clock signals. A driver may be coupled to the delay path and configured to receive the delayed data signal, and may further be configured to provide the delayed data signal to a bus.

    摘要翻译： 本文公开了用于移位数据信号的方法和装置。 装置可以包括时钟产生电路，延迟路径和驱动器。 时钟生成电路可以被配置为至少部分地基于时钟信号来接收输入时钟信号并产生多个时钟信号。 延迟路径可以耦合到时钟产生电路并且被配置为接收输入时钟信号和多个时钟信号。 延迟路径还可以被配置为至少部分地基于输入时钟信号和多个时钟信号中的每一个来接收数据信号并延迟数据信号。 驱动器可以耦合到延迟路径并且被配置为接收延迟的数据信号，并且还可以被配置为将延迟的数据信号提供给总线。

    Control Strategy For Powering Auxiliary Device In Trolley Capable Mining Truck
    3.
    发明申请
    Control Strategy For Powering Auxiliary Device In Trolley Capable Mining Truck 审中-公开
    为推拉能力采矿车提供辅助设备的控制策略

    公开(公告)号：US20130140100A1

    公开(公告)日：2013-06-06

    申请号：US13308900

    申请日：2011-12-01

    申请人： Brian Huber

    发明人： Brian Huber

    IPC分类号： B60K6/20 ,  B60K1/00 ,  B60L5/04

    CPC分类号： B60K6/46 ,  B60L5/04 ,  B60L5/36 ,  Y02T10/6217

    摘要： A trolley capable mining truck includes a pantograph supported on machine frame for electrically connecting the truck with an overhead trolley line. A power system includes an onboard electrical power source providing electrical power to a pair of electric drive propulsion motors along a first electrical path in a first configuration of the power system. The electric drive propulsion motors, in turn, power ground engaging propulsion elements. In a second configuration of the power system, the pantograph provides electrical power from the overhead trolley line to the electric drive propulsion motors along a second electrical path, which includes a transient damping reactor. In a third configuration of the power system, the onboard electrical power source provides electrical power to an auxiliary device along a third electrical path including an auxiliary power converter, wherein the auxiliary power converter includes the transient damping reactor.

    摘要翻译： 具有推车能力的采矿车包括支撑在机架上的受电弓，用于将卡车与架空电车线电连接。 电力系统包括车载电源，其在电力系统的第一配置中沿着沿着第一电路径的一对电驱动推进电动机提供电力。 电驱动推进电机又是电动地面接合推进元件。 在电力系统的第二配置中，受电弓从第一电路向第二电路提供从架空电车线向电力驱动推进电动机的电力，其包括瞬时阻尼反应器。 在电力系统的第三配置中，车载电源沿着包括辅助功率转换器的第三电路向辅助设备提供电力，其中辅助功率转换器包括瞬态阻尼反应器。

    CIRCUITS, DEVICES, SYSTEMS, AND METHODS OF OPERATION FOR A LINEAR OUTPUT DRIVER
    4.
    发明申请
    CIRCUITS, DEVICES, SYSTEMS, AND METHODS OF OPERATION FOR A LINEAR OUTPUT DRIVER 有权
    线性输出驱动器的电路，器件，系统和操作方法

    公开(公告)号：US20090091986A1

    公开(公告)日：2009-04-09

    申请号：US11973022

    申请日：2007-10-05

    申请人： Venkatraghavan Bringivijayaraghavan ,  Brian Huber

    发明人： Venkatraghavan Bringivijayaraghavan ,  Brian Huber

    IPC分类号： G11C7/10 ,  H03K3/00

    CPC分类号： H03K19/0005 ,  H03K19/018528

    摘要： Embodiments are described for an output driver circuit capable of maintaining a substantially constant output impedance across a wide range of output voltages. The driver circuit includes a pull-up circuit and a pull-down circuit, each having two or more current paths that either source currents to or sink currents from the output node. The addition of the third current path provides additional current such that the sum of the total currents have a magnitude that changes linearly as the output voltage at the output node is being driven.

    摘要翻译： 对于能够在宽的输出电压范围内保持基本恒定的输出阻抗的输出驱动器电路的实施例进行了描述。 驱动器电路包括一个上拉电路和一个下拉电路，每个电路具有两个或多个电流路径，这些电流路径来自输出节点的源电流或吸收电流。 第三电流路径的添加提供额外的电流，使得总电流的总和具有随驱动输出节点处的输出电压而线性变化的幅度。

    Transcriptional regulatory sequence of carcinoembryonic antigen for expression targeting
    6.
    发明授权
    Transcriptional regulatory sequence of carcinoembryonic antigen for expression targeting 失效
    癌胚抗原的转录调控序列用于表达靶向

    公开(公告)号：US06194211B1

    公开(公告)日：2001-02-27

    申请号：US08646301

    申请日：1996-05-16

    申请人： Cynthia Ann Richards ,  Brian Huber

    发明人： Cynthia Ann Richards ,  Brian Huber

    IPC分类号： C12N1563

    CPC分类号： C12N15/85

    摘要： The transcriptional regulatory sequence (TRS) of Carcinoembryonic Antigen (CEA) and molecular chimeras comprising the CEA TRS and DNA encoding a heterologous enzyme are described. Such molecular chimeras are capable of targeting the expression of the heterologous enzyme to CEA-positive cells. The heterologous enzyme may be cytosine deaminase.

    摘要翻译： 描述了癌胚抗原（CEA）和包含CEA TRS和编码异源酶的DNA的分子嵌合体的转录调节序列（TRS）。 这种分子嵌合体能够将异源酶的表达靶向CEA阳性细胞。 异源酶可以是胞嘧啶脱氨酶。

    Circuits, devices, systems, and methods of operation for a linear output driver
    8.
    发明授权
    Circuits, devices, systems, and methods of operation for a linear output driver 有权
    线性输出驱动器的电路，器件，系统和操作方法

    公开(公告)号：US07511534B1

    公开(公告)日：2009-03-31

    申请号：US11973022

    申请日：2007-10-05

    申请人： Venkatraghavan Bringivijayaraghavan ,  Brian Huber

    发明人： Venkatraghavan Bringivijayaraghavan ,  Brian Huber

    IPC分类号： H03K19/0175

    CPC分类号： H03K19/0005 ,  H03K19/018528

    摘要： Embodiments are described for an output driver circuit capable of maintaining a substantially constant output impedance across a wide range of output voltages. The driver circuit includes a pull-up circuit and a pull-down circuit, each having two or more current paths that either source currents to or sink currents from the output node. The addition of the third current path provides additional current such that the sum of the total currents have a magnitude that changes linearly as the output voltage at the output node is being driven.

    摘要翻译： 对于能够在宽的输出电压范围内保持基本恒定的输出阻抗的输出驱动器电路的实施例进行了描述。 驱动器电路包括一个上拉电路和一个下拉电路，每个电路具有两个或多个电流路径，这些电流路径来自输出节点的源电流或吸收电流。 第三电流路径的添加提供额外的电流，使得总电流的总和具有随驱动输出节点处的输出电压而线性变化的幅度。