摘要:
A complementary metal oxide semiconductor (CMOS) device in which a single InxGa1-xSb quantum well serves as both an n-channel and a p-channel in the same device and a method for making the same. The InxGa1-xSb layer is part of a heterostructure that includes a Te-delta doped AlyGa1-ySb layer above the InxGa1-xSb layer on a portion of the structure. The portion of the structure without the Te-delta doped AlyGa1-ySb barrier layer can be fabricated into a p-FET by the use of appropriate source, gate, and drain terminals, and the portion of the structure retaining the Te-delta doped AlyGa1-ySb layer can be fabricated into an n-FET so that the structure forms a CMOS device, wherein the single InxGa1-xSb quantum well serves as the transport channel for both the n-FET portion and the p-FET portion of the heterostructure.
摘要翻译:在同一器件中单个In x Ga 1-x Sb量子阱用作n沟道和p沟道的互补金属氧化物半导体(CMOS)器件及其制造方法。 In x Ga 1-x Sb层是异质结构的一部分,其在结构的一部分上包括在In x Ga 1-x Sb层上方的Te-δ掺杂的Al y Ga 1-y Sb。 可以通过使用适当的源极,栅极和漏极端子将不具有Te-δ掺杂的AlI y Ga 1-y Sb阻挡层的部分结构制成p-FET,并且保留Te-δ掺杂的Al y Ga 1 -ySb层可以制造成n-FET,使得该结构形成CMOS器件,其中单个In x Ga 1-x Sb量子阱用作异质结构的n-FET部分和p-FET部分的传输沟道。
摘要:
A complementary metal oxide semiconductor (CMOS) device in which a single InxGa1-xSb quantum well serves as both an n-channel and a p-channel in the same device and a method for making the same. The InxGa1-xSb layer is part of a heterostructure that includes a Te-delta doped AlyGa1-ySb layer above the InxGa1-xSb layer on a portion of the structure. The portion of the structure without the Te-delta doped AlyGa1-ySb barrier layer can be fabricated into a p-FET by the use of appropriate source, gate, and drain terminals, and the portion of the structure retaining the Te-delta doped AlyGa1-ySb layer can be fabricated into an n-FET so that the structure forms a CMOS device, wherein the single InxGa1-xSb quantum well serves as the transport channel for both the n-FET portion and the p-FET portion of the heterostructure.
摘要翻译:在同一器件中单个In x Ga 1-x Sb量子阱用作n沟道和p沟道的互补金属氧化物半导体(CMOS)器件及其制造方法。 In x Ga 1-x Sb层是异质结构的一部分,其在结构的一部分上包括在In x Ga 1-x Sb层上方的Te-δ掺杂的Al y Ga 1-y Sb。 可以通过使用适当的源极,栅极和漏极端子将不具有Te-δ掺杂的AlI y Ga 1-y Sb阻挡层的部分结构制成p-FET,并且保留Te-δ掺杂的Al y Ga 1 -ySb层可以制造成n-FET,使得该结构形成CMOS器件,其中单个In x Ga 1-x Sb量子阱用作异质结构的n-FET部分和p-FET部分的传输沟道。
摘要:
A complementary metal oxide semiconductor (CMOS) device in which a single InxGa1-xSb quantum well serves as both an n-channel and a p-channel in the same device and a method for making the same. The InxGa1-xSb layer is part of a heterostructure that includes a Te-delta doped AlyGa1-ySb layer above the InxGa1-xSb layer on a portion of the structure. The portion of the structure without the Te-delta doped AlyGa1-ySb barrier layer can be fabricated into a p-FET by the use of appropriate source, gate, and drain terminals, and the portion of the structure retaining the Te-delta doped AlyGa1-ySb layer can be fabricated into an n-FET so that the structure forms a CMOS device, wherein the single InxGa1-xSb quantum well serves as the transport channel for both the n-FET portion and the p-FET portion of the heterostructure.
摘要翻译:在同一器件中单个In x Ga 1-x Sb量子阱用作n沟道和p沟道的互补金属氧化物半导体(CMOS)器件及其制造方法。 In x Ga 1-x Sb层是异质结构的一部分,其在结构的一部分上包括在In x Ga 1-x Sb层上方的Te-δ掺杂的Al y Ga 1-y Sb。 可以通过使用适当的源极,栅极和漏极端子将不具有Te-δ掺杂的AlI y Ga 1-y Sb阻挡层的部分结构制成p-FET,并且保留Te-δ掺杂的Al y Ga 1 -ySb层可以制造成n-FET,使得该结构形成CMOS器件,其中单个In x Ga 1-x Sb量子阱用作异质结构的n-FET部分和p-FET部分的传输沟道。
摘要:
A complementary metal oxide semiconductor (CMOS) device in which a single InxGa1-xSb quantum well serves as both an n-channel and a p-channel in the same device and a method for making the same. The InxGa1-xSb layer is part of a heterostructure that includes a Te-delta doped AlyGa1-ySb layer above the InxGa1-xSb layer on a portion of the structure. The portion of the structure without the Te-delta doped AlyGa1-ySb barrier layer can be fabricated into a p-FET by the use of appropriate source, gate, and drain terminals, and the portion of the structure retaining the Te-delta doped AlyGa1-ySb layer can be fabricated into an n-FET so that the structure forms a CMOS device, wherein the single InxGa1-xSb quantum well serves as the transport channel for both the n-FET portion and the p-FET portion of the heterostructure.
摘要翻译:在同一器件中单个In x Ga 1-x Sb量子阱用作n沟道和p沟道的互补金属氧化物半导体(CMOS)器件及其制造方法。 In x Ga 1-x Sb层是异质结构的一部分,其在结构的一部分上包括在In x Ga 1-x Sb层上方的Te-δ掺杂的Al y Ga 1-y Sb。 可以通过使用适当的源极,栅极和漏极端子将不具有Te-δ掺杂的AlI y Ga 1-y Sb阻挡层的部分结构制成p-FET,并且保留Te-δ掺杂的Al y Ga 1 -ySb层可以制造成n-FET,使得该结构形成CMOS器件,其中单个In x Ga 1-x Sb量子阱用作异质结构的n-FET部分和p-FET部分的传输沟道。
摘要:
An InGaAs n-channel quantum well heterostructure for use in a complementary transistor having a Sb-based p-channel. The heterostructure includes a buffer layer having a lattice constant intermediate that of the n- and p-channel materials and which is configured to accommodate the strain produced by a lattice-constant mismatch between the n-channel and p-channel materials.
摘要:
An InGaAs n-channel quantum well heterostructure for use in a complementary transistor having a Sb-based p-channel. The heterostructure includes a buffer layer having a lattice constant intermediate that of the n- and p-channel materials and which is configured to accommodate the strain produced by a lattice-constant mismatch between the n-channel and p-channel materials.
摘要:
An InGaAs n-channel quantum well heterostructure for use in a complementary transistor having a Sb-based p-channel. The heterostructure includes a buffer layer having a lattice constant intermediate that of the n- and p-channel materials and which is configured to accommodate the strain produced by a lattice-constant mismatch between the n-channel and p-channel materials.
摘要:
An InGaAs n-channel quantum well heterostructure for use in a complementary transistor having a Sb-based p-channel. The heterostructure includes a buffer layer having a lattice constant intermediate that of the n- and p-channel materials and which is configured to accommodate the strain produced by a lattice-constant mismatch between the n-channel and p-channel materials.
摘要:
A semiconductor device including a heterostructure having at least one low-resistivity p-type GaSb quantum well is provided. The heterostructure includes a layer of InwAl1−wAs on a semi-insulating (100) InP substrate, where the InwAl1−wAs is lattice matched to InP, followed by an AlAsxSb1−x buffer layer on the InwAl1−wAs layer, an AlAsxSb1−x spacer layer on the buffer layer, a GaSb quantum well layer on the spacer layer, an AlAsxSb1−x barrier layer on the quantum well layer, an InyAl1−ySb layer on the barrier layer, and an InAs cap. The semiconductor device is suitable for use in low-power electronic devices such as field-effect transistors.
摘要翻译:提供包括具有至少一个低电阻率p型GaSb量子阱的异质结构的半导体器件。 异质结构包括在半绝缘(100)InP衬底上的InwAl1-wAs层,其中InwAl1-wAs与InP晶格匹配,随后是InwAl1-wAs层上的AlAsxSb1-x缓冲层,AlAsxSb1-x 缓冲层上的间隔层,间隔层上的GaSb量子阱层,量子阱层上的AlAs x Sb 1-x势垒层,势垒层上的In y Al 1-y Sb层和InAs帽。 半导体器件适用于诸如场效应晶体管的低功率电子器件。
摘要:
This invention pertains to more sensitive and more stable electronic devices which can sense electrical and magnetic fields. The devices are characterized by InAs channels confined on both sides thereof by a wide band gap AlSb material; protective layers above the AlSb material; modulation doping above the AlSb material; and layers of the InAs channel material containing 1 to 99 mol percent antimony, with the channel material being deposited in the form of alternating monolayers of InSb and InAs, of a ternary mixture of InAsSb.