公开(公告)号：US20140319676A1

公开(公告)日：2014-10-30

申请号：US14327985

申请日：2014-07-10

Applicant: CANON ANELVA CORPORATION

Inventor： Akira MATSUO ,  Yohsuke SHIBUYA ,  Naomu KITANO ,  Eitaroh MORIMOTO ,  Koji YAMAZAKI ,  Yu SATO ,  Takuya SEINO

IPC: H01L29/49 ,  H01L21/28

CPC classification number: H01L29/4966 ,  C23C14/046 ,  C23C14/345 ,  C23C14/35 ,  C23C14/5826 ,  C23C14/586 ,  H01J37/3402 ,  H01J37/3447 ,  H01J37/3452 ,  H01L21/28088 ,  H01L21/2855 ,  H01L21/32051 ,  H01L21/321 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/823842 ,  H01L29/66545

Abstract: It is an object of the present invention to provide an electronic component manufacturing method, capable of suppressing reduction in a trench opening and suppressing diffusion of a metal film embedded in a trench. An embodiment of the present invention is an electronic component manufacturing method, including the steps of: forming a first electrode constituting layer (e.g., a TiAl film) in a recess (e.g., a trench) formed in a workpiece; forming an ultrathin barrier layer (e.g., a TiAlN film) by forming a nitride layer by plasma-nitriding a surface of the first electrode constituting layer; and forming a second electrode constituting layer (e.g., an Al wiring layer) on the ultrathin barrier layer.

Abstract translation: 本发明的目的是提供一种电子部件制造方法，能够抑制沟槽开口的减少和抑制嵌入在沟槽中的金属膜的扩散。 本发明的一个实施例是一种电子部件制造方法，包括以下步骤：在形成在工件中的凹部（例如沟槽）中形成第一电极构成层（例如TiAl膜）; 通过等离子体氮化第一电极构成层的表面形成氮化物层来形成超薄势垒层（例如，TiAlN膜）; 以及在所述超薄阻挡层上形成第二电极构成层（例如Al布线层）。

公开(公告)号：US20130071975A1

公开(公告)日：2013-03-21

申请号：US13675147

申请日：2012-11-13

Applicant: Canon Anelva Corporation

Inventor： Naomu KITANO ,  Takuya SEINO ,  Akira MATSUO ,  Yu SATO ,  Eitaro MORIMOTO

IPC: H01L21/285 ,  H01L29/66

CPC classification number: H01L21/28556 ,  C23C14/04 ,  C23C14/0641 ,  C23C14/351 ,  C23C14/54 ,  H01J37/34 ,  H01J37/345 ,  H01J37/3452 ,  H01J37/3455 ,  H01L21/2855 ,  H01L21/823842 ,  H01L21/823864 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66477 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7833

Abstract: The present invention provides a method and apparatus for manufacturing a semiconductor device using a PVD method and enabling achievement of a desired effective work function and reduction in leak current without increasing an equivalent oxide thickness. A method for manufacturing a semiconductor device in an embodiment of the present invention includes the steps of: preparing a substrate on which an insulating film having a relative permittivity higher than that of a silicon oxide film is formed; and depositing a metal nitride film on the insulating film. The metal nitride depositing step is a step of sputtering deposition in an evacuatable chamber using a metal target and a cusp magnetic field formed over a surface of the metal target by a magnet mechanism in which magnet pieces are arranged as grid points in such a grid form that the adjacent magnet pieces have their polarities reversed from each other.

Abstract translation: 本发明提供一种使用PVD方法制造半导体器件的方法和装置，并且能够实现期望的有效功函数并且在不增加等效氧化物厚度的情况下降低漏电流。 本发明的实施方式的半导体装置的制造方法包括以下步骤：制作其上形成有相对介电常数高于氧化硅膜的绝缘膜的基板; 以及在所述绝缘膜上沉积金属氮化物膜。 金属氮化物沉积步骤是使用金属靶溅射沉积在可抽出腔室中的步骤，并且通过磁体机构在金属靶材的表面上形成的尖点磁场，其中磁体块以这种格子形式布置为网格点 相邻的磁铁片的极性彼此相反。