公开(公告)号：US20100221494A1

公开(公告)日：2010-09-02

申请号：US12465655

申请日：2009-05-14

申请人： Chang-Ming Lu ,  Chih-Wei Chao ,  Te-Chung Wang ,  Kuo-Lung Fang ,  Chun-Jong Chang

发明人： Chang-Ming Lu ,  Chih-Wei Chao ,  Te-Chung Wang ,  Kuo-Lung Fang ,  Chun-Jong Chang

IPC分类号： B32B3/00 ,  H01L21/20

CPC分类号： H01L21/02647 ,  C30B25/02 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/02433 ,  H01L21/02639 ,  Y10T428/24479

摘要： A method for forming a semiconductor layer includes following steps. First, an epitaxial substrate having at least a first growth region and at least a second growth region is provided. An area ratio of C plane to R plane in the first growth region is greater than 52/48. An epitaxial process is then performed on the epitaxial substrate to form a semiconductor layer. During the epitaxial process, a semiconductor material is selectively grown on the first growth region, and then the semiconductor material is laterally overgrown on the second growth region and covers the same.

摘要翻译： 形成半导体层的方法包括以下步骤。 首先，提供具有至少第一生长区和至少第二生长区的外延衬底。 第一生长区域中C面与R面的面积比大于52/48。 然后在外延衬底上进行外延工艺以形成半导体层。 在外延工艺期间，半导体材料选择性地生长在第一生长区域上，然后半导体材料在第二生长区域上横向长满而覆盖。

公开(公告)号：US20120037952A1

公开(公告)日：2012-02-16

申请号：US13029677

申请日：2011-02-17

申请人： Mong-Ea Lin ,  Yao-Hui Lin ,  Chao-Ming Chiu ,  Chang-Ming Lu

发明人： Mong-Ea Lin ,  Yao-Hui Lin ,  Chao-Ming Chiu ,  Chang-Ming Lu

IPC分类号： H01L33/30 ,  H01L33/36 ,  B82Y20/00 ,  B82Y40/00

CPC分类号： H01L33/145 ,  H01L33/0079

摘要： A light emitting diode and a fabricating method thereof are provided. A first-type semiconductor layer, a light emitting layer and a second-type semiconductor layer with a first surface are sequentially formed a substrate. Next, the first surface is treated during a surface treatment process to form a current-blocking region which extends from the first surface to the light emitting layer to a depth of 1000 angstroms. Afterward, a first electrode is formed above the current-blocking region of the second-type semiconductor layer, and a second electrode is formed to electrically contact to the first-type semiconductor layer. Since the current-blocking region is formed with a determined depth within the second-type semiconductor layer, the light extraction efficiency of the light emitting diode may be increased.

摘要翻译： 提供一种发光二极管及其制造方法。 依次形成具有第一表面的第一类型半导体层，发光层和具有第二表面的第二类型半导体层。 接下来，在表面处理过程中处理第一表面以形成从第一表面延伸到发光层至1000埃的深度的电流阻挡区域。 之后，在第二型半导体层的电流阻挡区域的上方形成第一电极，形成与第一型半导体层电接触的第二电极。 由于在第二类型半导体层内形成具有确定深度的电流阻挡区域，所以可以增加发光二极管的光提取效率。

公开(公告)号：US6030872A

公开(公告)日：2000-02-29

申请号：US241545

申请日：1999-02-01

申请人： Jau-Hone Lu ,  Shu-Ying Lu ,  Chang-Ming Lu ,  Ya-Ling Hung

发明人： Jau-Hone Lu ,  Shu-Ying Lu ,  Chang-Ming Lu ,  Ya-Ling Hung

IPC分类号： H01L21/8234 ,  H01L21/336

CPC分类号： H01L21/823462 ,  Y10S438/981

摘要： A method for fabricating a mixed-mode device. A first gate oxide layer and a second gate oxide layer are formed. The polysilicon layer is used as a mask to pattern the gate oxide layers. Additionally, a top electrode is formed during the first gate oxide layer is patterned. A bottom electrode is formed during the second gate oxide layer is patterned. The first gate oxide layer and the second gate oxide layer are formed by a single oxidation operation, thus thicknesses of the first gate oxide layer and the second oxide layer can be effectively controlled.

摘要翻译： 一种混合模式装置的制造方法。 形成第一栅极氧化物层和第二栅极氧化物层。 多晶硅层用作掩模以对栅极氧化物层进行图案化。 此外，在第一栅极氧化物层被图案化时形成顶部电极。 在第二栅极氧化层被图案化时形成底部电极。 第一栅极氧化物层和第二栅极氧化物层通过单次氧化操作形成，从而能够有效地控制第一栅极氧化物层和第二氧化物层的厚度。

公开(公告)号：US08334549B2

公开(公告)日：2012-12-18

申请号：US13029677

申请日：2011-02-17

申请人： Mong-Ea Lin ,  Yao-Hui Lin ,  Chao-Ming Chiu ,  Chang-Ming Lu

发明人： Mong-Ea Lin ,  Yao-Hui Lin ,  Chao-Ming Chiu ,  Chang-Ming Lu

IPC分类号： H01L33/30

CPC分类号： H01L33/145 ,  H01L33/0079

摘要： A light emitting diode and a fabricating method thereof are provided. A first-type semiconductor layer, a light emitting layer and a second-type semiconductor layer with a first surface are sequentially formed a substrate. Next, the first surface is treated during a surface treatment process to form a current-blocking region which extends from the first surface to the light emitting layer to a depth of 1000 angstroms. Afterward, a first electrode is formed above the current-blocking region of the second-type semiconductor layer, and a second electrode is formed to electrically contact to the first-type semiconductor layer. Since the current-blocking region is formed with a determined depth within the second-type semiconductor layer, the light extraction efficiency of the light emitting diode may be increased.

摘要翻译： 提供一种发光二极管及其制造方法。 依次形成具有第一表面的第一类型半导体层，发光层和具有第二表面的第二类型半导体层。 接下来，在表面处理过程中处理第一表面以形成从第一表面延伸到发光层至1000埃的深度的电流阻挡区域。 之后，在第二型半导体层的电流阻挡区域的上方形成第一电极，形成与第一型半导体层电接触的第二电极。 由于在第二类型半导体层内形成具有确定深度的电流阻挡区域，所以可以增加发光二极管的光提取效率。

公开(公告)号：US09117915B2

公开(公告)日：2015-08-25

申请号：US13303149

申请日：2011-11-23

申请人： Chang-Ming Lu ,  Lun Tsai ,  Chia-Yu Chen

发明人： Chang-Ming Lu ,  Lun Tsai ,  Chia-Yu Chen

IPC分类号： H01L21/16 ,  H01L29/786 ,  G02F1/1368

CPC分类号： H01L29/7869 ,  G02F1/1368 ,  H01L29/78693

摘要： A thin film transistor (TFT) that includes a gate, an oxide semiconductor layer, a gate insulator, a source, and a drain is provided. The gate insulator is located between the oxide semiconductor layer and the gate. The source and the drain are in contact with different portions of the oxide semiconductor layer. Each of the source and the drain has a ladder-shaped sidewall that is partially covered by the oxide semiconductor layer. A method for fabricating the above-mentioned TFT is also provided.

摘要翻译： 提供了包括栅极，氧化物半导体层，栅极绝缘体，源极和漏极的薄膜晶体管（TFT）。 栅极绝缘体位于氧化物半导体层和栅极之间。 源极和漏极与氧化物半导体层的不同部分接触。 源极和漏极中的每一个具有被氧化物半导体层部分覆盖的梯形侧壁。 还提供了一种用于制造上述TFT的方法。

公开(公告)号：US20130043464A1

公开(公告)日：2013-02-21

申请号：US13303149

申请日：2011-11-23

申请人： Chang-Ming Lu ,  Lun Tsai ,  Chia-Yu Chen

发明人： Chang-Ming Lu ,  Lun Tsai ,  Chia-Yu Chen

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L29/7869 ,  G02F1/1368 ,  H01L29/78693

摘要： A thin film transistor (TFT) that includes a gate, an oxide semiconductor layer, a gate insulator, a source, and a drain is provided. The gate insulator is located between the oxide semiconductor layer and the gate. The source and the drain are in contact with different portions of the oxide semiconductor layer. Each of the source and the drain has a ladder-shaped sidewall that is partially covered by the oxide semiconductor layer. A method for fabricating the above-mentioned TFT is also provided.

摘要翻译： 提供了包括栅极，氧化物半导体层，栅极绝缘体，源极和漏极的薄膜晶体管（TFT）。 栅极绝缘体位于氧化物半导体层和栅极之间。 源极和漏极与氧化物半导体层的不同部分接触。 源极和漏极中的每一个具有被氧化物半导体层部分覆盖的梯形侧壁。 还提供了一种用于制造上述TFT的方法。

公开(公告)号：US6100573A

公开(公告)日：2000-08-08

申请号：US136544

申请日：1998-08-19

申请人： Chang-Ming Lu ,  Shu-Ying Lu

发明人： Chang-Ming Lu ,  Shu-Ying Lu

IPC分类号： H01L23/485 ,  H01L29/00 ,  H01L23/48

CPC分类号： H01L24/05 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/05093 ,  H01L2224/05094 ,  H01L2224/05096 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/48463 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/14

摘要： The invention provides a structure of a bonding pad, which comprising: a substrate; a dielectric layer formed over the substrate; a first metal layer formed in the dielectric layer; a second metal layer formed in the dielectric layer and above the first metal layer; a plurality of first plugs formed between the first metal layer and the second metal layer, wherein the plugs are used for connecting the first metal layer with the second metal layer; a third metal layer formed over the dielectric layer; and a plurality of second plugs, formed between the second metal layer and the third metal layer, wherein the second plugs are used for connecting the second metal layer with the third metal layer.

摘要翻译： 本发明提供一种焊盘的结构，其包括：基板; 形成在所述基板上的电介质层; 形成在所述电介质层中的第一金属层; 形成在所述电介质层中并位于所述第一金属层上方的第二金属层; 形成在所述第一金属层和所述第二金属层之间的多个第一插塞，其中所述插头用于将所述第一金属层与所述第二金属层连接; 形成在介电层上的第三金属层; 以及形成在所述第二金属层和所述第三金属层之间的多个第二插塞，其中所述第二插头用于将所述第二金属层与所述第三金属层连接。