Test method for yielding a known good die
    1.
    发明授权
    Test method for yielding a known good die 有权
    用于产生已知好的模具的测试方法

    公开(公告)号:US07694246B2

    公开(公告)日:2010-04-06

    申请号:US10177367

    申请日:2002-06-19

    IPC分类号: G06F17/50

    摘要: A semiconductor wafer is cut to singulate integrated circuit dice formed on the wafer. A die pick machine then positions and orients the singulated dice on a carrier base such that signal, power and ground pads formed on the surface of each die reside at predetermined positions relative to landmarks on the carrier base the die pick machine optically identifies. With the dice temporarily held in place on the carrier base, they are subjected to a series of testing and other processing steps. Since each die's signal pads reside in predetermined locations, they can be accessed by appropriately arranged probes providing test equipment with signal access to the pads during tests. After each test, a die pick machine may replace any die that fails the test with another die, thereby improving efficiency of subsequent testing and other processing resources.

    摘要翻译: 切割半导体晶片以对形成在晶片上的集成电路芯片进行分割。 然后,骰子拾取机器将分离的骰子定位和定位在载体基座上,使得形成在每个模具表面上的信号,功率和接地垫相对于骰子拾取机器光学识别的载体基座上的标志位于预定位置。 将骰子临时固定在承运人基地上,对其进行一系列测试和其他处理步骤。 由于每个管芯的信号焊盘都位于预定位置,所以它们可以通过适当布置的探头进行访问,从而在测试期间为测试设备提供对焊盘的信号访问。 在每次测试之后,模具拾取机器可以用另一个模具代替未测试的任何模具,从而提高后续测试和其他处理资源的效率。

    Probe card cooling assembly with direct cooling of active electronic components
    2.
    发明授权
    Probe card cooling assembly with direct cooling of active electronic components 失效
    探针卡冷却组件,直接冷却有源电子部件

    公开(公告)号:US07863915B2

    公开(公告)日:2011-01-04

    申请号:US12547260

    申请日:2009-08-25

    申请人: Charles A. Miller

    发明人: Charles A. Miller

    IPC分类号: G01R31/02

    摘要: A probe card cooling assembly for use in a test system includes a package with one or more dies cooled by direct cooling. The cooled package includes one or more dies with active electronic components and at least one coolant port that allows a coolant to enter the high-density package and directly cool the active electronic components of the dies during a testing operation.

    摘要翻译: 用于测试系统的探针卡冷却组件包括具有通过直接冷却冷却的一个或多个模具的封装。 冷却的包装包括具有有源电子部件的一个或多个模具和允许冷却剂进入高密度封装并且在测试操作期间直接冷却模具的有效电子部件的至少一个冷却剂端口。

    Method and apparatus for remotely buffering test channels
    3.
    发明授权
    Method and apparatus for remotely buffering test channels 失效
    用于远程缓存测试通道的方法和设备

    公开(公告)号:US07825652B2

    公开(公告)日:2010-11-02

    申请号:US12273408

    申请日:2008-11-18

    申请人: Charles A. Miller

    发明人: Charles A. Miller

    IPC分类号: G01R31/28

    CPC分类号: G01R31/3008

    摘要: A system is provided to enable leakage current measurement or parametric tests to be performed with an isolation buffer provided in a channel line. Multiple such isolation buffers are used to connect a single signal channel to multiple lines. Leakage current measurement is provided by providing a buffer bypass element, such as a resistor or transmission gate, between the input and output of each buffer. The buffer bypass element can be used to calibrate buffer delay out of the test system by using TDR measurements to determine the buffer delay based on reflected pulses through the buffer bypass element. Buffer delay can likewise be calibrated out by comparing measurements of a buffered and non-buffered channel line, or by measuring a device having a known delay.

    摘要翻译: 提供了一种系统,用于使泄漏电流测量或参数测试能够与通道线中提供的隔离缓冲器一起进行。 多个这样的隔离缓冲器用于将单个信号通道连接到多条线路。 泄漏电流测量通过在每个缓冲器的输入和输出之间提供缓冲旁路元件(例如电阻器或传输门)来提供。 缓冲旁路元件可用于通过使用TDR测量来确定缓冲器延迟,以通过缓冲旁路元件反射的脉冲来校准测试系统中的缓冲延迟。 同样可以通过比较缓冲和非缓冲通道线的测量值,或通过测量具有已知延迟的器件来校准缓冲器延迟。

    METHOD AND APPARATUS FOR CALIBRATING AND/OR DESKEWING COMMUNICATIONS CHANNELS
    5.
    发明申请
    METHOD AND APPARATUS FOR CALIBRATING AND/OR DESKEWING COMMUNICATIONS CHANNELS 失效
    用于校准和/或消除通信通道的方法和装置

    公开(公告)号:US20100017662A1

    公开(公告)日:2010-01-21

    申请号:US12569584

    申请日:2009-09-29

    申请人: Charles A. Miller

    发明人: Charles A. Miller

    IPC分类号: G06F11/00

    摘要: A series of pulses may be driven down each drive channel, which creates a series of composite pulses at the output of the buffer. Each composite pulse is a composition of the individual pulses driven down the drive channels. Timing offsets associated with the drive channels may be adjusted until the individual pulses of the composite pulse align or closely align. Those timing offsets calibrate and/or deskew the drive channels, compensating for differences in the propagation delays through the drive channels. The composite pulse may be feed back to the tester through compare channels, and offsets associated with compare signals for each compare channel may be aligned to the composite pulse, which calibrates and/or deskews the compare channels.

    摘要翻译: 可以沿着每个驱动通道驱动一系列脉冲,这在缓冲器的输出端产生一系列复合脉冲。 每个复合脉冲是从驱动通道驱动的各个脉冲的组合。 可以调整与驱动通道相关联的定时偏移,直到复合脉冲的各个脉冲对准或紧密对准。 这些定时偏移校准和/或校正驱动通道,补偿通过驱动通道传播延迟的差异。 复合脉冲可以通过比较通道反馈给测试仪,并且与每个比较通道的比较信号相关的偏移量可以与校准和/或对比比较通道的复合脉冲对准。

    Wireless Test Cassette
    6.
    发明申请
    Wireless Test Cassette 有权
    无线测试盒

    公开(公告)号:US20090251162A1

    公开(公告)日:2009-10-08

    申请号:US12485677

    申请日:2009-06-16

    IPC分类号: G01R31/02

    摘要: A base controller disposed in a test cassette receives test data for testing a plurality of electronic devices. The base controller wirelessly transmits the test data to a plurality of wireless test control chips, which write the test data to each of the electronic devices. The wireless test control chips then read response data generated by the electronic devices, and the wireless test control chips wirelessly transmit the response data to the base controller.

    摘要翻译: 设置在测试盒中的基本控制器接收用于测试多个电子设备的测试数据。 基站控制器将测试数据无线传输到多个无线测试控制芯片,其将测试数据写入每个电子设备。 然后,无线测试控制芯片读取由电子设备产生的响应数据,无线测试控制芯片将响应数据无线发送到基本控制器。

    Probe card cooling assembly with direct cooling of active electronic components
    7.
    发明授权
    Probe card cooling assembly with direct cooling of active electronic components 失效
    探针卡冷却组件,直接冷却有源电子部件

    公开(公告)号:US07579847B2

    公开(公告)日:2009-08-25

    申请号:US11112034

    申请日:2005-04-22

    申请人: Charles A. Miller

    发明人: Charles A. Miller

    IPC分类号: G01R31/02 G01R31/26

    摘要: A probe card cooling assembly for use in a test system includes a package with one or more dies cooled by direct cooling. The cooled package includes one or more dies with active electronic components and at least one coolant port that allows a coolant to enter the high-density package and directly cool the active electronic components of the dies during a testing operation.

    摘要翻译: 用于测试系统的探针卡冷却组件包括具有通过直接冷却冷却的一个或多个模具的封装。 冷却的包装包括具有有源电子部件的一个或多个模具和允许冷却剂进入高密度封装并且在测试操作期间直接冷却模具的有效电子部件的至少一个冷却剂端口。

    HIGH PERFORMANCE PROBE SYSTEM
    8.
    发明申请
    HIGH PERFORMANCE PROBE SYSTEM 失效
    高性能探测系统

    公开(公告)号:US20090134895A1

    公开(公告)日:2009-05-28

    申请号:US12259785

    申请日:2008-10-28

    申请人: Charles A. Miller

    发明人: Charles A. Miller

    IPC分类号: G01R31/02 H01R43/00 G01R1/067

    摘要: A probe system for providing signal paths between an integrated circuit (IC) tester and input/output, power and ground pads on the surfaces of ICs to be tested includes a probe board assembly, a flex cable and a set of probes arranged to contact the IC's I/O pads. The probe board assembly includes one or more rigid substrate layers with traces and vias formed on or within the substrate layers providing relatively low bandwidth signal paths linking the tester to probes accessing some of the IC's pads. The flex cable provides relatively high bandwidth signal paths linking the tester to probes accessing others of the IC's pads.

    摘要翻译: 用于在集成电路(IC)测试器和要测试的IC的表面上的输入/输出,电源和接地焊盘之间提供信号路径的探针系统包括探针板组件,柔性电缆和一组探针, IC的I / O焊盘。 探针板组件包括一个或多个刚性衬底层,其具有形成在衬底层上或衬底层内的迹线和通孔,其提供将测试器连接到访问IC的一些衬垫的探针的相对低带宽的信号路径。 柔性电缆提供相对高带宽的信号路径,将测试仪连接到访问IC其他焊盘的探针。

    Probe card assembly including a programmable device to selectively route signals from channels of a test system controller to probes
    9.
    发明授权
    Probe card assembly including a programmable device to selectively route signals from channels of a test system controller to probes 有权
    探头卡组合件包括可编程设备,用于选择性地将信号从测试系统控制器的通道传送到探头

    公开(公告)号:US07245134B2

    公开(公告)日:2007-07-17

    申请号:US11048167

    申请日:2005-01-31

    IPC分类号: G01R31/02

    摘要: A probe card of a wafer test system includes one or more programmable ICs, such as FPGAs, to provide routing from individual test signal channels to one of multiple probes. The programmable ICs can be placed on a base PCB of the probe card, or on a daughtercard attached to the probe card. With programmability, the PCB can be used to switch limited test system channels away from unused probes. Programmability further enables a single probe card to more effectively test devices having the same pad array, but having different pin-outs for different device options. Reprogrammability also allows test engineers to re-program as they are debugging a test program. Because the programmable IC typically includes buffers that introduce an unknown delay, in one embodiment measurement of the delay is accomplished by first programming the programmable IC to provide a loop back path to the test system so that buffer delay can be measured, and then reprogramming the programmable IC now with a known delay to connect to a device being tested.

    摘要翻译: 晶片测试系统的探针卡包括一个或多个可编程IC(例如FPGA),以提供从各个测试信号通道到多个探针之一的路由。 可编程IC可以放置在探针卡的基板上,也可以放置在与探针卡相连的子卡上。 具有可编程性,PCB可用于将有限的测试系统通道切换为未使用的探头。 可编程性进一步使单个探针卡能够更有效地测试具有相同焊盘阵列但具有针对不同器件选项的不同引脚的器件。 可重编程序还允许测试工程师在调试测试程序时进行重新编程。 因为可编程IC通常包括引入未知延迟的缓冲器,在一个实施例中,通过首先对可编程IC进行编程以提供到测试系统的回送路径来实现延迟的测量,从而可以测量缓冲器延迟,然后重新编程 可编程IC现在具有已知的延迟以连接到被测试的设备。

    Adjustable delay transmission line
    10.
    发明授权
    Adjustable delay transmission line 失效
    可调延时传输线

    公开(公告)号:US07239220B2

    公开(公告)日:2007-07-03

    申请号:US11422565

    申请日:2006-06-06

    申请人: Charles A. Miller

    发明人: Charles A. Miller

    IPC分类号: H01P9/00

    CPC分类号: H01P9/00 G01R31/2822

    摘要: A transmission line includes a signal conductor and at least one varactor diode capacitively coupled to the signal conductor. The transmission line's signal path delay is a function of its shunt capacitance, and the varactor's capacitance forms a part of the transmission line's shunt capacitance. The transmission line's signal path delay is adjusted by adjusting a control voltage across the varactor diode thereby to adjust the varactor diode's capacitance.

    摘要翻译: 传输线包括电容耦合到信号导体的信号导体和至少一个变容二极管。 传输线的信号路径延迟是其分流电容的函数,变容二极管的电容构成传输线分流电容的一部分。 通过调整变容二极管两端的控制电压来调整传输线的信号路径延迟,从而调整变容二极管的电容。