公开(公告)号：US20120235857A1

公开(公告)日：2012-09-20

申请号：US13421223

申请日：2012-03-15

申请人： Cheon Soo KIM ,  Pil Jae Park ,  Min Park ,  Kyung Hwan Park ,  Dong-Young Kim ,  Jeong-Geun Kim ,  Bon Tae Koo ,  Hyun Kyu Yu

发明人： Cheon Soo KIM ,  Pil Jae Park ,  Min Park ,  Kyung Hwan Park ,  Dong-Young Kim ,  Jeong-Geun Kim ,  Bon Tae Koo ,  Hyun Kyu Yu

IPC分类号： G01S13/10 ,  G01S13/42

CPC分类号： G01S13/345 ,  G01S13/931 ,  G01S2007/358 ,  G01S2013/0254

摘要： Disclosed is a radar apparatus supporting short range and long range radar operations, wherein a plurality of short range transmitting chirp signals and a plurality of long range transmitting chirp signals are generated by a predetermined modulation scheme and is transmitted to an object through at least one transmitting array antenna and signals reflected from the object is received through at least one receiving array antenna, and the plurality of long range transmitting chirp signals have transmission power larger than that for the plurality of short range transmitting chirp signals.

摘要翻译： 公开了一种支持短距离和远程雷达操作的雷达装置，其中通过预定的调制方案产生多个短距离发射啁啾信号和多个长距离发射啁啾信号，并通过至少一个发射 通过至少一个接收阵列天线接收从对象反射的阵列天线和信号，并且多个长距离发射啁啾信号的发射功率大于多个短距离发射啁啾信号的发射功率。

公开(公告)号：US20130183912A1

公开(公告)日：2013-07-18

申请号：US13552397

申请日：2012-07-18

申请人： Duong Quoc Hoang ,  Cheon Soo KIM ,  Pil Jae PARK ,  Min PARK ,  Hyun Kyu YU

发明人： Duong Quoc Hoang ,  Cheon Soo KIM ,  Pil Jae PARK ,  Min PARK ,  Hyun Kyu YU

IPC分类号： H04B1/38

CPC分类号： H04B1/38 ,  H03G1/0088 ,  H03G3/001

摘要： There is provided a baseband structure of a transceiver. In an embodiment, a baseband structure of a transceiver includes a Variable Gain Amplifier (VGA) configured to amplify an input signal by controlling a gain, one or more Fixed Gain Amplifiers (FGAs) connected in series to the VGA and configured to amplify an output signal of the VGA, and one or more selection switches configured to selectively operate the FGAs. In accordance with the present invention, since a plurality of FGAs is selectively driven according to a necessary gain and an LPFG includes an FGA, power consumption and the size of a chip can be reduced and the overall performance of a transceiver can be improved.

摘要翻译： 提供收发器的基带结构。 在一个实施例中，收发器的基带结构包括可变增益放大器（VGA），其被配置为通过控制增益来放大输入信号，一个或多个与VGA串联连接的固定增益放大器（FGAs），并被配置为放大输出 VGA的信号，以及被配置为选择性地操作FGA的一个或多个选择开关。 根据本发明，由于根据必要的增益选择性地驱动多个FGA，并且LPFG包括FGA，所以可以降低功耗并且可以减小芯片的尺寸，并且可以提高收发器的整体性能。

公开(公告)号：US20100201457A1

公开(公告)日：2010-08-12

申请号：US12608183

申请日：2009-10-29

申请人： Young Jae LEE ,  Cheon Soo KIM ,  Hyun Kyu YU

发明人： Young Jae LEE ,  Cheon Soo KIM ,  Hyun Kyu YU

IPC分类号： H01P5/22 ,  H03H7/42

CPC分类号： H03H11/32

摘要： A hybrid balun apparatus are disclosed. The hybrid balun apparatus can support both the reception mode and the transmission mode and be advantageous for a high level of integration, by replacing two transformers disposed at a reception path and a transmission path with a single transformer and integrating a T/R switch and a balun into a one chip. Therefore, an IC according to integration extends to a front stage of an antenna to facilitate interfacing between elements, and a burden for designing at a rear stage (i.e., LNA in the reception mode, and PA in the transmission mode) can be reduced.

摘要翻译： 公开了一种混合平衡 - 不平衡变换器。 混合平衡 - 不平衡转换装置可以同时支持接收模式和传输模式，并且通过用单个变压器代替布置在接收路径上的两个变压器和将T / R开关和 平衡不平衡变为一芯片。 因此，根据集成的IC延伸到天线的前级，以便于元件之间的接口，并且可以减少在后级设计的负担（即接收模式中的LNA，在传输模式下的PA）。

公开(公告)号：US20110204944A1

公开(公告)日：2011-08-25

申请号：US13098332

申请日：2011-04-29

申请人： Ja Yol LEE ,  Seong Do KIM ,  Mun Yang PARK ,  Cheon Soo KIM ,  Hyun Kyu YU

发明人： Ja Yol LEE ,  Seong Do KIM ,  Mun Yang PARK ,  Cheon Soo KIM ,  Hyun Kyu YU

IPC分类号： H03L7/08

CPC分类号： H03L7/16 ,  H03L7/095 ,  H03L7/099 ,  H03L7/103 ,  H03L2207/50

摘要： There is provided a digital lock detector and a frequency synthesizer using the same. The digital lock detector includes a comparator unit receiving a plurality of control bits, and generating a bit signal to notice a lock condition of the plurality of control bits; a delay cell block generating a plurality of delay signals based on the bit signal, and outputting a clock signal by combining the bit signal and the plurality of delay signals; and a detection unit detecting a shift time of the clock signal, and generating a lock indication signal according to the detection result.

摘要翻译： 提供了数字锁定检测器和使用该锁定检测器的频率合成器。 数字锁定检测器包括：接收多个控制位的比较器单元，并产生一个位信号以注意多个控制位的锁定状态; 延迟单元块，其基于所述位信号生成多个延迟信号，并通过组合所述位信号和所述多个延迟信号来输出时钟信号; 以及检测单元，其检测所述时钟信号的移位时间，并根据所述检测结果生成锁定指示信号。

公开(公告)号：US20130050016A1

公开(公告)日：2013-02-28

申请号：US13594173

申请日：2012-08-24

申请人： Cheon Soo KIM ,  Hyun Kyu YU

发明人： Cheon Soo KIM ,  Hyun Kyu YU

IPC分类号： G01S13/00

CPC分类号： H01L23/5227 ,  G01S7/03 ,  G01S13/931 ,  G01S2007/028 ,  H01L23/481 ,  H01L23/66 ,  H01L24/13 ,  H01L25/16 ,  H01L2223/6616 ,  H01L2223/6677 ,  H01L2224/131 ,  H01L2224/16 ,  H01Q9/285 ,  H01Q19/30 ,  H01L2924/014

摘要： The present invention relates to a radar package for millimeter waves. A small-size, low-cost, light-weight, and high-precision radar sensor can be embodied by packaging an antenna, transceiver chips, and a digital signal processing chip into a radar-on chip through TSVs in order to reduce the size and integrate the antenna, the transceiver chips, and the digital signal processing chip into one package. Accordingly, a radar sensor for ultra-high precision, applicable to a radar for vehicles, an imaging system for weapon monitoring, and a radar for small-sized, light-weight, and precision measurement, all of which have a millimeter band, and to the autonomous traveling of a robot, can be embodied.

摘要翻译： 本发明涉及一种用于毫米波的雷达包。 通过将天线，收发器芯片和数字信号处理芯片通过TSV封装到雷达芯片中，可以实现小尺寸，低成本，重量轻，高精度的雷达传感器，以减小尺寸 并将天线，收发器芯片和数字信号处理芯片集成到一个封装中。 因此，可应用于车辆雷达的用于超高精度的雷达传感器，用于武器监测的成像系统，以及用于小型，轻量化和精密测量的雷达，所有这些都具有毫米波段，以及 能够实现机器人的自主行进。

公开(公告)号：US20070241844A1

公开(公告)日：2007-10-18

申请号：US11690219

申请日：2007-03-23

申请人： Cheon Soo KIM ,  Myung Shin KWAK ,  Seong Do KIM ,  Mun Yang PARK ,  Hyun Kyu YU ,  Hee Bum JUNG

发明人： Cheon Soo KIM ,  Myung Shin KWAK ,  Seong Do KIM ,  Mun Yang PARK ,  Hyun Kyu YU ,  Hee Bum JUNG

IPC分类号： H01P3/08

CPC分类号： H01P3/003

摘要： A coplanar waveguide CPW using multi-layer interconnection CMOS technology is provided. In the CPW including an interlayer insulator disposed on a substrate, metal multilayers disposed on the interlayer insulator, and a ground line-a signal line-a ground line formed of an uppermost metal layer, when a ground line of a lowermost layer is connected to the ground line of the uppermost layer, intermediate metal layers are designed to gradually increase or decrease in width, or to be uneven so as to maximize an area where an ultra-high frequency spreads, thereby minimizing CPW loss and maximizing a slow wave effect. As a result, it is possible to improve performance of an ultra-high frequency circuit and miniaturize the circuit.

摘要翻译： 提供了一种使用多层互连CMOS技术的共面波导CPW。 在包括设置在基板上的层间绝缘体的CPW中，设置在层间绝缘体上的金属多层和最下层的接地线的接地线 - 信号线 - 由最上层金属层形成的接地线连接到 最上层的地线，中间金属层被设计成逐渐增加或减小宽度或不均匀，以便使超高频率扩展的面积最大化，由此最小化CPW损耗并最大化慢波效应。 结果，可以提高超高频电路的性能并使电路小型化。

公开(公告)号：US20080012654A1

公开(公告)日：2008-01-17

申请号：US11768416

申请日：2007-06-26

申请人： Seon Ho HAN ,  Cheon Soo KIM

发明人： Seon Ho HAN ,  Cheon Soo KIM

IPC分类号： H03B5/08

CPC分类号： H03J3/185 ,  H03B5/1253 ,  H03B5/1265 ,  H03B5/1293 ,  H03B2200/0048 ,  H03B2200/005 ,  H03J7/045 ,  H03J2200/10 ,  H03J2200/36 ,  H03L7/099 ,  H03L2207/06

摘要： Provided are a linearized variable-capacitance module for a voltage-controlled oscillator (VCO) and an LC resonance circuit using the same. The VCO is a circuit for outputting a certain frequency in response to an input control signal (voltage or current). The VCO includes an inductor, a variable capacitor (or a varactor), and an active device for compensating for loss of energy caused by the inductor and varactor. The frequency of the VCO is varied by changing inductance or capacitance. In general, the VCO includes a variable-capacitance device (i.e., the varactor) so that the frequency of the VCO may be varies by changing the capacitance via a control voltage. In most cases, the frequency of the VCO varies nonlinearly with respect to the control voltage. The nonlinear variation in the frequency of the VCO results in a great variation in a VCO gain within a certain control voltage range. When a phase locked loop (PLL) includes the VCO, the variation in the VCO gain leads to a variation in the entire loop gain, thus causing a variation in output phase noise. To solve this problem, a varactor designed to have a capacitance that varies linearly with a control voltage is provided so that a VCO gain can be held constant. The variable-capacitance module includes a plurality of variable-capacitance devices with respectively different linear variation regions on an application voltage axis. Also, the variable-capacitance devices are coupled in common and receive a control voltage at one end while each receiving a different fixed voltage at the other end.

摘要翻译： 提供一种用于压控振荡器（VCO）的线性化可变电容模块和使用其的LC谐振电路。 VCO是用于响应于输入控制信号（电压或电流）输出特定频率的电路。 VCO包括电感器，可变电容器（或变容二极管）和用于补偿由电感器和变容二极管引起的能量损失的有源器件。 通过改变电感或电容来改变VCO的频率。 通常，VCO包括可变电容器件（即变容二极管），使得可以通过经由控制电压改变电容来改变VCO的频率。 在大多数情况下，VCO的频率相对于控制电压非线性变化。 VCO的频率的非线性变化导致在一定的控制电压范围内的VCO增益的巨大变化。 当锁相环（PLL）包括VCO时，VCO增益的变化导致整个环路增益的变化，从而导致输出相位噪声的变化。 为了解决这个问题，提供了设计成具有随着控制电压线性变化的电容的变容二极管，使得VCO增益可以保持恒定。 可变电容模块包括在施加电压轴上分别具有不同线性变化区域的多个可变电容器件。 此外，可变电容器件共同耦合，并且在一端接收控制电压，而在另一端接收不同的固定电压。

公开(公告)号：US20090115516A1

公开(公告)日：2009-05-07

申请号：US11942935

申请日：2007-11-20

申请人： Jung Woo PARK ,  Cheon Soo KIM

发明人： Jung Woo PARK ,  Cheon Soo KIM

IPC分类号： H03F3/45 ,  H03F3/16

CPC分类号： H03F3/45475 ,  H03F3/45183 ,  H03F2203/45138

摘要： Provided is an operational transconductance amplifier (OTA). An existing Nauta transconductor used to implement a high frequency Gm-C filter integrated circuit (IC) is analyzed by a new method and from a new perspective to remove extra components and divide roles of remaining inverters for more simple and efficient circuit structure. In an existing Nauta transconductor, a common mode signal from an input terminal is amplified and appears at an output terminal, while in the inventive Nauta transconductor the common mode signal from an input terminal does not appear at the output terminal and is effectively eliminated. These enhanced characteristics can be achieved with a smaller number of inverters than an existing Nauta transconductor. Frequency characteristics of the filter can be effectively enhanced by independently controlling the quality factor without affecting the transconductance value required for frequency characteristics of the filter.

摘要翻译： 提供了一种运算跨导放大器（OTA）。 用于实现高频Gm-C滤波器集成电路（IC）的现有Nauta跨导体通过新的方法和从新的角度分析，以消除额外的部件，并将剩余逆变器的角色分为更简单和更有效的电路结构。 在现有的Nauta跨导器中，来自输入端的共模信号被放大并出现在输出端，而在本发明的Nauta跨导器中，来自输入端的共模信号不出现在输出端并被有效地消除。 这些增强特性可以用比现有的Nauta跨导体更少数量的逆变器来实现。 通过独立地控制质量因子而不影响过滤器的频率特性所需的跨导值，可以有效地提高滤波器的频率特性。

公开(公告)号：US20080079504A1

公开(公告)日：2008-04-03

申请号：US11778133

申请日：2007-07-16

申请人： Sang Jin BYUN ,  Cheon Soo KIM

发明人： Sang Jin BYUN ,  Cheon Soo KIM

IPC分类号： H03B27/00 ,  H03B5/12

CPC分类号： H03B27/00

摘要： Provided is a quadrature voltage controlled oscillator having only one resonant mode characteristic. The quadrature voltage controlled oscillator has a structure in which two clocks generated from respective LC resonant circuits are 90 degrees out of phase with each other using a phase detector and a loop filter, instead of a general structure in which two LC tank resonant circuits are mutually coupled to constitute an LC quadrature voltage controlled oscillator. The quadrature voltage controlled oscillator includes two resonant circuits having the same oscillation frequency; and a phase controller receiving oscillation clocks of the two resonant circuits to control at least one of oscillation phases of the two resonant circuits according to a phase difference between the two oscillation clocks.

摘要翻译： 提供了仅具有一个谐振模式特性的正交压控振荡器。 正交压控振荡器具有这样的结构，其中使用相位检测器和环路滤波器从相应的LC谐振电路产生的两个时钟彼此相差90度，而不是两个LC谐振电路谐振电路相互的一般结构 耦合以构成LC正交压控振荡器。 正交压控振荡器包括具有相同振荡频率的两个谐振电路; 以及相位控制器，接收两个谐振电路的振荡时钟，以根据两个振荡时钟之间的相位差来控制两个谐振电路的振荡相位中的至少一个。