公开(公告)号：US20110143332A1

公开(公告)日：2011-06-16

申请号：US11945101

申请日：2007-11-26

申请人： Chi-Hung Lin ,  Ting-Ting Liu ,  Yung-Ching Huang

发明人： Chi-Hung Lin ,  Ting-Ting Liu ,  Yung-Ching Huang

IPC分类号： C12Q1/70 ,  G01J3/44 ,  C12Q1/18 ,  C12Q1/02 ,  C12M1/34 ,  C12Q1/04

CPC分类号： G01N21/658 ,  G01N33/57438

摘要： The present invention relates to a method for producing a profile identifying a microorganism based on surface enhanced Raman scattering (SERS) and an apparatus thereof. The method comprises: (1) placing the microorganism on a SERS-active substrate; (2) mounting the microorganism with a mounting solution; (3) obtaining a SERS spectrum of the microorganism in step (2); and (4) analyzing the SERS spectrum to produce the profile.The present invention also relates to a method for detecting morphology alteration of a microorganism due to an antimicrobial agent or an infectious agent based on SERS and an apparatus thereof. The method comprises: (1) placing the microorganism on a SERS-active substrate; (2) mounting the microorganism with a mounting solution; (3) treating the microorganism with a pharmaceutically effective amount of the antimicrobial agent or the infectious agent; (4) obtaining a SERS spectrum of the microorganism in step (3); and (5) identifying effect of the antimicrobial agent or the infectious agent by at least one new peak in the SERS spectrum in step (4) compared to a SERS spectrum of a control sample, wherein the control sample is not treated with the antimicrobial agent or the infectious agent.

摘要翻译： 本发明涉及一种基于表面增强拉曼散射（SERS）产生识别微生物的轮廓的方法及其装置。 该方法包括：（1）将微生物置于SERS活性底物上; （2）用安装溶液安装微生物; （3）在步骤（2）中获得微生物的SERS光谱; 和（4）分析SERS谱以产生轮廓。 本发明还涉及一种用于检测由于基于SERS的抗微生物剂或感染剂的微生物形态改变的方法及其装置。 该方法包括：（1）将微生物置于SERS活性底物上; （2）用安装溶液安装微生物; （3）用药学有效量的抗微生物剂或感染剂处理微生物; （4）在步骤（3）中获得微生物的SERS光谱; 和（5）与对照样品的SERS光谱相比，在步骤（4）中鉴定SERS光谱中至少一个新峰的抗微生物剂或感染剂的作用，其中对照样品不用抗微生物剂 或感染剂。

公开(公告)号：US08564471B1

公开(公告)日：2013-10-22

申请号：US13333058

申请日：2011-12-21

申请人： Xiang Gao ,  Chih-Wei Yao ,  Chi-Hung Lin ,  Li Lin

发明人： Xiang Gao ,  Chih-Wei Yao ,  Chi-Hung Lin ,  Li Lin

IPC分类号： H03M1/50

CPC分类号： H03M1/50 ,  G04F10/005 ,  H03K5/13 ,  H03L7/0814 ,  H03L7/0891 ,  H03M1/00 ,  H03M1/0641 ,  H03M1/0695 ,  H03M1/12 ,  H03M2201/4233

摘要： Disclosed is a time-to-digital (TDC) converter comprising an analog voltage source. An analog-to-digital converter quantizes two voltage samples in response to receiving a first input signal at a first time t1 and a second input signal at a second time t2. The first and second digital signals are combined to produce a digital signal that represents the difference (t2−t1).

摘要翻译： 公开了一种包括模拟电压源的时间数字（TDC）转换器。 响应于在第一时间t1接收第一输入信号和第二时间t2的第二输入信号，模数转换器量化两个电压采样。 第一和第二数字信号被组合以产生表示差的数字信号（t2-t1）。

公开(公告)号：US20120276857A1

公开(公告)日：2012-11-01

申请号：US13449468

申请日：2012-04-18

申请人： Xiang Gao ,  Chi-Hung Lin ,  Li Lin

发明人： Xiang Gao ,  Chi-Hung Lin ,  Li Lin

IPC分类号： H04B1/38 ,  H03K21/00 ,  H03B19/14

CPC分类号： H03B19/00

摘要： Frequency multipliers having corresponding methods and multifunction radios comprise: N multipliers, wherein N is an integer greater than one; wherein the multipliers are connected in series such that each of the multipliers, except for a first one of the multipliers, is configured to mix a periodic input signal with an output of another respective one of the multipliers; wherein the first one of the multipliers is configured to mix the periodic input signal with the periodic input signal.

摘要翻译： 具有相应方法和多功能无线电的频率乘法器包括：N个乘法器，其中N是大于1的整数; 其中所述乘法器串联连接，使得除所述乘法器中的第一乘法器之外的每个乘法器被配置为将周期性输入信号与所述乘法器中的另一相应乘法器的输出混合; 其中所述乘法器中的所述第一乘法器被配置为将所述周期性输入信号与所述周期性输入信号混合。

公开(公告)号：US08081932B2

公开(公告)日：2011-12-20

申请号：US11400288

申请日：2006-04-10

申请人： Jan Roelof Westra ,  Rudy J. van de Plassche ,  Chi-Hung Lin

发明人： Jan Roelof Westra ,  Rudy J. van de Plassche ,  Chi-Hung Lin

IPC分类号： H04B1/44

CPC分类号： H04B1/583

摘要： A transceiver front-end provides an interface between a transmission medium and transmitter, and between a transmission medium and receiver. The transceiver front-end includes a hybrid circuit, a high-pass filter, and a gain stage, that permits the reduction or the complete elimination of buffer amplifiers. Buffer amplifiers can be eliminated because the hybrid circuit and/or the high-pass filter are adapted so that they can be directly connected to each other, without a loss in circuit performance. Furthermore, the high-pass filter and/or the gain stage are also adapted so they can be directly connected. As such, the transceiver front-end can be constructed using all passive components, reducing or eliminating excess heat generation.

摘要翻译： 收发器前端提供传输介质和发射器之间以及传输介质和接收器之间的接口。 收发器前端包括混合电路，高通滤波器和增益级，允许减少或完全消除缓冲放大器。 可以消除缓冲放大器，因为混合电路和/或高通滤波器被适配成使得它们可以彼此直接连接，而不会损失电路性能。 此外，高通滤波器和/或增益级也适于直接连接。 因此，收发器前端可以使用所有无源组件构建，从而减少或消除多余的发热。

公开(公告)号：US08055811B2

公开(公告)日：2011-11-08

申请号：US12564054

申请日：2009-09-22

申请人： Hsi-Jung Tsai ,  Chi-Hung Lin ,  Shih-Hao Yeh

发明人： Hsi-Jung Tsai ,  Chi-Hung Lin ,  Shih-Hao Yeh

IPC分类号： G06F3/00

CPC分类号： G11B17/0436

摘要： A floppy module includes a floppy disk controller (FDC), a control circuit, and a display. The FDC has a first control terminal, a second control terminal, and a plurality of third control terminals. Wherein, the first control terminal and the second control terminal may respectively output a first control signal and a second control signal, and the first and second control signals having the same statuses are used for controlling a floppy disk. The display has a fourth control terminal and a plurality of data terminals respectively coupled to a portion of the third control terminals. Additionally, the control circuit may use the first control signal to replace the second control signal for controlling the floppy disk, and transmit the second control signal to the fourth control terminal such that a status information is shown on the display as the floppy disk being idle.

摘要翻译： 软盘模块包括软盘控制器（FDC），控制电路和显示器。 FDC具有第一控制终端，第二控制终端和多个第三控制终端。 其中，第一控制终端和第二控制终端可以分别输出第一控制信号和第二控制信号，并且具有相同状态的第一和第二控制信号用于控制软盘。 显示器具有分别耦合到第三控制端子的一部分的第四控制端子和多个数据端子。 此外，控制电路可以使用第一控制信号来替换用于控制软盘的第二控制信号，并且将第二控制信号发送到第四控制终端，使得在软盘空闲时在显示器上显示状态信息 。

公开(公告)号：US07598808B2

公开(公告)日：2009-10-06

申请号：US12037797

申请日：2008-02-26

申请人： Arya R. Behzad ,  Klaas Bult ,  Ramon A. Gomez ,  Chi-Hung Lin ,  Tom W. Kwan ,  Oscar E. Agazzi ,  John L. Creigh ,  Mehdi Hatamian ,  David E. Kruse ,  Arthur Abnous ,  Henry Samueli

发明人： Arya R. Behzad ,  Klaas Bult ,  Ramon A. Gomez ,  Chi-Hung Lin ,  Tom W. Kwan ,  Oscar E. Agazzi ,  John L. Creigh ,  Mehdi Hatamian ,  David E. Kruse ,  Arthur Abnous ,  Henry Samueli

IPC分类号： H03G3/10

CPC分类号： H03F1/32 ,  H03F3/347 ,  H03F3/505 ,  H03F2200/211 ,  H03F2200/252 ,  H03F2200/421 ,  H03F2200/513 ,  H03G1/0088 ,  H03G3/001 ,  H03G3/3036 ,  H03G3/3052 ,  H03G5/10 ,  H03H11/245

摘要： Circuitry to remove switches from signal paths in integrated circuit programmable gain attenuators. Programmable gain attenuators and programmable gain amplifiers commonly switch between signal levels using semi-conductor switches. Such switches may introduce non-linearities in the signal. By isolating the switches from the signal path linearity of the PGA can be improved.

摘要翻译： 电路从集成电路可编程增益衰减器中的信号路径中去除开关。 可编程增益衰减器和可编程增益放大器通常使用半导体开关在信号电平之间切换。 这种开关可能在信号中引入非线性。 通过将开关与信号路径隔离，可以提高PGA的线性度。

公开(公告)号：US07317414B2

公开(公告)日：2008-01-08

申请号：US11698954

申请日：2007-01-29

申请人： Klaas Bult ,  Chi-Hung Lin

发明人： Klaas Bult ,  Chi-Hung Lin

IPC分类号： H03M1/66

CPC分类号： H03M1/0624 ,  H03M1/0682 ,  H03M1/0872 ,  H03M1/685 ,  H03M1/747

摘要： Binary indications are converted to an analog representation with significant reduction in ringing at the transitions between successive binary indications and in the period during each binary indication. The binary indications are disposed in a row-and-column matrix to provide a thermometer code. Each stage of the converter includes a decoder and latch arranged so the decoder inputs settle before the latch is set by the clock pulses. The stages are implemented in complementary CMOS. Complementary transistors are biased so one transistor of the pair is driven to the rail while the other transistor of the pair floats. A dummy CMOS transistor is used to balance the number of transistors in the decoder paths.

摘要翻译： 二进制指示被转换为模拟表示，在连续的二进制指示之间的转换和每个二进制指示期间的周期中显着地减少振铃。 二进制指示以行和列矩阵布置以提供温度计代码。 转换器的每个级包括一个解码器和锁存器，所述解码器和锁存器布置成使得解码器输入在锁存器被时钟脉冲设置之前稳定。 这些阶段在互补CMOS中实现。 互补晶体管是偏置的，因此该对的一个晶体管被驱动到轨道，而另一个晶体管则浮动。 虚拟CMOS晶体管用于平衡解码器路径中的晶体管数量。

公开(公告)号：US20060238256A1

公开(公告)日：2006-10-26

申请号：US11417073

申请日：2006-05-02

申请人： Arya Behzad ,  Klaas Bult ,  Ramon Gomez ,  Chi-Hung Lin ,  Tom Kwan ,  Oscar Agazzi ,  John Creigh ,  Mehdi Hatamian ,  David Kruse ,  Arthur Abnous ,  Henry Samueli

发明人： Arya Behzad ,  Klaas Bult ,  Ramon Gomez ,  Chi-Hung Lin ,  Tom Kwan ,  Oscar Agazzi ,  John Creigh ,  Mehdi Hatamian ,  David Kruse ,  Arthur Abnous ,  Henry Samueli

IPC分类号： H03G3/00

CPC分类号： H03F1/32 ,  H03F3/347 ,  H03F3/505 ,  H03F2200/211 ,  H03F2200/252 ,  H03F2200/421 ,  H03F2200/513 ,  H03G1/0088 ,  H03G3/001 ,  H03G3/3036 ,  H03G3/3052 ,  H03G5/10 ,  H03H11/245

摘要： Circuitry to remove switches from signal paths in integrated circuit programmable gain attenuators. Programmable gain attenuators and programmable gain amplifiers commonly switch between signal levels using semi-conductor switches. Such switches may introduce non-linearities in the signal. By isolating the switches from the signal path linearity of the PGA can be improved.

公开(公告)号：US20050189993A1

公开(公告)日：2005-09-01

申请号：US11005603

申请日：2004-12-06

申请人： Arya Behzad ,  Klaas Bult ,  Ramon Gomez ,  Chi-Hung Lin ,  Tom Kwan ,  Oscar Agazzi ,  John Creigh ,  Mehdi Hatamian ,  David Kruse ,  Arthur Abnous ,  Henry Samueli

发明人： Arya Behzad ,  Klaas Bult ,  Ramon Gomez ,  Chi-Hung Lin ,  Tom Kwan ,  Oscar Agazzi ,  John Creigh ,  Mehdi Hatamian ,  David Kruse ,  Arthur Abnous ,  Henry Samueli

IPC分类号： H03G1/00 ,  H03G3/00 ,  H03G3/30 ,  H03G5/10 ,  H03H11/24

CPC分类号： H03F1/32 ,  H03F3/347 ,  H03F3/505 ,  H03F2200/211 ,  H03F2200/252 ,  H03F2200/421 ,  H03F2200/513 ,  H03G1/0088 ,  H03G3/001 ,  H03G3/3036 ,  H03G3/3052 ,  H03G5/10 ,  H03H11/245

摘要： Circuitry to remove switches from signal paths in integrated circuit programmable gain attenuators. Programmable gain attenuators and programmable gain amplifiers commonly switch between signal levels using semi-conductor switches. Such switches may introduce non-linearities in the signal. By isolating the switches from the signal path linearity of the PGA can be improved.

摘要翻译： 电路从集成电路可编程增益衰减器中的信号路径中去除开关。 可编程增益衰减器和可编程增益放大器通常使用半导体开关在信号电平之间切换。 这种开关可能在信号中引入非线性。 通过将开关与信号路径隔离，可以提高PGA的线性度。

公开(公告)号：US06873210B2

公开(公告)日：2005-03-29

申请号：US10791878

申请日：2004-03-04

申请人： Jan Mulder ,  Marcel Lugthart ,  Chi-Hung Lin

发明人： Jan Mulder ,  Marcel Lugthart ,  Chi-Hung Lin

IPC分类号： H03H11/32 ,  H03F3/45

CPC分类号： H03H11/32

摘要： Provided is a circuit to perform single-ended to differential conversion while providing common-mode voltage control. The circuit includes a converter to convert a single-ended signal to a differential signal and a stabilizing circuit adapted to receive the differential signal. The stabilizing circuit includes a sensor configured to sense a common-mode voltage level of the differential signal and a comparator having an output port coupled to the converter. The comparator is configured to compare the differential signal common-mode voltage level with a reference signal common-mode voltage level and produce an adjusting signal based upon the comparison. The adjusting signal is applied to the converter via the output port and is operative to adjust a subsequent common-mode voltage level of the differential signal.

摘要翻译： 提供了在提供共模电压控制的同时执行单端到差分转换的电路。 电路包括将单端信号转换为差分信号的转换器和适于接收差分信号的稳定电路。 稳定电路包括被配置为感测差分信号的共模电压电平的传感器和具有耦合到转换器的输出端口的比较器。 比较器被配置为将差分信号共模电压电平与参考信号共模电压电平进行比较，并且基于该比较产生调整信号。 调整信号经由输出端口被施加到转换器，并且可操作地调整差分信号的后续共模电压电平。