摘要:
According to one embodiment of the present invention, an ESD protection element for use in an electrical circuit is provided, including a plurality of diodes which are connected in series with one another and which are formed in a contiguous active area, wherein the ESD protection element has a fin structure.
摘要:
According to one embodiment of the present invention, an ESD protection element for use in an electrical circuit is provided, including a plurality of diodes which are connected in series with one another and which are formed in a contiguous active area, wherein the ESD protection element has a fin structure.
摘要:
Some embodiments relate to an electrostatic discharge (ESD) protection device to protect a circuit from an ESD event. The ESD protection device includes first and second trigger elements. Upon detecting an ESD pulse, the first trigger element provides a first trigger signal having a first pulse length. The second trigger element, upon detecting the ESD pulse, provides a second trigger signal having a second pulse length. The second pulse length is different from the first pulse length. A primary shunt shunts power of the ESD pulse away from the ESD susceptible circuit based on the first trigger signal. A current control element selectively pumps current due to the ESD pulse into a substrate of the primary shunt based on the second trigger signal.
摘要:
In an embodiment of the invention, a semiconductor device includes a first region having a first doping type, a channel region having the first doping type disposed in the first region, and a retrograde well having a second doping type. The second doping type is opposite to the first doping type. The retrograde well has a shallower layer with a first peak doping and a deeper layer with a second peak doping higher than the first peak doping. The device further includes a drain region having the second doping type over the retrograde well. An extended drain region is disposed in the retrograde well, and couples the channel region with the drain region. An isolation region is disposed between a gate overlap region of the extended drain region and the drain region. A length of the drain region is greater than a depth of the isolation region.
摘要:
A gate controlled fin resistance element for use as an electrostatic discharge (ESD) protection element in an electrical circuit has a fin structure having a first connection region, a second connection region and a channel region formed between the first and second connection regions. Furthermore, the fin resistance element has a gate region formed at least over a part of the surface of the channel region. The gate region is electrically coupled to a gate control device, which gate control device controls an electrical potential applied to the gate region in such a way that the gate controlled fin resistance element has a high electrical resistance during a first operating state of the electrical circuit and a lower electrical resistance during a second operating state, which is characterized by the occurrence of an ESD event.
摘要:
In a method for producing an electronic component, a first doped connection region and a second doped connection region are formed on or above a substrate; a body region is formed between the first doped connection region and the second doped connection region; at least two gate regions separate from one another are formed on or above the body region; at least one partial region of the body region is doped by means of introducing dopant atoms, wherein the dopant atoms are introduced into the at least one partial region of the body region through at least one intermediate region formed between the at least two separate gate regions.
摘要:
An ESD protection element for use in an electrical circuit having a fin structure or a fully depleted silicon-on-insulator structure. The fin structure or the fully depleted silicon-on-insulator structure contains a first connection region having a first conductivity type; a second connection region having a second conductivity type, which is opposite to the first conductivity type; and also a plurality of body regions which are formed alongside one another and which are formed between the first connection region and the second connection region. The body regions alternately have the first conductivity type and the second conductivity type. The ESD protection element has at least one gate region formed on or above at least one of the plurality of body regions, and also at least one gate control device which is electrically coupled to the at least one gate region.
摘要:
In one embodiment, the semiconductor device includes a first source of a first doping type disposed in a substrate. A first drain of the first doping type is disposed in the substrate. A first gate region is disposed between the first source and the first drain. A first channel region of a second doping type is disposed under the first gate region. The second doping type is opposite to the first doping type. A first extension region of the first doping type is disposed between the first gate and the first drain. The first extension region is part of a first fin disposed in or over the substrate. A first isolation region is disposed between the first extension region and the first drain. A first well region of the first doping type is disposed under the first isolation region. The first well region electrically couples the first extension region with the first drain.
摘要:
Some embodiments relate to an electrostatic discharge (ESD) protection device. The ESD protection device includes a first electrical path extending between the first and second circuit nodes and including a trigger element. A second electrical path extends between the first and second circuit nodes. The second electrical path includes a shunt element. A switching element is configured to trigger current flow through the shunt element based on both a state of the trigger element and a state of the switching element.
摘要:
One embodiment of the present invention relates to a silicon-controlled-rectifier (SCR). The SCR includes a longitudinal silicon fin extending between an anode and a cathode and including a junction region there between. One or more first transverse fins traverses the longitudinal fin at one or more respective tapping points positioned between the anode and the junction region. Other devices and methods are also disclosed.