Method for manufacturing a structure in a semiconductor device and a structure in a semiconductor device
    1.
    发明授权
    Method for manufacturing a structure in a semiconductor device and a structure in a semiconductor device 有权
    半导体装置的结构的制造方法以及半导体装置的结构

    公开(公告)号:US07767571B2

    公开(公告)日:2010-08-03

    申请号:US11549487

    申请日:2006-10-13

    IPC分类号: H01L21/84

    摘要: The invention is concerned with a method for manufacturing a local wiring in a semiconductor device, comprising the manufacturing of at least two electrically conducting structures essentially in the same horizontal level in a layered stack on a substrate, the at least two electrically conducting structures being separated by a gap filled with at least one dielectric material, the gap being electrically bridged by conductive material, to form at least one contact element electrically connecting the at least two electrically conducting structures, whereby at least one contact element is produced in a single lithographic step.

    摘要翻译: 本发明涉及一种用于制造半导体器件中的局部布线的方法,包括在衬底上的分层叠层中制造基本上处于相同水平位置的至少两个导电结构,所述至少两个导电结构被分离 通过填充有至少一种介电材料的间隙,所述间隙由导电材料电桥接,以形成至少一个电连接所述至少两个导电结构的接触元件,由此在单个光刻步骤中产生至少一个接触元件 。

    Method for Manufacturing a Structure in a Semiconductor Device and a Structure in a Semiconductor Device
    2.
    发明申请
    Method for Manufacturing a Structure in a Semiconductor Device and a Structure in a Semiconductor Device 有权
    半导体装置的结构的制造方法以及半导体装置的结构

    公开(公告)号:US20080090398A1

    公开(公告)日:2008-04-17

    申请号:US11549487

    申请日:2006-10-13

    IPC分类号: H01L21/44

    摘要: The invention is concerned with a method for manufacturing a local wiring in a semiconductor device, comprising the manufacturing of at least two electrically conducting structures essentially in the same horizontal level in a layered stack on a substrate, the at least two electrically conducting structures being separated by a gap filled with at least one dielectric material, the gap being electrically bridged by conductive material, to form at least one contact element electrically connecting the at least two electrically conducting structures, whereby at least one contact element is produced in a single lithographic step.

    摘要翻译: 本发明涉及一种用于制造半导体器件中的局部布线的方法,包括在衬底上的分层叠层中制造基本上处于相同水平位置的至少两个导电结构,所述至少两个导电结构被分离 通过填充有至少一种介电材料的间隙,所述间隙由导电材料电桥接,以形成至少一个电连接所述至少两个导电结构的接触元件,由此在单个光刻步骤中产生至少一个接触元件 。

    Semiconductor device, method for manufacturing a semiconductor device and mask for manufacturing a semiconductor device
    3.
    发明申请
    Semiconductor device, method for manufacturing a semiconductor device and mask for manufacturing a semiconductor device 失效
    半导体装置,半导体装置的制造方法以及半导体装置的制造掩模

    公开(公告)号:US20080179705A1

    公开(公告)日:2008-07-31

    申请号:US11700547

    申请日:2007-01-31

    IPC分类号: H01L29/00 G03F1/00 H01L21/76

    摘要: A semiconductor device with a substrate includes a structure. The structure has a first part and a second part. At least one section of the edge of the first part of the structure is at an essential constant distance measured parallel to the substrate to a first section of an edge of a second structure. At least one section of the edge of the second part of the structure is lined with an edge of a second section of the same second section. The first section of the edge of the second structure and a second section of the edge of the second structure merge at least at one point, whereby the angle between the tangents of the edges of the first and second section of the second structure is less than 90°. The structure and the second structure are distanced by a spacer structure.

    摘要翻译: 具有衬底的半导体器件包括结构。 该结构具有第一部分和第二部分。 结构的第一部分的边缘的至少一个部分是平行于衬底测量到第二结构的边缘的第一部分的基本恒定距离。 结构的第二部分的边缘的至少一个部分衬有同一第二部分的第二部分的边缘。 第二结构的边缘的第一部分和第二结构的边缘的第二部分至少在一点处合并,由此第二结构的第一和第二部分的边缘的切线之间的角度小于 90°。 结构和第二结构由间隔结构隔开。

    Method for Processing a Structure of a Semiconductor Component, and Structure in a Semiconductor Component
    4.
    发明申请
    Method for Processing a Structure of a Semiconductor Component, and Structure in a Semiconductor Component 审中-公开
    用于处理半导体部件的结构的方法以及半导体部件中的结构

    公开(公告)号:US20080061338A1

    公开(公告)日:2008-03-13

    申请号:US11851162

    申请日:2007-09-06

    IPC分类号: H01L27/108 H01L21/311

    摘要: A method is used for processing a structure of a semiconductor component. The structure has at least one partial structure to be etched, in particular a sublithographic partial structure. The at least one partial structure has at least one structure to be etched with at least one lateral etch stop to which at least one mask is applied in such a way that at least one lateral etch stop is covered by the mask and afterward at least one of the structures to be etched is etched away isotropically as far as at least one etch stop using the mask. The at least one mask and the at least one etch stop are then removed.

    摘要翻译: 一种用于处理半导体部件的结构的方法。 该结构具有至少一个待蚀刻的部分结构,特别是亚光刻部分结构。 所述至少一个部分结构具有至少一个要被蚀刻的结构,至少一个横向蚀刻停止件,至少一个掩模被施加到至少一个掩模,使得至少一个横向蚀刻停止物被掩模覆盖,然后至少一个 的待蚀刻结构被各向同性地蚀刻到使用掩模的至少一个蚀刻停止。 然后去除至少一个掩模和至少一个蚀刻停止部。

    Lithographic Mask and Method of Forming a Lithographic Mask
    5.
    发明申请
    Lithographic Mask and Method of Forming a Lithographic Mask 有权
    平版印刷掩模和形成平版印刷掩模的方法

    公开(公告)号:US20100266939A1

    公开(公告)日:2010-10-21

    申请号:US12761876

    申请日:2010-04-16

    IPC分类号: G03F1/00

    摘要: A lithographic mask comprises a first layer including grooves, a second layer including regions, sections and a groove-like structure that encloses the sections. The first and second layers are formed so as to reduce electrical potential differences within the second layer. A method of forming a lithographic mask includes forming first and second layers to dispose the second layer over the first layer, patterning the second layer to comprise sections, a region, and a groove-like structure enclosing the sections, and forming grooves in the first layer at portions not covered by the second layer. The first and second layers are formed to reduce potential differences within the second layers during the step of forming the grooves in the first layer.

    摘要翻译: 平版印刷掩模包括包括凹槽的第一层,包含区域的第二层和包围区段的凹槽状结构。 形成第一层和第二层以便减小第二层内的电位差。 形成光刻掩模的方法包括形成第一层和第二层以将第二层设置在第一层上,将第二层图案化以包括封闭这些区段的区段,区域和沟槽状结构,以及在第一层中形成凹槽 层在未被第二层覆盖的部分。 形成第一层和第二层,以在形成第一层中的槽的步骤期间减小第二层内的电位差。

    Methods for generating sublithographic structures
    6.
    发明授权
    Methods for generating sublithographic structures 有权
    用于生成亚光刻结构的方法

    公开(公告)号:US07794614B2

    公开(公告)日:2010-09-14

    申请号:US11754813

    申请日:2007-05-29

    IPC分类号: H01L21/302

    摘要: One possible embodiment is a method of manufacturing a structure on or in a substrate with the following steps a) positioning at least one spacer structure by a spacer technique on the substrate, b) using at least one of the groups of the spacer structure and a structure generated by the spacer structure as a mask for a subsequent particle irradiation step for generating a latent image in the substrate c) using the latent image for further processing the substrate.

    摘要翻译: 一个可能的实施例是在以下步骤中在衬底上或衬底中制造结构的方法:a)通过间隔物技术将至少一个间隔物结构定位在衬底上,b)使用间隔结构的组中的至少一个和 由间隔结构生成的结构作为用于随后的用于在基板中产生潜像的颗粒照射步骤的掩模c)使用潜像进一步处理基板。

    Semiconductor device, method for manufacturing a semiconductor device and mask for manufacturing a semiconductor device
    7.
    发明授权
    Semiconductor device, method for manufacturing a semiconductor device and mask for manufacturing a semiconductor device 失效
    半导体装置,半导体装置的制造方法以及半导体装置的制造掩模

    公开(公告)号:US07535044B2

    公开(公告)日:2009-05-19

    申请号:US11700547

    申请日:2007-01-31

    IPC分类号: H01L27/108

    摘要: A semiconductor device with a substrate includes a structure. The structure has a first part and a second part. At least one section of the edge of the first part of the structure is at an essential constant distance measured parallel to the substrate to a first section of an edge of a second structure. At least one section of the edge of the second part of the structure is lined with an edge of a second section of the same second section. The first section of the edge of the second structure and a second section of the edge of the second structure merge at least at one point, whereby the angle between the tangents of the edges of the first and second section of the second structure is less than 90°. The structure and the second structure are distanced by a spacer structure.

    摘要翻译: 具有衬底的半导体器件包括结构。 该结构具有第一部分和第二部分。 结构的第一部分的边缘的至少一个部分是平行于衬底测量到第二结构的边缘的第一部分的基本恒定距离。 结构的第二部分的边缘的至少一个部分衬有同一第二部分的第二部分的边缘。 第二结构的边缘的第一部分和第二结构的边缘的第二部分至少在一点处合并,由此第二结构的第一和第二部分的边缘的切线之间的角度小于 90°。 结构和第二结构由间隔结构隔开。

    Lithographic projection apparatus and method of exposing a semiconductor wafer with a pattern from a mask
    8.
    发明申请
    Lithographic projection apparatus and method of exposing a semiconductor wafer with a pattern from a mask 审中-公开
    平版印刷投影设备和从掩模中以图案曝光半导体晶片的方法

    公开(公告)号:US20060268248A1

    公开(公告)日:2006-11-30

    申请号:US11437845

    申请日:2006-05-19

    IPC分类号: G03B27/42

    CPC分类号: G03F7/70358 G03F7/70333

    摘要: A single through-the-focus exposure of a semiconductor wafer is achieved by a lithographic projection apparatus, which has the capability of generating an exposure profile comprising substantially two separate portions, or maxima, of exposure light. Both portions of the light are directed to the mask, on which the pattern is formed. The mask is thus exposed coincidently, but on separately located surface positions. Two different patterned portions of the exposure light are then focused onto the wafer. In a preferred embodiment, the two portions are generated by means of a double slit. The exposure is combined with a continuous through-the-focus exposure, wherein a tilt is applied to the wafer stage.

    摘要翻译: 通过光刻投影设备实现半导体晶片的单次透过焦点曝光,光刻投影设备具有产生曝光轮廓的能力,该曝光轮廓基本上包括曝光光的两个独立部分或最大值。 光的两个部分被引导到其上形成有图案的掩模。 因此,掩模一致地暴露,但是在单独定位的表面位置。 然后将曝光光的两个不同的图案化部分聚焦到晶片上。 在优选实施例中,两个部分通过双缝产生。 曝光与连续的通过焦点曝光相结合,其中向晶片台施加倾斜。

    Phase mask for projection lithography and method for the manufacture
thereof comprising a selectively etchable phase shift layer directly on
substrate
    9.
    发明授权
    Phase mask for projection lithography and method for the manufacture thereof comprising a selectively etchable phase shift layer directly on substrate 失效
    用于投影光刻的相位掩模及其制造方法,其包括直接在衬底上的可选择性蚀刻的相移层

    公开(公告)号:US5284724A

    公开(公告)日:1994-02-08

    申请号:US667264

    申请日:1991-03-11

    CPC分类号: G03F1/30 G03F1/26 G03F1/29

    摘要: A carrier of light-transmissive material has a mask pattern of light-absorbent material arranged thereon. The carrier comprises first regions and second regions that are not covered by the absorbent material. An optical thickness of the carrier in the first regions differs from an optical thickness in the second regions such that a phase difference of 180.degree.+/-60.degree. exists between light that has traversed the first regions and light that has traversed the second regions. For manufacturing the phase mask, the first regions are produced by isotropic etching of the light-absorbent material and the second regions are produced by anisotropic etching into the carrier.

    摘要翻译: 透光材料的载体具有布置在其上的吸光材料的掩模图案。 载体包括未被吸收材料覆盖的第一区域和第二区域。 第一区域中的载体的光学厚度不同于第二区域中的光学厚度,使得在穿过第一区域的光与已经穿过第二区域的光之间存在180度+/- 60度的相位差。 为了制造相位掩模,通过吸光材料的各向同性蚀刻产生第一区域,并且通过各向异性蚀刻制造第二区域到载体中。