摘要:
A mechanism is described for facilitating dynamic multi-mode memory packages in memory systems according to one embodiment of the invention. A method of embodiments of the invention includes maintaining a plurality of memory modes on a single memory package at a motherboard of a computing system. The plurality of memory modes is associated with a plurality of physical organizations of memory devices. The method may further include receiving a request to switch from a first memory mode to a second memory mode of the plurality of memory mode, and dynamically switching from the first memory mode to the second memory mode, in response to the request.
摘要:
In one embodiment, a system on a chip (SoC) includes a plurality of processor cores and a memory controller to control communication between the SoC and a memory coupled to the memory controller. The memory controller may be configured to send mirrored command and address signals to a first type of memory device and to send non-mirrored control and address signals to a second type of memory device. Other embodiments are described and claimed.
摘要:
A mechanism is described for facilitating dynamic multi-mode memory packages in memory systems according to one embodiment of the invention. A method of embodiments of the invention includes maintaining a plurality of memory modes on a single memory package at a motherboard of a computing system. The plurality of memory modes is associated with a plurality of physical organizations of memory devices. The method may further include receiving a request to switch from a first memory mode to a second memory mode of the plurality of memory mode, and dynamically switching from the first memory mode to the second memory mode, in response to the request.
摘要:
In one embodiment, a system on a chip (SoC) includes a plurality of processor cores and a memory controller to control communication between the SoC and a memory coupled to the memory controller. The memory controller may be configured to send mirrored command and address signals to a first type of memory device and to send non-mirrored control and address signals to a second type of memory device. Other embodiments are described and claimed.
摘要:
Techniques and mechanisms to exchange communications via a printed circuit board (PCB) between a processor device and a memory device. In an embodiment, the processor device is configured based on a memory type of the memory device to an interface mode of multiple interface modes each corresponding to a different respective one of multiple memory standards. A voltage regulator (VR) is programmed, based on the memory type, to a VR mode to provide one or more voltages to the memory device via a hardware interface on the PCB. In another embodiment, x signal lines of an interconnect disposed in or on the PCB are each coupled between the processor device and the memory device to one another. The value x is an integer equal to a total number of signals of a superset of sets of signals each specified by a different respective one of the multiple memory standards.
摘要:
Dynamic monitoring of current draw by a memory device or memory subsystem can enable a power management system to adjust a memory access performance parameter based on monitored power usage. The system can generate a power usage characterization for the memory device and/or memory subsystem based on monitoring current draw for a known pattern, and then subsequently use the power usage characterization to determine how to adjust the memory access performance parameter.
摘要:
Embodiments of the invention are generally directed to systems, methods, and apparatuses for thermal sensor power savings using a toggle control. In some embodiments, an integrated circuit (e.g., a memory device) includes an on-die thermal sensor, a storage element (e.g., a register), and toggle logic. The toggle logic may transition the thermal sensor from a first power consumption level to a second power consumption level responsive, at least in part, to a toggle indication.
摘要:
Techniques and mechanisms for configuring an integrated circuit to couple to, and exchange data with, a hardware interface. In an embodiment, the integrated circuit comprises a data channel including a plurality of bits, configuration logic, and a plurality of contacts including a first contact group and a second contact group. In response to a signal indicating connectivity of the integrated circuit to the interface, a mode of the configuration logic is selected to couple the plurality of bits to one of the first contact group and the second contact group.
摘要:
Techniques and mechanisms for configuring an integrated circuit to couple to, and exchange data with, a hardware interface. In an embodiment, the integrated circuit comprises a data channel including a plurality of bits, configuration logic, and a plurality of contacts including a first contact group and a second contact group. In response to a signal indicating connectivity of the integrated circuit to the interface, a mode of the configuration logic is selected to couple the plurality of bits to one of the first contact group and the second contact group.