MOM Capacitors Integrated with Air-Gaps
    1.
    发明申请
    MOM Capacitors Integrated with Air-Gaps 有权
    MOM电容器与空隙集成

    公开(公告)号:US20090224359A1

    公开(公告)日:2009-09-10

    申请号:US12045547

    申请日:2008-03-10

    IPC分类号: H01L29/92

    摘要: An integrated circuit structure combining air-gaps and metal-oxide-metal (MOM) capacitors is provided. The integrated circuit structure includes a semiconductor substrate; a first metallization layer over the semiconductor substrate; first metal features in the first metallization layer; a second metallization layer over the first metallization layer; second metal features in the second metallization layer, wherein the first and the second metal features are non-capacitor features; a MOM capacitor having an area in at least one of the first and the second metallization layers; and an air-gap in the first metallization layer and between the first metal features.

    摘要翻译: 提供了一种组合气隙和金属氧化物金属(MOM)电容器的集成电路结构。 集成电路结构包括半导体衬底; 半导体衬底上的第一金属化层; 第一金属层中的第一金属特征; 第一金属化层上的第二金属化层; 在第二金属化层中的第二金属特征,其中第一和第二金属特征是非电容器特征; MOM电容器,其具有在所述第一和第二金属化层中的至少一个中的区域; 以及在第一金属化层中和第一金属特征之间的气隙。

    Capacitors Integrated with Metal Gate Formation
    2.
    发明申请
    Capacitors Integrated with Metal Gate Formation 有权
    电容器与金属门形成集成

    公开(公告)号:US20090090951A1

    公开(公告)日:2009-04-09

    申请号:US11868856

    申请日:2007-10-08

    IPC分类号: H01L27/108

    摘要: A semiconductor structure including a capacitor having increased capacitance and improved electrical performance is provided. The semiconductor structure includes a substrate; and a capacitor over the substrate. The capacitor includes a first layer including a first capacitor electrode and a second capacitor electrode, wherein the first capacitor electrode is formed of a metal-containing material and is free from polysilicon. The semiconductor structure further includes a MOS device including a gate dielectric over the substrate; and a metal-containing gate electrode on the gate dielectric, wherein the metal-containing gate electrode is formed of a same material, and has a same thickness, as the first capacitor electrode.

    摘要翻译: 提供了包括具有增加的电容和改善的电性能的电容器的半导体结构。 半导体结构包括基板; 以及在基板上的电容器。 电容器包括:第一层,包括第一电容器电极和第二电容器电极,其中第一电容器电极由含金属的材料形成并且不含多晶硅。 所述半导体结构还包括:在所述基板上包括栅电介质的MOS器件; 以及栅极电介质上的含金属的栅电极,其中所述含金属的栅电极由与所述第一电容器电极相同的材料形成,并且具有相同的厚度。

    Capacitors integrated with metal gate formation
    3.
    发明授权
    Capacitors integrated with metal gate formation 有权
    电容器与金属栅极结合

    公开(公告)号:US08237209B2

    公开(公告)日:2012-08-07

    申请号:US13215988

    申请日:2011-08-23

    IPC分类号: H01L21/108

    摘要: A semiconductor structure including a capacitor having increased capacitance and improved electrical performance is provided. The semiconductor structure includes a substrate and a MIM capacitor over the substrate. The MIM capacitor includes a bottom plate, an insulating layer over the bottom plate, and a top plate over the insulating layer. The semiconductor structure further includes a MOS device including a gate dielectric over the substrate and a metal-containing gate electrode free from polysilicon on the gate dielectric, wherein the metal-containing gate electrode is formed of a same material and has a same thickness as the bottom plate.

    摘要翻译: 提供了包括具有增加的电容和改善的电性能的电容器的半导体结构。 半导体结构包括衬底和MIM电容器。 MIM电容器包括底板,底板上的绝缘层和绝缘层上的顶板。 该半导体结构还包括一个MOS器件,该MOS器件包括在该衬底上的一个栅极电介质和一个在栅极电介质上不含多晶硅的含金属的栅电极,其中含金属的栅电极由相同的材料形成并且具有与 底板。

    Capacitors Integrated with Metal Gate Formation
    4.
    发明申请
    Capacitors Integrated with Metal Gate Formation 有权
    电容器与金属门形成集成

    公开(公告)号:US20110309420A1

    公开(公告)日:2011-12-22

    申请号:US13215988

    申请日:2011-08-23

    IPC分类号: H01L27/07

    摘要: A semiconductor structure including a capacitor having increased capacitance and improved electrical performance is provided. The semiconductor structure includes a substrate and a MIM capacitor over the substrate. The MIM capacitor includes a bottom plate, an insulating layer over the bottom plate, and a top plate over the insulating layer. The semiconductor structure further includes a MOS device including a gate dielectric over the substrate and a metal-containing gate electrode free from polysilicon on the gate dielectric, wherein the metal-containing gate electrode is formed of a same material and has a same thickness as the bottom plate.

    摘要翻译: 提供了包括具有增加的电容和改善的电性能的电容器的半导体结构。 半导体结构包括衬底和MIM电容器。 MIM电容器包括底板,底板上的绝缘层和绝缘层上的顶板。 该半导体结构还包括一个MOS器件,该MOS器件包括在该衬底上的一个栅极电介质和一个在栅极电介质上不含多晶硅的含金属的栅电极,其中含金属的栅电极由相同的材料形成并且具有与 底板。

    MOM capacitors integrated with air-gaps
    5.
    发明授权
    MOM capacitors integrated with air-gaps 有权
    MOM电容器与气隙集成

    公开(公告)号:US08053865B2

    公开(公告)日:2011-11-08

    申请号:US12045547

    申请日:2008-03-10

    IPC分类号: H01L29/72

    摘要: An integrated circuit structure combining air-gaps and metal-oxide-metal (MOM) capacitors is provided. The integrated circuit structure includes a semiconductor substrate; a first metallization layer over the semiconductor substrate; first metal features in the first metallization layer; a second metallization layer over the first metallization layer; second metal features in the second metallization layer, wherein the first and the second metal features are non-capacitor features; a MOM capacitor having an area in at least one of the first and the second metallization layers; and an air-gap in the first metallization layer and between the first metal features.

    摘要翻译: 提供了一种组合气隙和金属氧化物金属(MOM)电容器的集成电路结构。 集成电路结构包括半导体衬底; 半导体衬底上的第一金属化层; 第一金属层中的第一金属特征; 第一金属化层上的第二金属化层; 在第二金属化层中的第二金属特征,其中第一和第二金属特征是非电容器特征; MOM电容器,其具有在所述第一和第二金属化层中的至少一个中的区域; 以及在第一金属化层中和第一金属特征之间的气隙。

    Capacitors integrated with metal gate formation
    6.
    发明授权
    Capacitors integrated with metal gate formation 有权
    电容器与金属栅极结合

    公开(公告)号:US08022458B2

    公开(公告)日:2011-09-20

    申请号:US11868856

    申请日:2007-10-08

    IPC分类号: H01L27/108

    摘要: A semiconductor structure including a capacitor having increased capacitance and improved electrical performance is provided. The semiconductor structure includes a substrate; and a capacitor over the substrate. The capacitor includes a first layer including a first capacitor electrode and a second capacitor electrode, wherein the first capacitor electrode is formed of a metal-containing material and is free from polysilicon. The semiconductor structure further includes a MOS device including a gate dielectric over the substrate; and a metal-containing gate electrode on the gate dielectric, wherein the metal-containing gate electrode is formed of a same material, and has a same thickness, as the first capacitor electrode.

    摘要翻译: 提供了包括具有增加的电容和改善的电性能的电容器的半导体结构。 半导体结构包括基板; 以及在基板上的电容器。 电容器包括:第一层,包括第一电容器电极和第二电容器电极,其中第一电容器电极由含金属的材料形成并且不含多晶硅。 所述半导体结构还包括:在所述基板上包括栅电介质的MOS器件; 以及栅极电介质上的含金属的栅电极,其中所述含金属的栅电极由与所述第一电容器电极相同的材料形成,并且具有相同的厚度。

    SYSTEM AND METHOD OF VAPOR DEPOSITION
    9.
    发明申请
    SYSTEM AND METHOD OF VAPOR DEPOSITION 审中-公开
    蒸气沉积系统与方法

    公开(公告)号:US20120090547A1

    公开(公告)日:2012-04-19

    申请号:US13337846

    申请日:2011-12-27

    IPC分类号: C23C16/46

    摘要: Provided is a system for vapor deposition of a coating material onto a semiconductor substrate. The system includes a chemical supply chamber, a supply nozzle operable to dispense vapor, and a heating element operable to provide heat to a substrate in-situ with the dispensing of vapor. The system may further include reaction chamber(s) and/or mixing chamber(s).

    摘要翻译: 提供了一种用于将涂料气相沉积到半导体衬底上的系统。 该系统包括化学品供应室,可操作以分配蒸气的供应喷嘴和可操作以随着蒸汽分配而原位向基板提供热量的加热元件。 该系统可以进一步包括反应室和/或混合室。

    System and method of vapor deposition
    10.
    发明授权
    System and method of vapor deposition 有权
    气相沉积的系统和方法

    公开(公告)号:US08105954B2

    公开(公告)日:2012-01-31

    申请号:US12254658

    申请日:2008-10-20

    IPC分类号: H01L21/47

    摘要: Provided is a method and system for vapor deposition of a coating material onto a semiconductor substrate. In an embodiment, photoresist is deposited. An in-situ baking process may be performed with the vapor deposition. In an embodiment, a ratio of chemical components of a material to be deposited onto the substrate is changed during the deposition. Therefore, a layer having a gradient chemical component distribution may be provided. In an embodiment, a BARC layer may be provided which includes a gradient chemical component distribution providing an n,k distribution through the layer. Other materials that may be vapor deposited include pattern freezing material.

    摘要翻译: 提供了一种用于将涂料气相沉积到半导体衬底上的方法和系统。 在一个实施例中,沉积光致抗蚀剂。 可以通过气相沉积来进行原位烘烤工艺。 在一个实施例中,在沉积期间改变待沉积到衬底上的材料的化学成分的比例。 因此,可以提供具有梯度化学成分分布的层。 在一个实施例中,可以提供BARC层,其包括提供通过该层的n,k分布的梯度化学分量分布。 可能蒸气沉积的其他材料包括图案冷冻材料。