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1.发明授权Processor and method for executing instructions requiring wide operands for multiply matrix operations 有权用于执行需要用于多重矩阵运算的广泛操作数的指令的处理器和方法公开(公告)号：US07952587B2
公开(公告)日：2011-05-31
申请号：US11982230
申请日：2007-10-31
申请人： Craig Hansen , John Moussouris , Alexia Massalin
发明人： Craig Hansen , John Moussouris , Alexia Massalin
CPC分类号： G06F9/3001 , G03F1/36 , G06F9/30 , G06F9/30007 , G06F9/30014 , G06F9/30018 , G06F9/30029 , G06F9/30032 , G06F9/30036 , G06F9/3004 , G06F9/30043 , G06F9/30054 , G06F9/30098 , G06F9/30101 , G06F9/30109 , G06F9/30112 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/30167 , G06F9/35 , G06F9/383 , G06F9/3851 , G06F9/3861 , G06F9/3885 , G06F9/4484 , G06F9/45533 , G06F12/02 , G06F17/5068 , G06F17/5072 , G06F17/5081 , G06F2217/12 , H03M13/158 , H03M13/4169 , Y02D10/13 , Y02D10/26 , Y02D10/28 , Y02P90/265
摘要： A programmable processor and method for improving the performance of processors by expanding at least two source operands, or a source and a result operand, to a width greater than the width of either the general purpose register or the data path width. The present invention provides operands which are substantially larger than the data path width of the processor by using the contents of a general purpose register to specify a memory address at which a plurality of data path widths of data can be read or written, as well as the size and shape of the operand. In addition, several instructions and apparatus for implementing these instructions are described which obtain performance advantages if the operands are not limited to the width and accessible number of general purpose registers.
摘要翻译： 一种可编程处理器和方法，用于通过将至少两个源操作数或源和结果操作数扩展到大于通用寄存器或数据路径宽度的宽度的宽度来提高处理器的性能。 本发明通过使用通用寄存器的内容来指定可以读取或写入数据的多个数据路径宽度的存储器地址，并且基本上大于处理器的数据路径宽度的操作数，以及 操作数的大小和形状。 此外，描述了用于实现这些指令的几个指令和装置，其如果操作数不限于通用寄存器的宽度和可访问数量，则获得性能优点。
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公开(公告)号：US20090113187A1
公开(公告)日：2009-04-30
申请号：US11982106
申请日：2007-10-31
申请人： Craig Hansen , John Moussouris , Alexia Massalin
发明人： Craig Hansen , John Moussouris , Alexia Massalin
IPC分类号： G06F9/315
CPC分类号： G06F9/30014 , G06F9/30007 , G06F9/30021 , G06F9/30029 , G06F9/30032 , G06F9/30036 , G06F9/30043 , G06F9/30101 , G06F9/30109 , G06F9/30112 , G06F9/30145 , G06F9/3016 , G06F9/30167 , G06F9/32 , G06F9/34 , G06F9/3824 , G06F9/383 , G06F9/3885 , G06F12/0886
摘要： A programmable processor and method for improving the performance of processors by expanding at least two source operands, or a source and a result operand, to a width greater than the width of either the general purpose register or the data path width. The present invention provides operands which are substantially larger than the data path width of the processor by using the contents of a general purpose register to specify a memory address at which a plurality of data path widths of data can be read or written, as well as the size and shape of the operand. In addition, several instructions and apparatus for implementing these instructions are described which obtain performance advantages if the operands are not limited to the width and accessible number of general purpose registers.
摘要翻译： 一种可编程处理器和方法，用于通过将至少两个源操作数或源和结果操作数扩展到大于通用寄存器或数据路径宽度的宽度的宽度来提高处理器的性能。 本发明通过使用通用寄存器的内容来指定可以读取或写入数据的多个数据路径宽度的存储器地址，并且基本上大于处理器的数据路径宽度的操作数，以及 操作数的大小和形状。 此外，描述了用于实现这些指令的几个指令和装置，其如果操作数不限于通用寄存器的宽度和可访问数量，则获得性能优点。
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3.发明申请Processor for executing switch and translate instructions requiring wide operands 有权用于执行切换和转换需要广泛操作数的指令的处理器公开(公告)号：US20080189512A1
公开(公告)日：2008-08-07
申请号：US11982171
申请日：2007-10-31
申请人： Craig Hansen , John Moussouris , Alexia Massalin
发明人： Craig Hansen , John Moussouris , Alexia Massalin
IPC分类号： G06F9/00
CPC分类号： G06F12/02 , G06F9/30007 , G06F9/30014 , G06F9/30032 , G06F9/30036 , G06F9/3004 , G06F9/30043 , G06F9/30145 , G06F9/3016 , G06F9/30167 , G06F9/383 , G06F9/3861 , G06F9/3885 , G06F9/4484 , G06F9/45533
摘要： A programmable processor and method for improving the performance of processors by expanding at least two source operands, or a source and a result operand, to a width greater than the width of either the general purpose register or the data path width. The present invention provides operands which are substantially larger than the data path width of the processor by using the contents of a general purpose register to specify a memory address at which a plurality of data path widths of data can be read or written, as well as the size and shape of the operand. In addition, several instructions and apparatus for implementing these instructions are described which obtain performance advantages if the operands are not limited to the width and accessible number of general purpose registers.
摘要翻译： 一种可编程处理器和方法，用于通过将至少两个源操作数或源和结果操作数扩展到大于通用寄存器或数据路径宽度的宽度的宽度来提高处理器的性能。 本发明通过使用通用寄存器的内容来指定可以读取或写入数据的多个数据路径宽度的存储器地址，并且基本上大于处理器的数据路径宽度的操作数，以及 操作数的大小和形状。 此外，描述了用于实现这些指令的几个指令和装置，其如果操作数不限于通用寄存器的宽度和可访问数量，则获得性能优点。
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公开(公告)号：US07301541B2
公开(公告)日：2007-11-27
申请号：US10616303
申请日：2003-07-10
申请人： Craig Hansen , John Moussouris , Alexia Massalin
发明人： Craig Hansen , John Moussouris , Alexia Massalin
CPC分类号： G06F9/3001 , G03F1/36 , G06F9/30 , G06F9/30007 , G06F9/30014 , G06F9/30018 , G06F9/30029 , G06F9/30032 , G06F9/30036 , G06F9/3004 , G06F9/30043 , G06F9/30054 , G06F9/30098 , G06F9/30101 , G06F9/30109 , G06F9/30112 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/30167 , G06F9/35 , G06F9/383 , G06F9/3851 , G06F9/3861 , G06F9/3885 , G06F9/4484 , G06F9/45533 , G06F12/02 , G06F17/5068 , G06F17/5072 , G06F17/5081 , G06F2217/12 , H03M13/158 , H03M13/4169 , Y02D10/13 , Y02D10/26 , Y02D10/28 , Y02P90/265
摘要： A programmable processor and method for improving the performance of processors by expanding at least two source operands, or a source and a result operand, to a width greater than the width of either the general purpose register or the data path width. The present invention provides operands which are substantially larger than the data path width of the processor by using the contents of a general purpose register to specify a memory address at which a plurality of data path widths of data can be read or written, as well as the size and shape of the operand. In addition, several instructions and apparatus for implementing these instructions are described which obtain performance advantages if the operands are not limited to the width and accessible number of general purpose registers.
摘要翻译： 一种可编程处理器和方法，用于通过将至少两个源操作数或源和结果操作数扩展到大于通用寄存器或数据路径宽度的宽度的宽度来提高处理器的性能。 本发明通过使用通用寄存器的内容来指定可以读取或写入数据的多个数据路径宽度的存储器地址，并且基本上大于处理器的数据路径宽度的操作数，以及 操作数的大小和形状。 此外，描述了用于实现这些指令的几个指令和装置，其如果操作数不限于通用寄存器的宽度和可访问数量，则获得性能优点。
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公开(公告)号：US08269784B2
公开(公告)日：2012-09-18
申请号：US13354214
申请日：2012-01-19
申请人： Craig Hansen , John Moussouris , Alexia Massalin
发明人： Craig Hansen , John Moussouris , Alexia Massalin
CPC分类号： G06F9/30014 , G06F9/30007 , G06F9/30021 , G06F9/30029 , G06F9/30032 , G06F9/30036 , G06F9/30043 , G06F9/30101 , G06F9/30109 , G06F9/30112 , G06F9/30145 , G06F9/3016 , G06F9/30167 , G06F9/32 , G06F9/34 , G06F9/3824 , G06F9/383 , G06F9/3885 , G06F12/0886
摘要： A programmable processor and method for improving the performance of processors by expanding at least two source operands, or a source and a result operand, to a width greater than the width of either the general purpose register or the data path width. The present invention provides operands which are substantially larger than the data path width of the processor by using the contents of a general purpose register to specify a memory address at which a plurality of data path widths of data can be read or written, as well as the size and shape of the operand. In addition, several instructions and apparatus for implementing these instructions are described which obtain performance advantages if the operands are not limited to the width and accessible number of general purpose registers.
摘要翻译： 一种可编程处理器和方法，用于通过将至少两个源操作数或源和结果操作数扩展到大于通用寄存器或数据路径宽度的宽度的宽度来提高处理器的性能。 本发明通过使用通用寄存器的内容来指定可以读取或写入数据的多个数据路径宽度的存储器地址，并且基本上大于处理器的数据路径宽度的操作数，以及 操作数的大小和形状。 此外，描述了用于实现这些指令的几个指令和装置，其如果操作数不限于通用寄存器的宽度和可访问数量，则获得性能优点。
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公开(公告)号：US08117426B2
公开(公告)日：2012-02-14
申请号：US11878803
申请日：2007-07-27
申请人： Craig Hansen , John Moussouris , Alexia Massalin
发明人： Craig Hansen , John Moussouris , Alexia Massalin
CPC分类号： G06F9/30014 , G06F9/30018 , G06F9/30025 , G06F9/30029 , G06F9/30032 , G06F9/30036 , G06F9/3004 , G06F9/30043 , G06F9/30054 , G06F9/30087 , G06F9/30101 , G06F9/30109 , G06F9/30112 , G06F9/3012 , G06F9/30123 , G06F9/30145 , G06F9/3016 , G06F9/30167 , G06F9/3816 , G06F9/3824 , G06F9/383 , G06F9/3851 , G06F9/3861 , G06F9/3873 , G06F9/3885 , G06F15/7832
摘要： Systems and apparatuses are presented relating a programmable processor comprising an execution unit that is operable to decode and execute instructions received from an instruction path and partition data stored in registers in the register file into multiple data elements, the execution unit capable of executing group data handling operations that re-arrange data elements in different ways in response to data handling instructions, the execution unit further capable of executing a plurality of different group floating-point and group integer arithmetic operations that each arithmetically operates on the multiple data elements stored in registers in the register file to produce a catenated result that is returned to a register in the register file, wherein the catenated result comprises a plurality of individual results.
摘要翻译： 提出了一种可编程处理器的系统和装置，其包括执行单元，该执行单元可操作以解码和执行从指令路径接收的指令，并将存储在寄存器堆中的寄存器中的数据分割成多个数据元素，该执行单元能够执行群组数据处理 响应于数据处理指令以不同方式重新布置数据元素的操作，所述执行单元还能够执行多个不同的组浮点和组整数运算，每个算术运算对存储在寄存器中的多个数据元素进行算术运算 该寄存器文件产生一个返回到该寄存器文件中的一个寄存器的连线结果，其中该连接结果包括多个单独的结果。
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公开(公告)号：US07948496B2
公开(公告)日：2011-05-24
申请号：US11982051
申请日：2007-10-31
申请人： Craig Hansen , John Moussouris , Alexia Massalin
发明人： Craig Hansen , John Moussouris , Alexia Massalin
CPC分类号： G06F9/3001 , G03F1/36 , G06F9/30 , G06F9/30007 , G06F9/30014 , G06F9/30018 , G06F9/30029 , G06F9/30032 , G06F9/30036 , G06F9/3004 , G06F9/30043 , G06F9/30054 , G06F9/30098 , G06F9/30101 , G06F9/30109 , G06F9/30112 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/30167 , G06F9/35 , G06F9/383 , G06F9/3851 , G06F9/3861 , G06F9/3885 , G06F9/4484 , G06F9/45533 , G06F12/02 , G06F17/5068 , G06F17/5072 , G06F17/5081 , G06F2217/12 , H03M13/158 , H03M13/4169 , Y02D10/13 , Y02D10/26 , Y02D10/28 , Y02P90/265
摘要： A programmable processor and method for improving the performance of processors by expanding at least two source operands, or a source and a result operand, to a width greater than the width of either the general purpose register or the data path width. The present invention provides operands which are substantially larger than the data path width of the processor by using the contents of a general purpose register to specify a memory address at which a plurality of data path widths of data can be read or written, as well as the size and shape of the operand. In addition, several instructions and apparatus for implementing these instructions are described which obtain performance advantages if the operands are not limited to the width and accessible number of general purpose registers.
摘要翻译： 一种可编程处理器和方法，用于通过将至少两个源操作数或源和结果操作数扩展到大于通用寄存器或数据路径宽度的宽度的宽度来提高处理器的性能。 本发明通过使用通用寄存器的内容来指定可以读取或写入数据的多个数据路径宽度的存储器地址，并且基本上大于处理器的数据路径宽度的操作数，以及 操作数的大小和形状。 此外，描述了用于实现这些指令的几个指令和装置，其如果操作数不限于通用寄存器的宽度和可访问数量，则获得性能优点。
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8.发明授权Processor for executing switch and translate instructions requiring wide operands 有权用于执行切换和转换需要广泛操作数的指令的处理器公开(公告)号：US07932911B2
公开(公告)日：2011-04-26
申请号：US11982171
申请日：2007-10-31
申请人： Craig Hansen , John Moussouris , Alexia Massalin
发明人： Craig Hansen , John Moussouris , Alexia Massalin
CPC分类号： G06F12/02 , G06F9/30007 , G06F9/30014 , G06F9/30032 , G06F9/30036 , G06F9/3004 , G06F9/30043 , G06F9/30145 , G06F9/3016 , G06F9/30167 , G06F9/383 , G06F9/3861 , G06F9/3885 , G06F9/4484 , G06F9/45533
摘要： A programmable processor and method for improving the performance of processors by expanding at least two source operands, or a source and a result operand, to a width greater than the width of either the general purpose register or the data path width. The present invention provides operands which are substantially larger than the data path width of the processor by using the contents of a general purpose register to specify a memory address at which a plurality of data path widths of data can be read or written, as well as the size and shape of the operand. In addition, several instructions and apparatus for implementing these instructions are described which obtain performance advantages if the operands are not limited to the width and accessible number of general purpose registers.
摘要翻译： 一种可编程处理器和方法，用于通过将至少两个源操作数或源和结果操作数扩展到大于通用寄存器或数据路径宽度的宽度的宽度来提高处理器的性能。 本发明通过使用通用寄存器的内容来指定可以读取或写入数据的多个数据路径宽度的存储器地址，并且基本上大于处理器的数据路径宽度的操作数，以及 操作数的大小和形状。 此外，描述了用于实现这些指令的几个指令和装置，其如果操作数不限于通用寄存器的宽度和可访问数量，则获得性能优点。
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公开(公告)号：US20090100227A1
公开(公告)日：2009-04-16
申请号：US11982051
申请日：2007-10-31
申请人： Craig Hansen , John Moussouris , Alexia Massalin
发明人： Craig Hansen , John Moussouris , Alexia Massalin
IPC分类号： G06F12/00
CPC分类号： G06F9/3001 , G03F1/36 , G06F9/30 , G06F9/30007 , G06F9/30014 , G06F9/30018 , G06F9/30029 , G06F9/30032 , G06F9/30036 , G06F9/3004 , G06F9/30043 , G06F9/30054 , G06F9/30098 , G06F9/30101 , G06F9/30109 , G06F9/30112 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/30167 , G06F9/35 , G06F9/383 , G06F9/3851 , G06F9/3861 , G06F9/3885 , G06F9/4484 , G06F9/45533 , G06F12/02 , G06F17/5068 , G06F17/5072 , G06F17/5081 , G06F2217/12 , H03M13/158 , H03M13/4169 , Y02D10/13 , Y02D10/26 , Y02D10/28 , Y02P90/265
摘要： A programmable processor and method for improving the performance of processors by expanding at least two source operands, or a source and a result operand, to a width greater than the width of either the general purpose register or the data path width. The present invention provides operands which are substantially larger than the data path width of the processor by using the contents of a general purpose register to specify a memory address at which a plurality of data path widths of data can be read or written, as well as the size and shape of the operand. In addition, several instructions and apparatus for implementing these instructions are described which obtain performance advantages if the operands are not limited to the width and accessible number of general purpose registers.
摘要翻译： 一种可编程处理器和方法，用于通过将至少两个源操作数或源和结果操作数扩展到大于通用寄存器或数据路径宽度的宽度的宽度来提高处理器的性能。 本发明通过使用通用寄存器的内容来指定可以读取或写入数据的多个数据路径宽度的存储器地址，并且基本上大于处理器的数据路径宽度的操作数，以及 操作数的大小和形状。 此外，描述了用于实现这些指令的几个指令和装置，其如果操作数不限于通用寄存器的宽度和可访问数量，则获得性能优点。
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10.发明申请Processor architecture for executing transfers between wide operand memories 审中-公开用于执行广泛操作数存储器之间传输的处理器架构公开(公告)号：US20090089540A1
公开(公告)日：2009-04-02
申请号：US11982202
申请日：2007-10-31
申请人： Craig Hansen , John Moussouris , Alexia Massalin
发明人： Craig Hansen , John Moussouris , Alexia Massalin
CPC分类号： G06F9/30014 , G06F9/30007 , G06F9/30021 , G06F9/30029 , G06F9/30032 , G06F9/30036 , G06F9/30043 , G06F9/30101 , G06F9/30109 , G06F9/30112 , G06F9/30145 , G06F9/3016 , G06F9/30167 , G06F9/32 , G06F9/34 , G06F9/3824 , G06F9/383 , G06F9/3885 , G06F12/0886
摘要： A programmable processor and method for improving the performance of processors by expanding at least two source operands, or a source and a result operand, to a width greater than the width of either the general purpose register or the data path width. The present invention provides operands which are substantially larger than the data path width of the processor by using the contents of a general purpose register to specify a memory address at which a plurality of data path widths of data can be read or written, as well as the size and shape of the operand. In addition, several instructions and apparatus for implementing these instructions are described which obtain performance advantages if the operands are not limited to the width and accessible number of general purpose registers.
摘要翻译： 一种可编程处理器和方法，用于通过将至少两个源操作数或源和结果操作数扩展到大于通用寄存器或数据路径宽度的宽度的宽度来提高处理器的性能。 本发明通过使用通用寄存器的内容来指定可以读取或写入数据的多个数据路径宽度的存储器地址，并且基本上大于处理器的数据路径宽度的操作数，以及 操作数的大小和形状。 此外，描述了用于实现这些指令的几个指令和装置，其如果操作数不限于通用寄存器的宽度和可访问数量，则获得性能优点。
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