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    Adaptive Power Tuning in a Successive Approximation Analog-to-Digital Converter
    2.
    发明申请
    Adaptive Power Tuning in a Successive Approximation Analog-to-Digital Converter 有权

    公开(公告)号：US20240396569A1

    公开(公告)日：2024-11-28

    申请号：US18672806

    申请日：2024-05-23

    Applicant: Cypress Semiconductor Corporation

    Inventor： Eric SWINDLEHURST ,  Gajender Rohilla

    IPC: H03M1/46 ,  H03M1/00 ,  H03M1/12

    Abstract: A Successive Approximation Analog-to-Digital Converter (SAR_ADC) and method of operating the same are provided. Generally, the SAR_ADC includes a comparator having a first input to receive an input voltage (VIN), and a second input coupled to a n-bit capacitive digital-to-analog converter (DAC) to receive a voltage (VDAC), a Successive Approximation Register (SAR) coupled to a comparator output to provide n digital control signals to the DAC, and to store and output an n-bit binary-number approximating VIN, and a reference buffer to provide a voltage (VREF) to the DAC. The DAC sequentially drives each capacitance beginning with a most significant bit towards VREF, while the comparator compares the resulting VDAC to VIN, and the SAR sets or clears a current bit represented by the capacitance driven. The reference buffer includes adaptive power tuning to dynamically tune a drive-strength of the reference buffer based on the current bit.

    PROGRAMMABLE SWITCHED CAPACITOR BLOCK
    5.
    发明申请
    PROGRAMMABLE SWITCHED CAPACITOR BLOCK 有权
    可编程开关电容器块

    公开(公告)号：US20160118973A1

    公开(公告)日：2016-04-28

    申请号：US14865999

    申请日：2015-09-25

    Applicant: Cypress Semiconductor Corporation

    Inventor： Eashwar Thiagarajan ,  Harold Kutz ,  Jaskarn Singh Johal ,  Erhan Hancioglu ,  Bruce Byrkett ,  Hans Klein ,  Mark Hastings ,  Dennis Seguine ,  Monte Mar ,  Gajender Rohilla ,  Kendall Castor-Perry ,  Onur Ozbek

    IPC: H03K17/00

    CPC classification number: H03K17/00 ,  H03F3/45475 ,  H03F2203/45512 ,  H03H19/004

    Abstract: A first portion of a programmable switched capacitor block includes a first plurality of switched capacitors and a second portion of the programmable switched capacitor block includes a second plurality of switched capacitors. A first switch associated with the first plurality of switched capacitors as well as a second switch associated with the second plurality of switched capacitors may be configured based on a type of analog function that is to be provided. The configuring of the first analog and the second analog block may include the configuring of the first switch associated with the first plurality of switched capacitors when the analog function operates on a first single ended signal and the configuring of both the first and second switches when the analog function operates on a differential signal

    Abstract translation: 可编程开关电容器块的第一部分包括第一多个开关电容器，并且可编程开关电容器模块的第二部分包括第二多个开关电容器。 可以基于要提供的模拟功能的类型来配置与第一多个开关电容器相关联的第一开关以及与第二多个开关电容器相关联的第二开关。 当模拟功能对第一单端信号进行操作时，第一模拟模块和第二模拟模块的配置可以包括与第一多个开关电容器相关联的第一开关的配置，以及当第一和第二开关 模拟功能对差分信号进行操作

    PROGRAMMABLE SWITCHED CAPACITOR BLOCK
    7.
    发明申请
    PROGRAMMABLE SWITCHED CAPACITOR BLOCK 有权
    可编程开关电容器块

    公开(公告)号：US20150349768A1

    公开(公告)日：2015-12-03

    申请号：US14493635

    申请日：2014-09-23

    Applicant: Cypress Semiconductor Corporation

    Inventor： Eashwar Thiagarajan ,  Harold Kutz ,  Jaskarn Singh Johal ,  Erhan Hancioglu ,  Hans Klein ,  Bruce Byrkett ,  Mark Hastings ,  Dennis Seguine ,  Kendall Castor-Perry ,  Monte Mar ,  Gajender Rohilla

    IPC: H03K17/00

    CPC classification number: H03K17/00 ,  H03H19/00 ,  H03M1/007 ,  H03M1/068 ,  H03M1/18 ,  H03M1/442 ,  H03M1/468 ,  H03M1/70

    Abstract: A first analog block includes a first plurality of switched capacitors and a second analog block includes a second plurality of switched capacitors. A switch associated with the first plurality of switched capacitors as well as a switch associated with the second plurality of switched capacitors may be configured based on one or more analog functions. The configuring of the first analog and the second analog block may include the configuring of the switch associated with the first plurality of switched capacitors when the analog function is associated with a first single ended signal and the configuring of both the switch associated with the first plurality of switched capacitors and the switch associated with the second plurality of switched capacitors when the analog function is associated with a differential signal

    Abstract translation: 第一模拟块包括第一多个开关电容器，第二模拟块包括第二多个开关电容器。 可以基于一个或多个模拟功能来配置与第一多个开关电容器相关联的开关以及与第二多个开关电容器相关联的开关。 当模拟功能与第一单端信号相关联时，第一模拟模块和第二模拟模块的配置可以包括与第一多个开关电容器相关联的开关的配置，以及配置与第一多个开关电容器相关联的开关 的开关电容器和与第二多个开关电容器相关联的开关，当模拟功能与差分信号相关联时

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