DISPLAY PRE-OPERATING SYSTEM CONTENT WITH MULTIPLEXER-LESS DISCRETE THUNDERBOLT

    公开(公告)号:US20240233063A9

    公开(公告)日:2024-07-11

    申请号:US17972505

    申请日:2022-10-24

    CPC classification number: G06T1/20 G06F3/14

    Abstract: An information handling system sets, in response to a power event, a discrete graphics processing unit to transmit graphics data to an external display monitor and an internal display panel. In response to determining that a hybrid graphics mode is enabled and that a video driver has been loaded, the system switches a source of the graphics data to the internal display panel from the discrete graphics processing unit to an integrated graphics processing unit while keeping the discrete graphics processing unit to provide the graphics data to the external display monitor.

    Runtime configuration of chipset to support multiple I/O subsystem versions with one BIOS image

    公开(公告)号:US11816491B2

    公开(公告)日:2023-11-14

    申请号:US17375911

    申请日:2021-07-14

    CPC classification number: G06F9/4411 G06F13/4282 G06F2213/0042

    Abstract: A method for configuring a peripheral bus of an information handling system performs, as part of a boot sequence, an initial configuration of a chipset setting pertaining to the bus based on a descriptor stored in a nonvolatile storage resource. After an operating system is loaded, a controller detects a peripheral device connecting to the bus and responds by performing a runtime configuration of the chipset setting based on capability information obtained from the peripheral device. The peripheral bus may comprise a USB pipe and a USB-C type connector, wherein the peripheral device is detected by a USB power delivery (PD) controller based on configuration channel (CC) pins of the USB-C connector. The PD controller may signal the chipset and send the device’s capability information to the chipset. The PD controller may assert a PMCALERT# signal of the chipset’s and send the capability information via a system management link (SMLink1).

    DISPLAY PRE-OPERATING SYSTEM CONTENT WITH MULTIPLEXER-LESS DISCRETE THUNDERBOLT

    公开(公告)号:US20240135484A1

    公开(公告)日:2024-04-25

    申请号:US17972505

    申请日:2022-10-23

    CPC classification number: G06T1/20 G06F3/14

    Abstract: An information handling system sets, in response to a power event, a discrete graphics processing unit to transmit graphics data to an external display monitor and an internal display panel. In response to determining that a hybrid graphics mode is enabled and that a video driver has been loaded, the system switches a source of the graphics data to the internal display panel from the discrete graphics processing unit to an integrated graphics processing unit while keeping the discrete graphics processing unit to provide the graphics data to the external display monitor.

    METHODS FOR PREVENTING PCIE MISCONFIGURATIONS

    公开(公告)号:US20230251684A1

    公开(公告)日:2023-08-10

    申请号:US17667925

    申请日:2022-02-09

    CPC classification number: G06F1/12 G06F9/451 G06F13/4221

    Abstract: Methods and systems for managing the operation of data processing systems are disclosed. A data processing system may provide computer implemented services. The computer implemented services may be provided with various components operably connected to one another. The data processing system may proactively identify and attempt to remediate mismatches between communication rates of the components and the operable connections between the components. The mismatches may be identified based on electrical widths and clock speeds supported by the operable connections and components.

    Systems and methods to bifurcate at least one peripheral component interconnect express (PCIE) port in accordance with a user-selectable PCIE bifurcation setting

    公开(公告)号:US11436020B2

    公开(公告)日:2022-09-06

    申请号:US16935058

    申请日:2020-07-21

    Abstract: Systems and methods disclosed herein provide a novel solution for PCIe port bifurcation. Unlike conventional client systems, which rely on resistors, jumpers or DIP switches, the disclosed systems and methods enable PCIe ports to be configured in accordance with a plurality of user-selectable PCIe bifurcation settings provided within a boot setup menu. When an “Auto” setting is selected in the boot setup menu, the disclosed systems and methods enable PCIe ports to be: (a) configured in accordance with the bifurcation requirements of the PCIe adapter card(s) connected to the PCIe ports, and (b) automatically reconfigured when bifurcation requirements change. Unlike conventional server systems, which require the user to enter BIOS setup and manually change the PCIe bifurcation settings provided in the BIOS setup menu, the systems and methods disclosed herein enable PCIe ports to be automatically reconfigured, when bifurcation requirements change, without user intervention.

    Preventing discovery of unique identifiers in firmware

    公开(公告)号:US11423148B2

    公开(公告)日:2022-08-23

    申请号:US16920188

    申请日:2020-07-02

    Abstract: Discovery of unique identifiers in firmware can be prevented. During the boot process on a computing system, and after the firmware has generated firmware tables containing unique identifiers, an anonymizer module of the firmware can generate an anonymized version of the firmware tables and cause the anonymized version of the firmware tables, rather than the original, system-unique firmware tables, to be accessible after the operating system is loaded. In this way, once the operating system is loaded, when a module attempts to read the firmware tables, the read will be performed against the anonymized version of the firmware tables thereby preventing the module from obtaining any of the computing system's unique identifiers. A copy of the firmware tables may be maintained separately from the anonymized version of the firmware tables to enable authorized utilities to obtain the computing system's unique identifiers.

    Methods for preventing PCIe misconfigurations

    公开(公告)号:US11762414B2

    公开(公告)日:2023-09-19

    申请号:US17667925

    申请日:2022-02-09

    CPC classification number: G06F1/12 G06F9/451 G06F13/4221

    Abstract: Methods and systems for managing the operation of data processing systems are disclosed. A data processing system may provide computer implemented services. The computer implemented services may be provided with various components operably connected to one another. The data processing system may proactively identify and attempt to remediate mismatches between communication rates of the components and the operable connections between the components. The mismatches may be identified based on electrical widths and clock speeds supported by the operable connections and components.

    Systems And Methods To Bifurcate At Least One Peripheral Component Interconnect Express (PCIE) Port In Accordance With A User-Selectable PCIE Bifurcation Setting

    公开(公告)号:US20220027165A1

    公开(公告)日:2022-01-27

    申请号:US16935058

    申请日:2020-07-21

    Abstract: Systems and methods disclosed herein provide a novel solution for PCIe port bifurcation. Unlike conventional client systems, which rely on resistors, jumpers or DIP switches, the disclosed systems and methods enable PCIe ports to be configured in accordance with a plurality of user-selectable PCIe bifurcation settings provided within a boot setup menu. When an “Auto” setting is selected in the boot setup menu, the disclosed systems and methods enable PCIe ports to be: (a) configured in accordance with the bifurcation requirements of the PCIe adapter card(s) connected to the PCIe ports, and (b) automatically reconfigured when bifurcation requirements change. Unlike conventional server systems, which require the user to enter BIOS setup and manually change the PCIe bifurcation settings provided in the BIOS setup menu, the systems and methods disclosed herein enable PCIe ports to be automatically reconfigured, when bifurcation requirements change, without user intervention.

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