公开(公告)号：US10084052B2

公开(公告)日：2018-09-25

申请号：US15514167

申请日：2015-09-14

Applicant: DENSO CORPORATION

Inventor： Yoshinori Tsuchiya ,  Shinichi Hoshi ,  Masaki Matsui ,  Kenji Itoh

IPC: H01L29/778 ,  H01L29/423 ,  H01L29/66 ,  H01L29/20 ,  H01L29/205 ,  H01L29/51 ,  H01L29/49 ,  H01L21/28

CPC classification number: H01L29/4236 ,  H01L21/28264 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/4916 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/7787 ,  H01L29/78 ,  H01L29/786

Abstract: In a semiconductor device, a gate insulating film is provided with a multi-layer structure including a first insulating film and a second insulating film. The first insulating film is formed of an insulating film containing an element having an oxygen binding force larger than that of an element contained in the second insulating film, and the total charge amount is increased. Specifically, by performing oxygen anneal, it is possible to perform the step of supplying oxygen into an aluminum oxide film and increase the total charge amount. This allows a negative fixed charge density in the gate insulating film in the vicinity of an interface with a GaN layer to be set to a value of not less than 2.5×1011 cm−2 and allows a normally-off element to be reliably provided.

公开(公告)号：US10381469B2

公开(公告)日：2019-08-13

申请号：US15101156

申请日：2014-08-28

Applicant: DENSO CORPORATION

Inventor： Yoshinori Tsuchiya ,  Shinichi Hoshi ,  Kazuyoshi Tomita ,  Kenji Itoh ,  Masahito Kodama ,  Tsutomu Uesugi

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/06 ,  H01L29/417 ,  H01L29/04 ,  H01L29/66 ,  H01L23/29 ,  H01L23/31

Abstract: A semiconductor device includes a switching device having: a substrate configured by a semi-insulating material or a semiconductor; a channel forming layer on the substrate that is configured by a compound semiconductor mainly having a group III nitride; a gate structure configured by a gate electrode on the channel forming layer with a gate insulating film interposed therebetween; and a source electrode and a drain electrode on the channel forming layer at both sides of the gate structure respectively, a collapse inhibiting layer on the channel forming layer in an element region of the channel forming layer where the switching device is arranged that is configured by an insulating material; and a leakage inhibiting layer on the channel forming layer in an element isolation region of the channel forming layer surrounding the element region that is configured by an insulating material different from that of the collapse inhibiting layer.

公开(公告)号：US10121663B2

公开(公告)日：2018-11-06

申请号：US15320799

申请日：2015-03-26

Applicant: DENSO CORPORATION

Inventor： Yoshinori Tsuchiya ,  Hiroyuki Tarumi ,  Shinichi Hoshi ,  Masaki Matsui ,  Kenji Itoh ,  Tetsuo Narita ,  Tetsu Kachi

IPC: H01L21/223 ,  H01L21/20 ,  H01L29/786 ,  H01L29/04 ,  H01L29/10 ,  H01L29/20 ,  H01L29/205 ,  H01L29/423 ,  H01L29/66 ,  H01L29/778 ,  H01L21/28 ,  H01L29/417 ,  H01L29/51

Abstract: A semiconductor device includes a GaN device provided with: a substrate made of a semi-insulating material or a semiconductor; a channel-forming layer including a GaN layer arranged on the substrate; a gate structure in which a gate-insulating film in contact with the GaN layer is arranged on the channel-forming layer, the gate structure having a gate electrode arranged across the gate-insulating film; and a source electrode and a drain electrode that are arranged on the channel-forming layer and on opposite sides interposing the gate structure. The donor element concentration at the interface between the gate-insulating film and the GaN layer and at the lattice position on the GaN layer side with respect to the interface is set to be less than or equal to 5.0×1017 cm−3.