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公开(公告)号:US20150263130A1
公开(公告)日:2015-09-17
申请号:US14438824
申请日:2014-01-09
发明人: Sachiko Aoi , Yukihiko Watanabe , Katsumi Suzuki , Shoji Mizuno
IPC分类号: H01L29/66 , H01L29/423 , H01L29/417 , H01L29/16
CPC分类号: H01L29/66348 , H01L29/0619 , H01L29/0847 , H01L29/0865 , H01L29/0869 , H01L29/1095 , H01L29/1602 , H01L29/1608 , H01L29/2003 , H01L29/41766 , H01L29/66045 , H01L29/66068 , H01L29/66333 , H01L29/66727 , H01L29/66734 , H01L29/7395 , H01L29/7397 , H01L29/7802 , H01L29/7811 , H01L29/7813
摘要: A method of manufacturing a semiconductor device includes: forming a first trench in a first area of a drift layer that has a surface including the first area and a second area; growing a crystal of a p-type base layer on a surface of the drift layer after forming the first trench; and growing a crystal of an n-type source layer on a surface of the base layer. Material of the drift layer, the base layer, and the source layer are a wide-gap semiconductor.
摘要翻译: 一种制造半导体器件的方法包括:在漂移层的第一区域中形成具有包括第一区域和第二区域的表面的第一沟槽; 在形成第一沟槽之后,在漂移层的表面上生长p型基底层的晶体; 以及在所述基底层的表面上生长n型源极层的晶体。 漂移层,基极层和源极层的材料是宽间隙半导体。
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公开(公告)号:US10446649B2
公开(公告)日:2019-10-15
申请号:US14652483
申请日:2013-12-19
IPC分类号: H01L29/16 , H01L29/78 , H01L29/10 , H01L27/088 , H01L29/12 , H01L21/761 , H01L29/06
摘要: A silicon carbide semiconductor device includes: an element isolation layer and an electric field relaxation layer. The element isolation layer is arranged, from the surface of a base region to be deeper than the base region, between a main cell region and a sense cell region, and isolates the main cell region from the sense cell region. The electric field relaxation layer is arranged from a bottom of the base region to be deeper than the element isolation layer. The electric field relaxation layer is divided into a main cell region portion and a sense cell region portion. At least a part of the element isolation layer is arranged inside of a division portion of the electric field relaxation layer.
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公开(公告)号:US10374079B2
公开(公告)日:2019-08-06
申请号:US15505267
申请日:2015-09-08
摘要: A silicon carbide semiconductor device includes: a substrate; a drift layer over the substrate; a base region over the drift layer; multiple source regions over an upper layer portion of the base region; a contact region over the upper layer portion of the base region between opposing source regions; multiple trenches from a surface of each source region to a depth deeper than the base region; a gate electrode on a gate insulating film in each trench; a source electrode electrically connected to the source regions and the contact region; a drain electrode over a rear surface of the substrate; and multiple electric field relaxation layers in the drift layer between adjacent trenches. Each electric field relaxation layer includes: a first region at a position deeper than the trenches; and a second region from a surface of the drift layer to the first region.
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公开(公告)号:US10153345B2
公开(公告)日:2018-12-11
申请号:US15576740
申请日:2016-06-03
发明人: Hidefumi Takaya , Shoji Mizuno , Yukihiko Watanabe , Sachiko Aoi
IPC分类号: H01L29/16 , H01L21/02 , H01L29/423 , H01L29/66 , H01L29/739 , H01L29/78 , H01L29/06 , H01L29/10 , H01L21/04 , H01L29/36
摘要: A method for manufacturing an insulated gate switching device is provided. The method includes: forming a first trench in a surface of a first SiC semiconductor layer; implanting p-type impurities into a bottom surface of the first trench; depositing a second SiC semiconductor layer on an inner surface of the first trench to form a second trench; and forming a gate insulating layer, a gate electrode, a first region and a body region so that the gate insulating layer covers an inner surface of the second trench, the gate electrode is located in the second trench, the first region is of n-type and in contact with the gate insulating layer, the body region is of p-type, separated from the implanted region, and in contact with the gate insulating layer under the first region.
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公开(公告)号:US09660046B2
公开(公告)日:2017-05-23
申请号:US14438824
申请日:2014-01-09
发明人: Sachiko Aoi , Yukihiko Watanabe , Katsumi Suzuki , Shoji Mizuno
IPC分类号: H01L21/332 , H01L29/66 , H01L29/78 , H01L29/10 , H01L29/739 , H01L29/16 , H01L29/417 , H01L29/08 , H01L29/20 , H01L29/06
CPC分类号: H01L29/66348 , H01L29/0619 , H01L29/0847 , H01L29/0865 , H01L29/0869 , H01L29/1095 , H01L29/1602 , H01L29/1608 , H01L29/2003 , H01L29/41766 , H01L29/66045 , H01L29/66068 , H01L29/66333 , H01L29/66727 , H01L29/66734 , H01L29/7395 , H01L29/7397 , H01L29/7802 , H01L29/7811 , H01L29/7813
摘要: A method of manufacturing a semiconductor device includes: forming a first trench in a first area of a drift layer that has a surface including the first area and a second area; growing a crystal of a p-type base layer on a surface of the drift layer after forming the first trench; and growing a crystal of an n-type source layer on a surface of the base layer. Material of the drift layer, the base layer, and the source layer are a wide-gap semiconductor.
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公开(公告)号:US09871098B2
公开(公告)日:2018-01-16
申请号:US15516837
申请日:2015-07-22
发明人: Jun Saito , Atsushi Onogi , Sachiko Aoi , Shoji Mizuno
IPC分类号: H01L29/78 , H01L29/06 , H01L21/761 , H01L21/762 , H01L21/265
CPC分类号: H01L29/063 , H01L21/265 , H01L29/0615 , H01L29/0619 , H01L29/0623 , H01L29/0661 , H01L29/1608 , H01L29/2003 , H01L29/66068 , H01L29/66734 , H01L29/7397 , H01L29/7811 , H01L29/7813
摘要: A semiconductor device may include a semiconductor substrate in which a semiconductor element is provided, and an insulation film provided on the semiconductor substrate, in which the semiconductor substrate may include a first portion and a second portion which has a thickness thinner than a thickness of the first portion, an upper surface of the second portion may be positioned lower than an upper surface of the first portion, a recess extending in a thickness direction of the semiconductor substrate may be provided on the upper surface of the second portion located at a position where the first portion and the second portion adjoin to each other, and the insulation film may extend over from the first portion to the second portion, and fill the recess.
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公开(公告)号:US20160351665A1
公开(公告)日:2016-12-01
申请号:US15157865
申请日:2016-05-18
CPC分类号: H01L29/1083 , H01L29/1095 , H01L29/1608 , H01L29/42368 , H01L29/7811 , H01L29/7813
摘要: A semiconductor device is provided with a semiconductor substrate and a trench gate. The semiconductor substrate is provided with a drift region of a first conductive type, wherein the drift region is in contact with the trench gate; a body region of a second conductive type, wherein the body region is disposed above the drift region and is in contact with the trench gate; a source region of the first conductive type, wherein the source region is disposed above the body region, exposed on the front surface of the semiconductor substrate and is in contact with the trench gate; and a front surface region of the second conductive type, wherein the front surface region is disposed above the source region, exposed on the front surface of the semiconductor substrate and is in contact with the trench gate.
摘要翻译: 半导体器件设置有半导体衬底和沟槽栅极。 半导体衬底设置有第一导电类型的漂移区域,其中漂移区域与沟槽栅极接触; 第二导电类型的体区,其中所述体区设置在所述漂移区上方并与所述沟槽栅接触; 所述第一导电类型的源极区域,其中所述源极区域设置在所述体区域上方,暴露在所述半导体衬底的前表面上并与所述沟槽栅极接触; 以及所述第二导电类型的前表面区域,其中所述前表面区域设置在所述源极区域上方,暴露在所述半导体衬底的前表面上并与所述沟槽栅极接触。
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公开(公告)号:US20160087094A1
公开(公告)日:2016-03-24
申请号:US14853259
申请日:2015-09-14
发明人: Hidefumi Takaya , Jun Saito , Sachiko Aoi , Yukihiko Watanabe , Shoji Mizuno , Shinichiro Miyahara
IPC分类号: H01L29/78 , H01L29/16 , G01R31/26 , H01L29/06 , H01L27/088 , H01L29/423 , H01L29/04
CPC分类号: H01L29/7813 , H01L29/04 , H01L29/0623 , H01L29/0696 , H01L29/1608 , H01L29/4238 , H01L29/7815
摘要: A semiconductor device includes a semiconductor substrate having a main cell region and a sense cell region. A separation trench separating a main second semiconductor region from a sense second semiconductor region is provided in an upper surface of the semiconductor substrate. The semiconductor substrate includes a separation fourth semiconductor region being of a second conductivity type and separated from the main second semiconductor region and the sense second semiconductor substrate by a third semiconductor region.
摘要翻译: 半导体器件包括具有主单元区域和感测单元区域的半导体衬底。 在半导体衬底的上表面中设置有将主第二半导体区域与感测第二半导体区域分开的分离沟槽。 半导体衬底包括具有第二导电类型的分离第四半导体区域,并且通过第三半导体区域与主第二半导体区域和感测第二半导体衬底分离。
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公开(公告)号:US10388527B2
公开(公告)日:2019-08-20
申请号:US15726603
申请日:2017-10-06
发明人: Norihiro Togawa , Narumasa Soejima , Shoji Mizuno
IPC分类号: H01L21/04 , H01L21/265 , H01L29/66 , H01L29/16 , H01L29/872
摘要: A method of manufacturing a semiconductor device is provided with: implanting charged particles including oxygen into a surface of a SiC wafer; and forming a Schottky electrode that makes Schottky contact with the SiC wafer on the surface after the implantation of the charged particles.
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公开(公告)号:US10128344B2
公开(公告)日:2018-11-13
申请号:US15560794
申请日:2016-03-10
IPC分类号: H01L29/423 , H01L29/78 , H01L29/06 , H01L29/12 , H01L29/10 , H01L29/16 , H01L29/40 , H01L29/51 , H01L29/739
摘要: A semiconductor device includes: a drain region made of a first or second conductivity type semiconductors; a drift layer made of the first conductivity type semiconductor; a base region made of the second conductivity type semiconductor; a source region made of the first conductivity type semiconductor with higher concentration; a contact region made of the second conductivity semiconductor with higher concentration; a trench gate structure having upper and lower gate structures; a source electrode connected to the source and contact regions; and a drain electrode at a rear side of the drain region. The upper gate structure is inside the trench at an upper side, and includes a first gate insulation film and a first gate electrode. The lower gate structure is inside the trench at a lower side, and includes a second gate insulation film made of higher dielectric insulation material and a second gate electrode.
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