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公开(公告)号:US20050101040A1
公开(公告)日:2005-05-12
申请号:US11012603
申请日:2004-12-14
申请人: Daine Lai , Samson Berhane , Barry Snyder , Ronald Hellekson , Hubert Plas
发明人: Daine Lai , Samson Berhane , Barry Snyder , Ronald Hellekson , Hubert Plas
IPC分类号: B41J2/16 , B81B7/00 , H01L21/768 , H01L23/48 , H05K1/11 , H01L21/66 , G01R31/26 , H01L21/00 , H01L21/44
CPC分类号: B41J2/16 , B41J2/1628 , B41J2/1629 , B41J2/1631 , B41J2/1634 , B41J2/1642 , B41J2/1643 , B41J2/1646 , B41J2202/18 , B81B7/0006 , B81B2201/052 , H01L21/76898 , H01L23/481 , H01L2924/0002 , H05K1/112 , H05K2201/09518 , H01L2924/00
摘要: A method of manufacturing a microelectronics device is provided, wherein the microelectronics device is formed on a substrate having a frontside and a backside. The method comprises forming a circuit element on the frontside of the substrate from a plurality of layers deposited on the frontside of the substrate, wherein the plurality of layers includes an intermediate electrical contact layer, and forming an interconnect structure after forming the electrical contact layer. The interconnect structure includes a contact pad formed on the backside of the substrate, and a through-substrate interconnect in electrical communication with the contact pad, wherein the through-substrate interconnect extends from the backside of the substrate to the electrical contact layer.
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公开(公告)号:US07432582B2
公开(公告)日:2008-10-07
申请号:US11012603
申请日:2004-12-14
IPC分类号: H01L29/06
CPC分类号: B41J2/16 , B41J2/1628 , B41J2/1629 , B41J2/1631 , B41J2/1634 , B41J2/1642 , B41J2/1643 , B41J2/1646 , B41J2202/18 , B81B7/0006 , B81B2201/052 , H01L21/76898 , H01L23/481 , H01L2924/0002 , H05K1/112 , H05K2201/09518 , H01L2924/00
摘要: A method of manufacturing a microelectronics device is provided, wherein the microelectronics device is formed on a substrate having a frontside and a backside. The method comprises forming a circuit element on the frontside of the substrate from a plurality of layers deposited on the frontside of the substrate, wherein the plurality of layers includes an intermediate electrical contact layer, and forming an interconnect structure after forming the electrical contact layer. The interconnect structure includes a contact pad formed on the backside of the substrate, and a through-substrate interconnect in electrical communication with the contact pad, wherein the through-substrate interconnect extends from the backside of the substrate to the electrical contact layer.
摘要翻译: 提供了一种制造微电子器件的方法,其中微电子器件形成在具有前侧和背侧的衬底上。 该方法包括从沉积在基板的前侧上的多个层在基板的前侧形成电路元件,其中多个层包括中间电接触层,以及在形成电接触层之后形成互连结构。 所述互连结构包括形成在所述衬底的背面上的接触焊盘以及与所述接触焊盘电连通的贯穿衬底互连,其中所述贯通衬底互连件从所述衬底的背面延伸到所述电接触层。
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公开(公告)号:US06716737B2
公开(公告)日:2004-04-06
申请号:US10208363
申请日:2002-07-29
申请人: Hubert Vander Plas , Barry C. Snyder , Ronald A. Hellekson , Ronnie J. Yenchik , Diane Lai , Samson Berhane
发明人: Hubert Vander Plas , Barry C. Snyder , Ronald A. Hellekson , Ronnie J. Yenchik , Diane Lai , Samson Berhane
IPC分类号: H01L2144
CPC分类号: H01L21/76898 , H01L23/481
摘要: A method of forming a through-substrate interconnect for a circuit element in a microelectronics device is provided. The device is formed on a substrate having a frontside and a backside, and includes a circuit element formed on the frontside of the substrate connected to a contact pad formed on the backside of the substrate by the through-substrate interconnect. The method includes forming a first interconnect structure extending into the substrate from the frontside of the substrate, at least partially forming the circuit element such that the circuit element is in electrical communication with the first interconnect structure, and forming a second interconnect structure extending into the substrate from the backside of the substrate after forming the first interconnect structure such that the second interconnect structure is in electrical communication with the first interconnect structure.
摘要翻译: 提供了一种在微电子器件中形成用于电路元件的贯通衬底互连的方法。 该器件形成在具有前侧和背面的衬底上,并且包括形成在衬底的前侧的电路元件,该电路元件通过贯穿衬底互连连接到形成在衬底的背面上的接触焊盘。 该方法包括形成从衬底的前侧延伸到衬底中的第一互连结构,至少部分地形成电路元件,使得电路元件与第一互连结构电连通,以及形成延伸到 在形成第一互连结构之后,从衬底的背面起第二互连结构与第一互连结构电连通的衬底。
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公开(公告)号:US20060125882A1
公开(公告)日:2006-06-15
申请号:US11345755
申请日:2006-02-02
申请人: Ulrich Hess , Samson Berhane , Arjang Fartash
发明人: Ulrich Hess , Samson Berhane , Arjang Fartash
IPC分类号: B41J2/05
CPC分类号: B41J2/1606 , B41J2/14129 , B41J2202/03
摘要: Atomic layer deposition forms a cavitation layer of a print head.
摘要翻译: 原子层沉积形成打印头的空化层。
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公开(公告)号:US06902872B2
公开(公告)日:2005-06-07
申请号:US10208163
申请日:2002-07-29
CPC分类号: B41J2/16 , B41J2/1628 , B41J2/1629 , B41J2/1631 , B41J2/1634 , B41J2/1642 , B41J2/1643 , B41J2/1646 , B41J2202/18 , B81B7/0006 , B81B2201/052 , H01L21/76898 , H01L23/481 , H01L2924/0002 , H05K1/112 , H05K2201/09518 , H01L2924/00
摘要: A method of manufacturing a microelectronics device is provided, wherein the microelectronics device is formed on a substrate having a frontside and a backside. The method comprises forming a circuit element on the frontside of the substrate from a plurality of layers deposited on the frontside of the substrate, wherein the plurality of layers includes an intermediate electrical contact layer, and forming an interconnect structure after forming the electrical contact layer. The interconnect structure includes a contact pad formed on the backside of the substrate, and a through-substrate interconnect in electrical communication with the contact pad, wherein the through-substrate interconnect extends from the backside of the substrate to the electrical contact layer.
摘要翻译: 提供了一种制造微电子器件的方法,其中微电子器件形成在具有前侧和背侧的衬底上。 该方法包括从沉积在基板的前侧上的多个层在基板的前侧形成电路元件,其中多个层包括中间电接触层,以及在形成电接触层之后形成互连结构。 所述互连结构包括形成在所述衬底的背面上的接触焊盘以及与所述接触焊盘电连通的贯穿衬底互连,其中所述贯通衬底互连件从所述衬底的背面延伸到所述电接触层。
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公开(公告)号:US08333459B2
公开(公告)日:2012-12-18
申请号:US12933218
申请日:2008-04-29
申请人: Rio Rivas , Jon A. Crabtree , Eric L. Nikkel , Siddhartha Bhowmik , Bradley D. Chung , Samson Berhane
发明人: Rio Rivas , Jon A. Crabtree , Eric L. Nikkel , Siddhartha Bhowmik , Bradley D. Chung , Samson Berhane
IPC分类号: B41J2/135
CPC分类号: B41J2/1606 , B41J2/1603 , B41J2/1628 , B41J2/1631 , B41J2/1632 , B41J2/1634 , B41J2/1642 , B41J2/1643 , Y10T29/49401 , Y10T428/277
摘要: A printing device (10) including a substrate (22) having an aperture (20) extending therethrough, wherein the aperture includes a side wall and defines a liquid ink flow path, an ink firing chamber (24) fluidically connected to the aperture, and a coating positioned on the side wall of the aperture, the coating being impervious to etching by liquid ink, and wherein the coating is chosen from one of silicon dioxide, aluminum oxide, hafnium oxide and silicon nitride.
摘要翻译: 一种包括具有延伸穿过其中的孔(20)的基底(22)的印刷装置(10),其中所述孔包括侧壁并限定液体墨流动路径,与所述孔流体连接的喷墨室(24),以及 位于所述孔的侧壁上的涂层,所述涂层不受液体油墨的蚀刻,并且其中所述涂层选自二氧化硅,氧化铝,氧化铪和氮化硅之一。
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公开(公告)号:US07517060B2
公开(公告)日:2009-04-14
申请号:US11345755
申请日:2006-02-02
申请人: Ulrich E. Hess , Samson Berhane , Arjang Fartash
发明人: Ulrich E. Hess , Samson Berhane , Arjang Fartash
IPC分类号: B41J2/05
CPC分类号: B41J2/1606 , B41J2/14129 , B41J2202/03
摘要: A cavitation structure for a print head has a first dielectric layer overlying at least a first portion of a substrate. A second dielectric layer has a first portion overlying at least a second portion of the substrate and a second portion, different from the first portion of the second dielectric layer, overlying at least a portion of the first dielectric layer. A cavitation layer has a first portion in contact with the first dielectric layer and a second portion in lateral contact with the second portion of the second dielectric layer. A third dielectric layer is disposed on only the first portion of the second dielectric layer.
摘要翻译: 用于打印头的空化结构具有覆盖在基底的至少第一部分上的第一介电层。 第二电介质层具有覆盖衬底的至少第二部分的第一部分和与第二介电层的第一部分不同的第二部分,覆盖第一介电层的至少一部分。 空化层具有与第一介电层接触的第一部分和与第二介电层的第二部分侧向接触的第二部分。 第三电介质层仅设置在第二电介质层的第一部分上。
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公开(公告)号:US20110018938A1
公开(公告)日:2011-01-27
申请号:US12933218
申请日:2008-04-29
申请人: Rio Rivas , Jon A. Crabtree , Eric L. Nikkel , Siddhartha Bhowmik , Bradley D. Chung , Samson Berhane
发明人: Rio Rivas , Jon A. Crabtree , Eric L. Nikkel , Siddhartha Bhowmik , Bradley D. Chung , Samson Berhane
CPC分类号: B41J2/1606 , B41J2/1603 , B41J2/1628 , B41J2/1631 , B41J2/1632 , B41J2/1634 , B41J2/1642 , B41J2/1643 , Y10T29/49401 , Y10T428/277
摘要: A printing device (10) including a substrate (22) having an aperture (20) extending therethrough, wherein the aperture includes a side wall and defines a liquid ink flow path, an ink firing chamber (24) fluidically connected to the aperture, and a coating positioned on the side wall of the aperture, the coating being impervious to etching by liquid ink, and wherein the coating is chosen from one of silicon dioxide, aluminum oxide, hafnium oxide and silicon nitride.
摘要翻译: 一种包括具有延伸穿过其中的孔(20)的基底(22)的印刷装置(10),其中所述孔包括侧壁并限定液体墨流动路径,与所述孔流体连接的喷墨室(24),以及 位于所述孔的侧壁上的涂层,所述涂层不受液体油墨的蚀刻,并且其中所述涂层选自二氧化硅,氧化铝,氧化铪和氮化硅之一。
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公开(公告)号:US07025894B2
公开(公告)日:2006-04-11
申请号:US10620666
申请日:2003-07-16
申请人: Ulrich E. Hess , Samson Berhane , Arjang Fartash
发明人: Ulrich E. Hess , Samson Berhane , Arjang Fartash
IPC分类号: B41J2/04
CPC分类号: B41J2/1606 , B41J2/14129 , B41J2202/03
摘要: Atomic layer deposition forms a cavitation layer of a print head.
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公开(公告)号:US20050006339A1
公开(公告)日:2005-01-13
申请号:US10618049
申请日:2003-07-11
CPC分类号: C23C18/1601 , C23C18/1603 , C23C18/1608 , C23C18/161 , C23C18/1658 , C23C18/1678 , C23C18/1879 , C23C18/28 , C23C18/30 , C23C18/31 , C23C18/405 , C23C18/44 , H05K3/182 , H05K2203/013 , H05K2203/1157
摘要: Methods and systems for depositing metal patterns on a substrate are provided. Accordingly, an electroless active layer can be formed on a substrate. Ink-jet techniques can then be used to independently ink-jet at least two components of an electroless deposition composition onto a variety of substrates. A metal composition can be ink-jetted onto the electroless active layer. The metal composition can contain a metal salt and optional additives. A reducing agent composition can be ink-jetted either subsequent to or prior to ink-jetting of the metal composition to form an electroless composition on the substrate. The metal salt and reducing agent react to form a metal pattern which can be used in formation of electronic devices or other products. The described ink-jettable compositions are stable over a wide range of conditions and allow for wide latitude in inkjet formulations and choice of substrates.
摘要翻译: 提供了用于在衬底上沉积金属图案的方法和系统。 因此,可以在基板上形成无电活性层。 然后可以使用喷墨技术独立地将无电沉积组合物的至少两种组分喷射到各种基底上。 可以将金属组合物喷墨到无电活性层上。 金属组合物可以含有金属盐和任选的添加剂。 还原剂组合物可以在喷墨金属组合物之前或之前喷墨,以在基材上形成无电解组合物。 金属盐和还原剂反应形成可用于形成电子器件或其他产品的金属图案。 所描述的喷墨组合物在宽范围的条件下是稳定的,并且允许在喷墨配方中的宽范围和基底的选择。
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