公开(公告)号：US06828560B2

公开(公告)日：2004-12-07

申请号：US10059401

申请日：2002-01-31

Applicant: David K. Lambert ,  Han-Sheng Lee ,  Dan W. Chilcott ,  Hamid R. Borzabadi ,  Qin Jiang ,  James H. Logsdon

Inventor： David K. Lambert ,  Han-Sheng Lee ,  Dan W. Chilcott ,  Hamid R. Borzabadi ,  Qin Jiang ,  James H. Logsdon

IPC: G01J508

CPC classification number: G01J5/0022 ,  G01J5/0025 ,  G01J5/02 ,  G01J5/0225 ,  G01J5/045 ,  G01J5/06 ,  G01J5/08 ,  G01J5/0809 ,  G01J5/0815 ,  G01J5/0853 ,  G01J5/0875 ,  G01J5/12

Abstract: An infrared sensor including an absorber for absorbing incident infrared power to produce a signal representing the temperature of a target object, a frame supporting a membrane which carries the absorber, the frame including a plurality of reflecting surfaces disposed about the circumference of an opening over which the membrane spans for reflecting incident infrared power toward the absorber. By concentrating incident infrared power through reflection, the temperature difference between the absorber and the surrounding frame is increased, thereby producing an increased electrical output from the sensor.

Abstract translation: 一种红外线传感器，包括：吸收器，用于吸收入射的红外光，产生表示目标物体的温度的信号;支撑承载吸收体的膜的框架，所述框架包括围绕开口的圆周设置的多个反射面， 膜跨过来将反射入射的红外线朝向吸收体反射。 通过反射聚焦入射的红外线功率，吸收器和周围框架之间的温差增加，从而产生从传感器增加的电输出。

公开(公告)号：US06750521B1

公开(公告)日：2004-06-15

申请号：US09422723

申请日：1999-10-22

Applicant: Dan W. Chilcott ,  Hamid Reza Borzabadi ,  Douglas Ray Sparks

Inventor： Dan W. Chilcott ,  Hamid Reza Borzabadi ,  Douglas Ray Sparks

IPC: H01L2984

CPC classification number: B81B7/007 ,  B81B7/0074 ,  H01L2224/11

Abstract: A semiconductor device and method by which a device chip with a micromachine is directly surface mounted to a circuit board. A capping chip is bonded to the device chip and encloses the micromachine. The capping chip has a first surface facing the device chip, an oppositely-disposed second surface, and electrical interconnects through the capping chip between the first and second surfaces. The electrical interconnects electrically communicate with runners on the device chip that are electrically connected to the micromachine, thereby providing a signal path from the micromachine to the exterior of the device. The capping chip further includes bond pads for electrical communication with the electrical interconnects. With the bond pads, the capping chip can be surface mounted to a circuit board by reflowing solder bumps formed on the bond pads. Depending on the placement of the bond pads on the capping chip, the semiconductor device can be mounted to the circuit board with the capping chip between the device chip and circuit board, or the semiconductor device can be mounted with one side of the device attached to the circuit board.

Abstract translation: 将具有微机械的器件芯片直接表面安装到电路板的半导体器件和方法。 封装芯片与器件芯片接合并封装微机械。 封盖芯片具有面向器件芯片的第一表面，相对设置的第二表面，并且在第一和第二表面之间通过封盖芯片电互连。 电互连与电连接到微机器的器件芯片上的流道电连通，从而提供从微机械到设备外部的信号路径。 封盖芯片还包括用于与电互连件进行电连通的接合焊盘。 利用接合焊盘，封装芯片可以通过回流形成在接合焊盘上的焊料凸块来表面安装到电路板。 根据覆盖芯片上接合焊盘的位置，半导体器件可以通过封装芯片安装在电路板之间，在器件芯片和电路板之间，或半导体器件可以安装在设备的一侧， 电路板。

公开(公告)号：US5413955A

公开(公告)日：1995-05-09

申请号：US169117

申请日：1993-12-21

Applicant: Han-Sheng Lee ,  Steven E. Staller ,  Dan W. Chilcott

Inventor： Han-Sheng Lee ,  Steven E. Staller ,  Dan W. Chilcott

IPC: G01P15/08 ,  H01L21/20

CPC classification number: G01P15/0802 ,  Y10S148/135

Abstract: A process for silicon wafer-to-wafer bonding at temperatures lower than 500.degree. C. has been developed. It consists of (1) treating the cleaned surfaces to make them smooth and hydrophilic, (2) initiating the bond by making intimate contact between wafers and (3) enhancing the bond strength at elevated temperatures. This bonding process can be applied to sensor packaging.

Abstract translation: 已经开发了在低于500℃的温度下进行硅晶片到晶片接合的工艺。 它包括（1）处理清洁的表面以使其光滑和亲水，（2）通过使晶片之间的紧密接触和（3）在升高的温度下增强粘结强度来引发粘合。 这种粘合工艺可以应用于传感器包装。

公开(公告)号：US20090104485A1

公开(公告)日：2009-04-23

申请号：US12103988

申请日：2008-04-16

Applicant: Peter James Schubert ,  John Carl Christenson ,  Dan W. Chilcott

Inventor： Peter James Schubert ,  John Carl Christenson ,  Dan W. Chilcott

IPC: H01M8/04

CPC classification number: C01B3/001 ,  B29C48/04 ,  B29C48/05 ,  B29C48/09 ,  B29C48/30 ,  B29C48/345 ,  B29K2021/00 ,  B29K2083/005 ,  C01B3/0084 ,  H01M8/0606 ,  H01M2008/1293 ,  Y02E60/324 ,  Y02P70/56

Abstract: An auxiliary power unit for generating electrical power. The auxiliary power unit includes a fuel cell system for combining hydrogen and oxygen to provide electrical power, and a system for storing and retrieving elemental hydrogen for supplying hydrogen to the fuel cell system. The storing and retrieving system contains at least one hydrogen storage member formed by a mass of porous silicon having interior and exterior surfaces, in which at least the interior surfaces have dangling bond sites at which reversible chemisorption of hydrogen atoms occurs. The storing and retrieving system further includes a control system for liberating the chemisorbed hydrogen atoms from the dangling bond sites and releasing the liberated hydrogen atoms as hydrogen gas for use by the fuel cell system.

Abstract translation: 用于产生电力的辅助动力单元。 辅助动力单元包括用于组合氢气和氧气以提供电力的燃料电池系统，以及用于存储和回收用于向燃料电池系统供应氢的元素氢的系统。 存储和回收系统包含至少一个由具有内表面和外表面的多孔硅块形成的储氢构件，其中至少内表面具有在氢原子发生可逆化学吸附的悬挂键位置。 存储和检索系统还包括用于从悬挂键位置释放化学吸附的氢原子并释放释放的氢原子作为氢气供燃料电池系统使用的控制系统。

公开(公告)号：US20080248604A1

公开(公告)日：2008-10-09

申请号：US11732151

申请日：2007-04-03

Applicant: John C. Christenson ,  Dan W. Chilcott

Inventor： John C. Christenson ,  Dan W. Chilcott

IPC: H01L21/00

CPC classification number: H01L21/76264 ,  H01L21/76283

Abstract: In producing an integrated sensor, regions of silicon between compensating electronics and a sensor are electrically isolated, while the sensor is delineating and released. The described process can be performed at the end of a fabrication process after electronics processing (i.e., CMOS processing) and compensating electronics are formed. In an aspect, the sensor and a conductive bridge are simultaneously developed from a silicon-on-insulator (SOI) substrate. In an aspect, the sensor is undercut from a silicon substrate utilizing a lateral etch. A cavity is concurrently defined by the same lateral etch in the silicon layer, forming the conductive bridge connecting the sensor to a logic component. An isolation trench is defined in the silicon layer between the sensor components and the logic component. A polymer masks vertical surfaces from the lateral etch, and an insulator layer and photosensitive film mask horizontal surfaces from the lateral etch.

Abstract translation: 在制造集成传感器时，补偿电子器件和传感器之间的硅区域是电隔离的，同时传感器被描绘和释放。 所描述的处理可以在电子处理（即，CMOS处理）和补偿电子器件形成之后的制造过程结束时执行。 在一方面，传感器和导电桥由绝缘体上硅（SOI）衬底同时显影。 在一方面，传感器利用横向蚀刻从硅衬底切下。 通过硅层中相同的横向蚀刻同时限定空腔，形成将传感器连接到逻辑部件的导电桥。 在传感器部件和逻辑部件之间的硅层中限定隔离沟槽。 聚合物从横向蚀刻掩模垂直表面，并且绝缘体层和感光膜从横向蚀刻掩模水平表面。

公开(公告)号：US07179668B2

公开(公告)日：2007-02-20

申请号：US11113554

申请日：2005-04-25

Applicant: William J. Baney ,  Dan W. Chilcott

Inventor： William J. Baney ,  Dan W. Chilcott

IPC: H01L21/00 ,  H01L21/44

CPC classification number: B81C1/00158 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C2201/014 ,  B81C2201/019 ,  G01L9/0042

Abstract: A technique for manufacturing silicon structures includes etching a cavity into a first side of an epitaxial wafer. A thickness of an epitaxial layer is selected, based on a desired depth of the etched cavity and a desired membrane thickness. The first side of the epitaxial wafer is then bonded to a first side of a handle wafer. After thinning the epitaxial wafer until only the epitaxial layer remains, desired circuitry is formed on a second side of the remaining epitaxial layer, which is opposite the first side of the epitaxial wafer.

Abstract translation: 制造硅结构的技术包括将空腔蚀刻到外延晶片的第一侧。 基于蚀刻空腔的期望深度和期望的膜厚度来选择外延层的厚度。 然后将外延晶片的第一侧接合到处理晶片的第一侧。 在使外延晶片变薄直到只剩余外延层之后，在与外延晶片的第一侧相对的剩余外延层的第二侧上形成所需的电路。

公开(公告)号：US06793389B2

公开(公告)日：2004-09-21

申请号：US10065447

申请日：2002-10-18

Applicant: Abhijeet V. Chavan ,  James H. Logsdon ,  Dan W. Chilcott ,  Han-Sheng S. Lee ,  David K. Lambert ,  Timothy A. Vas

Inventor： Abhijeet V. Chavan ,  James H. Logsdon ,  Dan W. Chilcott ,  Han-Sheng S. Lee ,  David K. Lambert ,  Timothy A. Vas

IPC: G01K702

CPC classification number: G01J5/14 ,  G01J5/12

Abstract: An integrated sensor comprising a thermopile transducer and signal processing circuitry that are combined on a single semiconductor substrate, such that the transducer output signal is sampled in close vicinity by the processing circuitry. The sensor comprises a frame formed of a semiconductor material that is not heavily doped, and with which a diaphragm is supported. The diaphragm has a first surface for receiving thermal (e.g., infrared) radiation, and comprises multiple layers that include a sensing layer containing at least a pair of interlaced thermopiles. Each thermopile comprises a sequence of thermocouples, each thermocouple comprising dissimilar electrically-resistive materials that define hot junctions located on the diaphragm and cold junctions located on the frame. The signal processing circuitry is located on the frame and electrically interconnected with the thermopiles. The thermopiles are interlaced so that the output of one of the thermopiles increases with increasing temperature difference between the hot and cold junctions thereof, while the output of the second thermopile decreases with increasing temperature difference between its hot and cold junctions.

Abstract translation: 一种集成传感器，包括组合在单个半导体衬底上的热电堆换能器和信号处理电路，使得换能器输出信号在处理电路附近被采样。 传感器包括由不重掺杂的半导体材料形成的框架，并且隔膜支撑在该框架上。 隔膜具有用于接收热（例如，红外）辐射的第一表面，并且包括多层，其包括含有至少一对隔行热电堆的感测层。 每个热电堆包括一系列热电偶，每个热电偶包括不同的电阻材料，其限定位于隔膜上的热接点和位于框架上的冷接头。 信号处理电路位于框架上并与热电堆电互连。 热电堆交织使得其中一个热电堆的输出随着其热连接点和冷连接点之间温度差的增加而增加，而第二热电堆的输出随着其热连接点和冷连接点之间的温差增加而减小。

公开(公告)号：US5369057A

公开(公告)日：1994-11-29

申请号：US169118

申请日：1993-12-21

Applicant: Han-Sheng Lee ,  Steven E. Staller ,  James H. Logsdon ,  Dan W. Chilcott

Inventor： Han-Sheng Lee ,  Steven E. Staller ,  James H. Logsdon ,  Dan W. Chilcott

IPC: G01P1/02 ,  G01P15/08 ,  H01L21/50 ,  H01L23/13 ,  H01L21/60

CPC classification number: G01P1/023 ,  G01P15/0802 ,  H01L21/50 ,  H01L23/13 ,  H01L2924/0002 ,  Y10T29/49103

Abstract: This invention generally relates to the provision of a vent path during the bonding of silicon wafers and the subsequent encapsulation of the individual devices. A double-sided polished silicon wafer is used for the device wafer. The device wafer includes circuitry, thin membranes and metal interconnections. When bonding a bottom wafer to the device wafer, a vented path exists between the wafers. The venting path includes serpentine shape channel formed by interdigitated fingers and cavities. The cavity and the interdigitated patterns can be etched either together or separately into either wafer. A top wafer has a cavity formed therein. When the top device and bottom wafers are bonded together, the venting path is sealed by dipping the device in a sealing liquid. The serpentine path prevents the sealing liquid from reaching the cavity.

Abstract translation: 本发明一般涉及在硅晶片的接合期间提供通气路径以及随后的各个装置的封装。 用于器件晶圆的双面抛光硅晶片。 器件晶片包括电路，薄膜和金属互连。 当将底部晶片接合到器件晶片时，在晶片之间存在通气路径。 通气路径包括由叉指和空腔形成的蛇形形状通道。 空腔和叉指图案可以一起蚀刻或分别蚀刻到任一晶片中。 顶部晶片具有形成在其中的空腔。 当顶部装置和底部晶片结合在一起时，通过将装置浸入密封液中来密封通气路径。 蛇形路径防止密封液到达腔体。

公开(公告)号：US07908922B2

公开(公告)日：2011-03-22

申请号：US12011184

申请日：2008-01-24

Applicant: Seyed R. Zarabadi ,  John C. Christenson ,  Dan W. Chilcott ,  Richard G. Forestal ,  Jack D. Johnson

Inventor： Seyed R. Zarabadi ,  John C. Christenson ,  Dan W. Chilcott ,  Richard G. Forestal ,  Jack D. Johnson

IPC: G01P9/04

CPC classification number: G01C19/5684

Abstract: A motion sensor in the form of an angular rate sensor and a method of making a sensor are provided and includes a support substrate and a silicon sensing ring supported by the substrate and having a flexive resonance. Drive electrodes apply electrostatic force on the ring to cause the ring to resonate. Sensing electrodes sense a change in capacitance indicative of vibration modes of resonance of the ring so as to sense motion. A plurality of silicon support rings connect the substrate to the ring. The support rings are located at an angle to substantially match a modulus of elasticity of the silicon, such as about 22.5 degrees and 67.5 degrees, with respect to the crystalline orientation of the silicon.

Abstract translation: 提供角速率传感器形式的运动传感器和制造传感器的方法，并且包括支撑衬底和由衬底支撑并具有柔性共振的硅感测环。 驱动电极在环上施加静电力，使环产生共振。 感测电极感测指示环的谐振的振动模式的电容的变化，以便感测运动。 多个硅支撑环将基板连接到环上。 支撑环以与硅的结晶取向基本上匹配的弹性模量（例如约22.5度和67.5度）的角度定位。

公开(公告)号：US20080230909A1

公开(公告)日：2008-09-25

申请号：US11977588

申请日：2007-10-25

Applicant: Dan W. Chilcott

Inventor： Dan W. Chilcott

IPC: H01L23/48

CPC classification number: B81B3/001

Abstract: A technique for forming anti-stiction bumps on a bottom surface of a micro-electro mechanical (MEM) structure includes a number of process steps. The MEM structure is fabricated from an assembly that includes a support substrate bonded to a single-crystal semiconductor layer, via an insulator layer. A plurality of holes are formed through the single-crystal semiconductor layer to the insulator layer on an interior portion of a defined movable structure. A portion of the insulator layer underneath the holes is removed. The holes are then filled with a conformal film that extends below a lower surface of the defined movable structure to provide a plurality of anti-stiction bumps. A trench is then formed through the single-crystal semiconductor layer to the insulator layer to form the defined movable structure. Finally, a remainder of the insulator layer underneath the defined movable structure is removed to free the defined movable structure.

Abstract translation: 在微机电（MEM）结构的底表面上形成抗静电凸块的技术包括多个工艺步骤。 MEM结构由包括通过绝缘体层结合到单晶半导体层的支撑衬底的组件制成。 在限定的可移动结构的内部，通过单晶半导体层形成多个孔至绝缘体层。 除去孔下方的绝缘体层的一部分。 然后用保形膜填充孔，该保形膜在限定的可移动结构的下表面下方延伸以提供多个抗静电凸块。 然后通过单晶半导体层形成沟槽到绝缘体层以形成限定的可移动结构。 最后，除去限定的可移动结构之下的绝缘体层的剩余部分以释放限定的可移动结构。