Dynamic recalibration mechanism for elastic interface
    1.
    发明授权
    Dynamic recalibration mechanism for elastic interface 失效
    弹性界面的动态重新校准机制

    公开(公告)号:US07440531B2

    公开(公告)日:2008-10-21

    申请号:US11055865

    申请日:2005-02-11

    IPC分类号: H04L25/00

    摘要: A method and apparatus for de-skewing and aligning digital data received over an elastic interface bus is disclosed. Upon receiving the data, it is sent through a programmable delay line. While in the programmable delay line, the data is sampled at three points within the data's eye pattern. The three sampling points are dynamically adjusted to maximize coverage of the data's eye pattern. During the adjustment of the sampling points to optimally cover the data's eye pattern, delayed data is sampled from an alternate sampler to prevent sampling from the functional sampler while the delay in the primary sampler is adjusted. Sampling from the alternate sampler while changing the sampling points of the functional sampler serves to reduce glitches that may occur by sampling the functional sampler while its sampling parameters are changed. The method and apparatus allow for alternate eye tracking and wrap around eye tracking.

    摘要翻译: 公开了一种用于使在弹性接口总线上接收的数字数据去偏斜和对准的方法和装置。 在接收到数据后,通过可编程延迟线发送。 在可编程延迟线中,数据在数据眼图中的三个点进行采样。 动态调整三个采样点,以最大化数据眼图的覆盖范围。 在调整采样点以最佳地覆盖数据的眼图时,延迟数据从备用采样器采样,以防止在采样器中的延迟调整时从功能采样器采样。 在更换功能采样器的采样点时,从备用采样器进行采样可以减少在采样参数变化时采样功能采样器可能发生的毛刺。 所述方法和装置允许替代眼睛跟踪并包裹眼睛跟踪。

    Elastic interface de-skew mechanism
    2.
    发明授权
    Elastic interface de-skew mechanism 有权
    弹性界面去歪斜机制

    公开(公告)号:US07461287B2

    公开(公告)日:2008-12-02

    申请号:US11055866

    申请日:2005-02-11

    IPC分类号: G06F1/04 G06F13/42

    CPC分类号: G06F5/06 G06F1/10

    摘要: A mechanism for de-skewing and aligning data bits sent between two chips on an elastic interface. On the receiving end of an elastic interface, the eye of each data bit within a clock/data group is delayed by less than a bit time to align the eyes with the nearest clock edge of a received clock signal. In addition to aligning the eyes of the individual data bits with the nearest clock edge, IAP patterns are used to determine the amount of further delay needed to line up the individual data beats from each data bit. If the data beats for the data bits are not aligned, all but the slowest data beat are delayed to align the data beats for all bits. The additional delay is achieved using sample latches that result in a delayed signal with less jitter. As a result of having less jitter, the received, de-skewed, and aligned clock/data group can be forwarded to the operative portion of the receiving chip at an increased frequency.

    摘要翻译: 用于在弹性界面上在两个芯片之间发送的数据位的偏斜和对准的机制。 在弹性接口的接收端,时钟/数据组内的每个数据位的眼睛被延迟小于一点时间,以使眼睛与接收到的时钟信号的最近的时钟沿对齐。 除了将各个数据位的眼睛与最近的时钟边沿对齐之外,还使用IAP模式来确定从每个数据位排列各个数据节拍所需的进一步延迟量。 如果数据位的数据跳转不对齐,除了最慢的数据跳转之外,除了所有位的数据跳转之外,都会被延迟。 使用采样锁存器实现额外的延迟,导致延迟信号抖动较小。 由于具有较少的抖动,所接收的,去偏斜的和对准的时钟/数据组可以以增加的频率转发到接收芯片的操作部分。

    Alignment mode selection mechanism for elastic interface
    3.
    发明授权
    Alignment mode selection mechanism for elastic interface 失效
    弹性界面对准模式选择机构

    公开(公告)号:US07443940B2

    公开(公告)日:2008-10-28

    申请号:US11055841

    申请日:2005-02-11

    IPC分类号: H04L25/00

    摘要: Methods and apparatus are disclosed for aligning received data bits in elastic interface systems. Depending upon which one of several alignment modes is selected, data bits can be loaded into FIFO latches on rising clock edges if the data was sent on rising clock edges, on falling clock edges if the data was sent on falling clock edges, or on the nearest clock edge if minimum latency is desired. Alternatively, data bits can be delayed by one or more bit times before loading into FIFO latches to reduce the elastic interface system's sensitivity to drift. The present invention permits a user to trade off factors related to for latency, drift, and skew by choosing among different alignment modes in an elastic interface system.

    摘要翻译: 公开了用于在弹性界面系统中对准接收数据位的方法和装置。 根据选择的几种对准模式中的哪一种,如果数据在上升时钟沿发送,则数据位可以在上升时钟沿加载到FIFO锁存器中,如果数据在下降时钟沿发送,则在下降时钟沿 如果需要最小延迟,则为最近的时钟沿。 或者,数据位可以在加载到FIFO锁存器之前延迟一个或多个位时间,以减少弹性接口系统对漂移的敏感度。 本发明允许用户通过在弹性接口系统中的不同对准模式之间进行选择来折衷与延迟,漂移和偏斜相关的因素。

    Culture medium for cultivation of microorganisms
    6.
    发明授权
    Culture medium for cultivation of microorganisms 有权
    用于培养微生物的培养基

    公开(公告)号:US08313938B1

    公开(公告)日:2012-11-20

    申请号:US13272112

    申请日:2011-10-12

    IPC分类号: C12N1/20 C12N1/00

    CPC分类号: C12Q1/14 C12N1/20

    摘要: The present invention discloses to culture medium unit doses for cultivating microorganisms comprising at least two compositions, each composition packaged in a composition unit dose of a predetermined amount, said composition unit doses being used for combining one of each composition unit dose forming said culture medium unit dose. The composition unit doses being packaged separately and individually until a time said culture medium unit dose is to be prepared for use for cultivation of microorganisms, wherein said time one of each composition unit dose are combined thereby forming said culture medium unit dose. The invention also discloses a method of manufacturing the composition unit doses, and a kit for cultivating microorganisms, the kit comprising a combination of the composition unit doses.

    摘要翻译: 本发明公开了培养培养微生物的培养基单位剂量,其包含至少两种组合物,每种组合物以预定量的组合物单位剂量包装,所述组合物单位剂量用于组合形成所述培养基单位的每个组合单位剂量之一 剂量。 组合单位剂量分别和单独包装,直到培养基单位剂量准备用于培养微生物的时间,其中组合单位剂量中的所述时间之一组合,从而形成所述培养基单位剂量。 本发明还公开了制备组合物单位剂量的方法和用于培养微生物的试剂盒,该试剂盒包括组合单位剂量的组合。