公开(公告)号：US20100104178A1

公开(公告)日：2010-04-29

申请号：US12256673

申请日：2008-10-23

申请人： Daniel Tamburrino ,  Jon M. Speigle ,  Douglas J. Tweet

发明人： Daniel Tamburrino ,  Jon M. Speigle ,  Douglas J. Tweet

IPC分类号： G06K9/00 ,  G06K9/40

CPC分类号： H04N9/045 ,  G06T3/4015 ,  H04N2209/046

摘要： Aspects of the present invention are related to systems and methods for image demosaicing.

公开(公告)号：US20100102366A1

公开(公告)日：2010-04-29

申请号：US12258347

申请日：2008-10-24

申请人： Jong-Jan Lee ,  Douglas J. Tweet ,  Jon M. Speigle

发明人： Jong-Jan Lee ,  Douglas J. Tweet ,  Jon M. Speigle

IPC分类号： H01L31/112 ,  H01L31/18

CPC分类号： H01L27/14645 ,  H01L27/14609 ,  H01L27/14621 ,  H01L27/1463

摘要： An integrated infrared (IR) and full color complementary metal oxide semiconductor (CMOS) imager array is provided. The array is built upon a lightly doped p doped silicon (Si) substrate. Each pixel cell includes at least one visible light detection pixel and an IR pixel. Each visible light pixel includes a moderately p doped bowl with a bottom p doped layer and p doped sidewalls. An n doped layer is enclosed by the p doped bowl, and a moderately p doped surface region overlies the n doped layer. A transfer transistor has a gate electrode overlying the p doped sidewalls, a source formed from the n doped layer, and an n+ doped drain connected to a floating diffusion region. The IR pixel is the same, except that there is no bottom p doped layer. An optical wavelength filter overlies the visible light and IR pixels.

摘要翻译： 提供集成红外（IR）和全色互补金属氧化物半导体（CMOS）成像器阵列。 阵列建立在轻掺杂的p掺杂硅（Si）衬底上。 每个像素单元包括至少一个可见光检测像素和IR像素。 每个可见光像素包括具有底部p掺杂层和p掺杂侧壁的中等P掺杂的碗。 n掺杂层被p掺杂的碗封闭，并且中等P掺杂的表面区域覆盖在n掺杂层上。 传输晶体管具有覆盖p掺杂侧壁的栅电极，由n掺杂层形成的源和连接到浮置扩散区的n +掺杂漏极。 IR像素是相同的，除了没有底部p掺杂层。 光学波长滤光器覆盖可见光和IR像素。

公开(公告)号：US07816170B2

公开(公告)日：2010-10-19

申请号：US12251067

申请日：2008-10-14

申请人： Jong-Jan Lee ,  Jon M. Speigle ,  Douglas J. Tweet

发明人： Jong-Jan Lee ,  Jon M. Speigle ,  Douglas J. Tweet

IPC分类号： H01L21/00

CPC分类号： H01L27/14647 ,  H01L21/26513 ,  H01L27/14603 ,  H01L27/14689

摘要： A dual-pixel full color CMOS imager comprises a two-photodiode stack including an n doped substrate, a bottom photodiode, and a top photodiode. The bottom photodiode has a bottom p doped layer at a first depth overlying the substrate and a bottom n doped layer cathode overlying the bottom p doped layer. The top photodiode has a top p doped layer overlying the bottom n doped layer and a top n doped layer cathode overlying the top p doped layer. A single photodiode including a bottom p doped layer overlies the substrate at a third depth. The third depth is less than, or equal to the first depth. A bottom n doped layer overlies the bottom p doped layer, a top p doped layer directly overlies the bottom n doped layer without an intervening layer, and a top n doped layer overlies the top p doped layer.

摘要翻译： 双像素全色CMOS成像器包括包括n掺杂衬底，底部光电二极管和顶部光电二极管的双光电二极管堆叠。 底部光电二极管具有覆盖衬底的第一深度的底部p掺杂层和覆盖底部p掺杂层的底部n掺杂层阴极。 顶部光电二极管具有覆盖底部n掺杂层的顶部p掺杂层和覆盖顶部p掺杂层的顶部n掺杂层阴极。 包括底部p掺杂层的单个光电二极管在第三深度覆盖衬底。 第三深度小于或等于第一深度。 底部n掺杂层覆盖在底部p掺杂层上，顶部p掺杂层直接覆盖在底部n掺杂层上，而没有中间层，并且顶部n掺杂层覆盖在顶部p掺杂层上。

公开(公告)号：US20090194800A1

公开(公告)日：2009-08-06

申请号：US12251067

申请日：2008-10-14

申请人： Jong-Jan Lee ,  Jon M. Speigle ,  Douglas J. Tweet

发明人： Jong-Jan Lee ,  Jon M. Speigle ,  Douglas J. Tweet

IPC分类号： H01L27/146 ,  H01L21/00 ,  H01L21/425

CPC分类号： H01L27/14647 ,  H01L21/26513 ,  H01L27/14603 ,  H01L27/14689

摘要： A dual-pixel full color CMOS imager is provided. The imager comprises a two-photodiode stack including an n doped substrate, a bottom photodiode, and a top photodiode. The bottom photodiode has a bottom p doped layer at a first depth overlying the substrate and a bottom n doped layer cathode overlying the bottom p doped layer. The top photodiode has a top p doped layer overlying the bottom n doped layer and a top n doped layer cathode overlying the top p doped layer. The imager further includes a single photodiode including a bottom p doped layer overlying the substrate at a third depth, where the third depth is less than, or equal to the first depth. A bottom n doped layer overlies the bottom p doped layer, a top p doped layer directly overlies the bottom n doped layer without an intervening layer, and a top n doped layer overlies the top p doped layer.

摘要翻译： 提供了一个双像素全彩色CMOS成像器。 该成像器包括包括n掺杂衬底，底部光电二极管和顶部光电二极管的双光电二极管堆叠。 底部光电二极管具有覆盖衬底的第一深度的底部p掺杂层和覆盖底部p掺杂层的底部n掺杂层阴极。 顶部光电二极管具有覆盖底部n掺杂层的顶部p掺杂层和覆盖顶部p掺杂层的顶部n掺杂层阴极。 成像器还包括单个光电二极管，其包括在第三深度处覆盖衬底的底部p掺杂层，其中第三深度小于或等于第一深度。 底部n掺杂层覆盖在底部p掺杂层上，顶部p掺杂层直接覆盖在底部n掺杂层上，而没有中间层，并且顶部n掺杂层覆盖在顶部p掺杂层上。

公开(公告)号：US07915652B2

公开(公告)日：2011-03-29

申请号：US12258347

申请日：2008-10-24

申请人： Jong-Jan Lee ,  Douglas J. Tweet ,  Jon M. Speigle

发明人： Jong-Jan Lee ,  Douglas J. Tweet ,  Jon M. Speigle

IPC分类号： H01L31/112

CPC分类号： H01L27/14645 ,  H01L27/14609 ,  H01L27/14621 ,  H01L27/1463

摘要： An integrated infrared (IR) and full color complementary metal oxide semiconductor (CMOS) imager array is provided. The array is built upon a lightly doped p doped silicon (Si) substrate. Each pixel cell includes at least one visible light detection pixel and an IR pixel. Each visible light pixel includes a moderately p doped bowl with a bottom p doped layer and p doped sidewalls. An n doped layer is enclosed by the p doped bowl, and a moderately p doped surface region overlies the n doped layer. A transfer transistor has a gate electrode overlying the p doped sidewalls, a source formed from the n doped layer, and an n+ doped drain connected to a floating diffusion region. The IR pixel is the same, except that there is no bottom p doped layer. An optical wavelength filter overlies the visible light and IR pixels.

摘要翻译： 提供集成红外（IR）和全色互补金属氧化物半导体（CMOS）成像器阵列。 阵列建立在轻掺杂的p掺杂硅（Si）衬底上。 每个像素单元包括至少一个可见光检测像素和IR像素。 每个可见光像素包括具有底部p掺杂层和p掺杂侧壁的中等P掺杂的碗。 n掺杂层被p掺杂的碗封闭，并且中等P掺杂的表面区域覆盖在n掺杂层上。 传输晶体管具有覆盖p掺杂侧壁的栅电极，由n掺杂层形成的源和连接到浮置扩散区的n +掺杂漏极。 IR像素是相同的，除了没有底部p掺杂层。 光学波长滤光器覆盖可见光和IR像素。

公开(公告)号：US08896907B2

公开(公告)日：2014-11-25

申请号：US13449370

申请日：2012-04-18

申请人： Douglas J. Tweet ,  Akinori Hashimura ,  Paul J. Schuele ,  Apostolos T. Voutsas

发明人： Douglas J. Tweet ,  Akinori Hashimura ,  Paul J. Schuele ,  Apostolos T. Voutsas

IPC分类号： G02B26/00 ,  G02F1/1335

CPC分类号： G02F1/133553 ,  G02F1/19 ,  G02F2201/124 ,  G02F2203/10

摘要： A method is provided for forming a reflective plasmonic display. The method provides a substrate and deposits a bottom dielectric layer. A conductive film is deposited overlying the bottom dielectric layer. A hard mask is formed with nano-size openings overlying the conductive film. The conductive film is plasma etched via nano-size openings in the hard mask, stopping at the dielectric layer. After removing the hard mask, a conductive film is left with nano-size openings to the dielectric layer. Metal is deposited in the nano-size openings, creating a pattern of metallic nanoparticles overlying the dielectric layer. Then, the conductive film is removed. The hard mask may be formed by conformally depositing an Al film overlying the conductive film and anodizing the Al film, creating a hard mask of porous anodized Al oxide (AAO) film. The porous AAO film may form a short-range hexagonal, and long-range random order hole patterns.

摘要翻译： 提供了形成反射等离子体显示器的方法。 该方法提供衬底并沉积底部电介质层。 沉积覆盖在底部介电层上的导电膜。 形成具有覆盖导电膜的纳米尺寸开口的硬掩模。 导电膜通过硬掩模中的纳米尺寸开口进行等离子体蚀刻，停留在电介质层。 在去除硬掩模之后，导电膜留下具有到介电层的纳米尺寸的开口。 金属沉积在纳米尺寸的开口中，形成覆盖在介电层上的金属纳米颗粒图案。 然后，去除导电膜。 硬掩模可以通过共形沉积覆盖在导电膜上的Al膜并阳极氧化Al膜，形成多孔阳极氧化Al氧化物（AAO）膜的硬掩模来形成。 多孔AAO膜可以形成短程六边形和长程随机顺序孔图案。

公开(公告)号：US20140168742A1

公开(公告)日：2014-06-19

申请号：US13714073

申请日：2012-12-13

申请人： Akinori Hashimura ,  Douglas J. Tweet ,  Apostolos T. Voutsas

发明人： Akinori Hashimura ,  Douglas J. Tweet ,  Apostolos T. Voutsas

IPC分类号： G02F1/00 ,  G02B5/00

CPC分类号： G02F1/0018 ,  B82Y20/00 ,  G02B5/008 ,  G02F1/133553 ,  G02F1/1393 ,  G02F2202/36 ,  G02F2203/055 ,  G02F2203/10 ,  Y10S977/773 ,  Y10S977/834

摘要： A plasmonic optical device is provided operating in near ultra violet (UV) and visible wavelengths of light. The optical device is made from a substrate and nanoparticles. The nanoparticles have a core with a negative real value relative permittivity of absolute value greater than 10 in a first range of wavelengths including near UV and visible wavelengths of light, and a shell with an imaginary relative permittivity of less than 5 in the first range of wavelengths. A dielectric overlies the substrate, and is embedded with the nanoparticles. If the substrate is reflective, a reflective optical filter is formed. If the substrate is transparent, the filter is transmissive. In one aspect, the dielectric is a tunable medium (e.g., liquid crystal) having an index of refraction responsive to an electric field. The tunable medium is interposed between a first electrode and a second electrode.

摘要翻译： 提供等离子体激发光学器件，其工作在近紫外（UV）和可见光波长的光。 光学器件由衬底和纳米颗粒制成。 所述纳米颗粒具有在包括近紫外和可见光波长的第一波长范围内具有大于10的绝对值的绝对值相对介电常数的核，并且在第一范围内具有小于5的假想相对介电常数的壳 波长。 电介质覆盖在衬底上，并且嵌入有纳米颗粒。 如果基板是反射的，则形成反射式滤光器。 如果基板是透明的，则滤光器是透射的。 在一个方面，电介质是具有响应于电场的折射率的可调介质（例如，液晶）。 可调介质介于第一电极和第二电极之间。

公开(公告)号：US20140140054A1

公开(公告)日：2014-05-22

申请号：US13682535

申请日：2012-11-20

申请人： Akinori Hashimura ,  Douglas J. Tweet ,  Apostolos T. Voutsas

发明人： Akinori Hashimura ,  Douglas J. Tweet ,  Apostolos T. Voutsas

IPC分类号： C23C28/00 ,  F21V9/16

CPC分类号： C25D11/045 ,  B01D67/0065 ,  B01D67/0069 ,  B01D67/0072 ,  B01D71/022 ,  B01D71/025 ,  B82Y40/00 ,  C23C14/046 ,  C23C16/045 ,  C25D3/44 ,  C25D3/665 ,  C25D5/02 ,  C25D11/022 ,  C25D11/12 ,  C25D11/18 ,  C25D11/20 ,  C25D11/24

摘要： Methods are provided for fabricating a multi-structure pore membrane. In one method, an anodized aluminum oxide (AAO) template is formed with an array of pores exposing underlying regions of a conductive layer top surface. A plurality of photoresist layers is patterned to sequentially expose a plurality of AAO template sections. Each exposed AAO template section is sequentially etched to widen pore diameters, so that each AAO template section may be associated with a corresponding unique pore diameter. A target material is deposited in the pores of the AAO template and, as a result, an array of target material structures is formed on the top surface, where the target material structures associated with each AAO template section have a corresponding diameter. Also provided is a multi-structure pixel device formed with subpixels having different structure dimensions.

摘要翻译： 提供了制造多结构孔膜的方法。 在一种方法中，阳极氧化的氧化铝（AAO）模板形成有暴露导电层顶表面的下面区域的孔阵列。 图案化多个光致抗蚀剂层以顺序暴露多个AAO模板部分。 依次蚀刻每个曝光的AAO模板部分以扩大孔径，使得每个AAO模板部分可以与相应的唯一孔径相关联。 目标材料沉积在AAO模板的孔中，结果，在顶表面上形成一组目标材料结构，其中与每个AAO模板部分相关联的目标材料结构具有相应的直径。 还提供了具有不同结构尺寸的子像素形成的多结构像素器件。

公开(公告)号：US07999995B2

公开(公告)日：2011-08-16

申请号：US12568522

申请日：2009-09-28

申请人： Akinori Hashimura ,  Douglas J. Tweet ,  Apostolos T. Voutsas

发明人： Akinori Hashimura ,  Douglas J. Tweet ,  Apostolos T. Voutsas

IPC分类号： G02B26/00

CPC分类号： G02B26/001

摘要： A full color range analog controlled interferometric modulation device is provided. The device includes a transparent substrate, and a transparent fixed-position electrically conductive electrode with a bottom surface overlying the substrate. A transparent spacer overlies the fixed-position electrode, and an induced absorber overlies the spacer. An optically reflective electrically conductive moveable membrane overlies the induced absorber. A cavity is formed between the induced absorber and the moveable membrane having a maximum air gap dimension less than the spacer thickness. In one aspect, the distance from the top surface of the fixed-position electrode to a cavity lower surface is at least twice as great as the cavity maximum air gap dimension. In another aspect, at least one anti-reflective coating (ARC) layer is interposed between the substrate and the fixed-position electrode, and at least one ARC layer is interposed between the fixed-position electrode and the spacer.

摘要翻译： 提供全彩色范围的模拟控制干涉式调制装置。 该器件包括透明衬底和具有覆盖衬底的底表面的透明固定位置导电电极。 透明间隔物覆盖固定位置电极，诱导吸收体覆盖在间隔物上。 光反射导电的可移动膜覆盖在诱导的吸收体上。 在诱导的吸收体和具有小于间隔物厚度的最大气隙尺寸的可移动膜之间形成空腔。 在一个方面，从固定位置电极的顶表面到腔下表面的距离至少是腔最大气隙尺寸的两倍。 另一方面，在基板和固定位置电极之间插入至少一个抗反射涂层（ARC）层，并且在固定位置电极和间隔物之间​​插入至少一个ARC层。

公开(公告)号：US07675056B2

公开(公告)日：2010-03-09

申请号：US11891574

申请日：2007-08-10

申请人： Jong-Jan Lee ,  Sheng Teng Hsu ,  Jer-Shen Maa ,  Douglas J. Tweet

发明人： Jong-Jan Lee ,  Sheng Teng Hsu ,  Jer-Shen Maa ,  Douglas J. Tweet

IPC分类号： H01L29/06 ,  H01L31/072 ,  H01L31/109 ,  H01L31/0328 ,  H01L31/062 ,  H01L31/113 ,  H01L31/0232

CPC分类号： H01L31/1136 ,  H01L31/028 ,  H01L31/1808 ,  Y02E10/547

摘要： A floating body germanium (Ge) phototransistor and associated fabrication process are presented. The method includes: providing a silicon (Si) substrate; selectively forming an insulator layer overlying the Si substrate; forming an epitaxial Ge layer overlying the insulator layer using a liquid phase epitaxy (LPE) process; forming a channel region in the Ge layer; forming a gate dielectric, gate electrode, and gate spacers overlying the channel region; and, forming source/drain regions in the Ge layer. The LPE process involves encapsulating the Ge with materials having a melting temperature greater than a first temperature, and melting the Ge using a temperature lower than the first temperature. The LPE process includes: forming a dielectric layer overlying deposited Ge; melting the Ge; and, in response to cooling the Ge, laterally propagating an epitaxial growth front into the Ge from an underlying Si substrate surface.

摘要翻译： 提出了一种浮体锗（Ge）光电晶体管及其制造工艺。 该方法包括：提供硅（Si）衬底; 选择性地形成覆盖Si衬底的绝缘体层; 使用液相外延（LPE）工艺形成覆盖绝缘体层的外延Ge层; 在Ge层中形成沟道区; 形成覆盖所述沟道区的栅极电介质，栅电极和栅极间隔; 并且在Ge层中形成源/漏区。 LPE工艺包括用具有大于第一温度的熔化温度的材料包封Ge，并且使用低于第一温度的温度来熔化Ge。 LPE工艺包括：形成覆盖沉积Ge的介电层; 融化Ge; 并且响应于冷却Ge，将外延生长前沿从下面的Si衬底表面横向传播到Ge中。