公开(公告)号：US5656514A

公开(公告)日：1997-08-12

申请号：US346209

申请日：1994-11-22

申请人： David Ahlgren ,  Jack Chu ,  Martin Revitz ,  Paul Ronsheim ,  Mary Saccamango ,  David Sunderland

发明人： David Ahlgren ,  Jack Chu ,  Martin Revitz ,  Paul Ronsheim ,  Mary Saccamango ,  David Sunderland

IPC分类号： H01L29/165 ,  H01L21/331 ,  H01L29/73 ,  H01L29/737 ,  H01L21/265

CPC分类号： H01L29/66242 ,  Y10S438/936

摘要： A high gain, high frequency transistor is formed having a combination of a moderately doped retrograde emitter and a collector which is formed by self-aligned implantation through an emitter opening window. This combination allows continued base width scaling and ensures high current capability yet limits the electric field at the emitter-base junction, particularly near the base contacts, in order to reduce leakage and capacitance and to enhance breakdown voltage. Cut-off frequencies on the order of 100 GHz can thus be obtained in the performance of a transistor with a 30 nm base width in a SiGe device.

摘要翻译： 形成高增益高频晶体管，其具有中等掺杂逆向发射极和通过发射器开口窗口的自对准注入形成的集电极的组合。 这种组合允许持续的基底宽度缩放并确保高电流能力，但是限制了发射极 - 基极结处，特别是靠近基极触点处的电场，以便减少泄漏和电容并增强击穿电压。 因此，在SiGe器件中，具有30nm基极宽度的晶体管的性能可获得大约100GHz的截止频率。

公开(公告)号：US20050269664A1

公开(公告)日：2005-12-08

申请号：US10709905

申请日：2004-06-04

申请人： David Ahlgren ,  Gregory Freeman ,  Francois Pagette ,  Christopher Schnabel ,  Anna Topol

发明人： David Ahlgren ,  Gregory Freeman ,  Francois Pagette ,  Christopher Schnabel ,  Anna Topol

IPC分类号： H01L21/331 ,  H01L29/737 ,  H01L29/80

CPC分类号： H01L29/66242 ,  H01L29/7378

摘要： A bipolar transistor has a collector that is contacted directly beneath a base-collector junction by metallization to reduce collector resistance. A conventional reach-through and buried layer, as well as their associated resistance, are eliminated. The transistor is well isolated, nearly eliminating well-to-substrate capacitance and device-to-device leakage current. The structure provides for improved electrical performance, including improved fT, Fmax and drive current.

摘要翻译： 双极晶体管具有通过金属化直接接触基极 - 集电极结下方的集电极，以降低集电极电阻。 消除了常规的通孔和掩埋层以及它们的相关电阻。 晶体管非常隔离，几乎消除了良好的衬底电容和器件到器件的漏电流。 该结构提供了改进的电性能，包括改进的f T，F max和驱动电流。

公开(公告)号：US20050212027A1

公开(公告)日：2005-09-29

申请号：US10708861

申请日：2004-03-29

申请人： Thomas Adam ,  David Ahlgren ,  Kangguo Cheng ,  Ramachandra Divakaruni

发明人： Thomas Adam ,  David Ahlgren ,  Kangguo Cheng ,  Ramachandra Divakaruni

IPC分类号： H01L21/8234 ,  H01L21/8242 ,  H01L27/108 ,  H01L29/94

CPC分类号： H01L27/10876 ,  H01L27/10841 ,  H01L29/945 ,  Y10S438/931

摘要： A method of forming a trench in a semiconductor substrate includes a step of converting the cross section of the upper portion of the trench from octagonal to rectangular, so that sensitivity to alignment errors between the trench lithography and the active area lithography is reduced. Applications include a vertical transistor that becomes insensitive to misalignment between the trench and the litho for the active area, in particular a DRAM cell with a vertical transistor.

摘要翻译： 在半导体衬底中形成沟槽的方法包括将沟槽的上部的横截面从八边形转换为矩形的步骤，从而减小了沟槽光刻和有源区光刻之间对准误差的敏感性。 应用包括对于有源区域，特别是具有垂直晶体管的DRAM单元对沟槽和光刻层之间的未对准变得不敏感的垂直晶体管。

公开(公告)号：US20070218641A1

公开(公告)日：2007-09-20

申请号：US11308259

申请日：2006-03-14

申请人： David Ahlgren ,  Guy Cohen ,  Christian Lavoie ,  Francois Pagette ,  Anna Topol

发明人： David Ahlgren ,  Guy Cohen ,  Christian Lavoie ,  Francois Pagette ,  Anna Topol

IPC分类号： H01L21/331 ,  H01L21/8222

CPC分类号： H01L29/1004 ,  H01L29/1608 ,  H01L29/66242 ,  H01L29/66287 ,  H01L29/732 ,  H01L29/7378

摘要： A system and method comprises forming an intrinsic base on a collector. The system and method further includes forming a fully silicided extrinsic base on the intrinsic base by a self-limiting silicidation process at a predetermined temperature and for a predetermined amount of time, the silicidation substantially stopping at the intrinsic base. The system and method further includes forming an emitter which is physically insulated from the extrinsic base and the collector, and which is in physical contact with the intrinsic base.

摘要翻译： 一种系统和方法包括在收集器上形成固有碱基。 该系统和方法还包括通过在预定温度下的自限硅化工艺在本征基底上形成完全硅化的外在碱，并且预定量的时间，硅化物在本征碱基本上停止。 该系统和方法还包括形成与外部基极和集电器物理绝缘的发射极，并与内部基极物理接触。

公开(公告)号：US20050242373A1

公开(公告)日：2005-11-03

申请号：US11175094

申请日：2005-07-05

申请人： David Ahlgren ,  Gregory Freeman ,  Marwan Khater ,  Richard Volant

发明人： David Ahlgren ,  Gregory Freeman ,  Marwan Khater ,  Richard Volant

IPC分类号： H01L21/28 ,  H01L21/331 ,  H01L21/8249 ,  H01L29/08 ,  H01L29/417 ,  H01L29/423 ,  H01L29/732 ,  H01L29/737 ,  H01L31/072

CPC分类号： H01L29/66287 ,  H01L21/8249 ,  H01L29/0804 ,  H01L29/41708 ,  H01L29/42304 ,  H01L29/66242 ,  H01L29/732 ,  H01L29/7375 ,  H01L29/7378

摘要： The present invention provides a bipolar transistor having a raised extrinsic base silicide and an emitter contact border that are self-aligned. The bipolar transistor of the present invention exhibit reduced parasitics as compared with bipolar transistors that do not include a self-aligned silicide and a self-aligned emitter contact border. The present invention also is related to methods of fabricating the inventive bipolar transistor structure. In the methods of the present invention, a block emitter polysilicon region replaces a conventional T-shaped emitter polysilicon.

摘要翻译： 本发明提供一种具有凸起的非本征基极硅化物和自对准的发射极接触边界的双极晶体管。 与不包括自对准硅化物和自对准发射极接触边界的双极晶体管相比，本发明的双极晶体管表现出减小的寄生效应。 本发明还涉及制造本发明的双极晶体管结构的方法。 在本发明的方法中，块状发射极多晶硅区域代替常规的T形发射极多晶硅。

公开(公告)号：US20050121748A1

公开(公告)日：2005-06-09

申请号：US10727945

申请日：2003-12-04

申请人： David Ahlgren ,  Gregory Freeman ,  Marwan Khater ,  Richard Volant

发明人： David Ahlgren ,  Gregory Freeman ,  Marwan Khater ,  Richard Volant

IPC分类号： H01L21/28 ,  H01L21/331 ,  H01L21/8249 ,  H01L29/08 ,  H01L29/417 ,  H01L29/423 ,  H01L29/732 ,  H01L29/737 ,  H01L27/082

CPC分类号： H01L29/66287 ,  H01L21/8249 ,  H01L29/0804 ,  H01L29/41708 ,  H01L29/42304 ,  H01L29/66242 ,  H01L29/732 ,  H01L29/7375 ,  H01L29/7378

摘要： The present invention provides a bipolar transistor having a raised extrinsic base silicide and an emitter contact border that are self-aligned. The bipolar transistor of the present invention exhibit reduced parasitics as compared with bipolar transistors that do not include a self-aligned silicide and a self-aligned emitter contact border. The present invention also is related to methods of fabricating the inventive bipolar transistor structure. In the methods of the present invention, a block emitter polysilicon region replaces a conventional T-shaped emitter polysilicon.